76d0a40c71389e0770b770ea2c70158dd32fa6f4
[deliverable/linux.git] / drivers / gpu / drm / msm / mdp / mdp4 / mdp4_plane.c
1 /*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #include "mdp4_kms.h"
19
20
21 struct mdp4_plane {
22 struct drm_plane base;
23 const char *name;
24
25 enum mdp4_pipe pipe;
26
27 uint32_t nformats;
28 uint32_t formats[32];
29
30 bool enabled;
31 };
32 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
33
34 static void mdp4_plane_set_scanout(struct drm_plane *plane,
35 struct drm_framebuffer *fb);
36 static int mdp4_plane_mode_set(struct drm_plane *plane,
37 struct drm_crtc *crtc, struct drm_framebuffer *fb,
38 int crtc_x, int crtc_y,
39 unsigned int crtc_w, unsigned int crtc_h,
40 uint32_t src_x, uint32_t src_y,
41 uint32_t src_w, uint32_t src_h);
42
43 static struct mdp4_kms *get_kms(struct drm_plane *plane)
44 {
45 struct msm_drm_private *priv = plane->dev->dev_private;
46 return to_mdp4_kms(to_mdp_kms(priv->kms));
47 }
48
49 static void mdp4_plane_destroy(struct drm_plane *plane)
50 {
51 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
52
53 drm_plane_helper_disable(plane);
54 drm_plane_cleanup(plane);
55
56 kfree(mdp4_plane);
57 }
58
59 /* helper to install properties which are common to planes and crtcs */
60 void mdp4_plane_install_properties(struct drm_plane *plane,
61 struct drm_mode_object *obj)
62 {
63 // XXX
64 }
65
66 int mdp4_plane_set_property(struct drm_plane *plane,
67 struct drm_property *property, uint64_t val)
68 {
69 // XXX
70 return -EINVAL;
71 }
72
73 static const struct drm_plane_funcs mdp4_plane_funcs = {
74 .update_plane = drm_atomic_helper_update_plane,
75 .disable_plane = drm_atomic_helper_disable_plane,
76 .destroy = mdp4_plane_destroy,
77 .set_property = mdp4_plane_set_property,
78 .reset = drm_atomic_helper_plane_reset,
79 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
80 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
81 };
82
83 static int mdp4_plane_prepare_fb(struct drm_plane *plane,
84 struct drm_framebuffer *fb)
85 {
86 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
87 struct mdp4_kms *mdp4_kms = get_kms(plane);
88
89 DBG("%s: prepare: FB[%u]", mdp4_plane->name, fb->base.id);
90 return msm_framebuffer_prepare(fb, mdp4_kms->id);
91 }
92
93 static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
94 struct drm_framebuffer *fb)
95 {
96 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
97 struct mdp4_kms *mdp4_kms = get_kms(plane);
98
99 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
100 msm_framebuffer_cleanup(fb, mdp4_kms->id);
101 }
102
103
104 static int mdp4_plane_atomic_check(struct drm_plane *plane,
105 struct drm_plane_state *state)
106 {
107 return 0;
108 }
109
110 static void mdp4_plane_atomic_update(struct drm_plane *plane)
111 {
112 struct drm_plane_state *state = plane->state;
113 int ret;
114
115 ret = mdp4_plane_mode_set(plane,
116 state->crtc, state->fb,
117 state->crtc_x, state->crtc_y,
118 state->crtc_w, state->crtc_h,
119 state->src_x, state->src_y,
120 state->src_w, state->src_h);
121 /* atomic_check should have ensured that this doesn't fail */
122 WARN_ON(ret < 0);
123 }
124
125 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
126 .prepare_fb = mdp4_plane_prepare_fb,
127 .cleanup_fb = mdp4_plane_cleanup_fb,
128 .atomic_check = mdp4_plane_atomic_check,
129 .atomic_update = mdp4_plane_atomic_update,
130 };
131
132 static void mdp4_plane_set_scanout(struct drm_plane *plane,
133 struct drm_framebuffer *fb)
134 {
135 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
136 struct mdp4_kms *mdp4_kms = get_kms(plane);
137 enum mdp4_pipe pipe = mdp4_plane->pipe;
138 uint32_t iova = msm_framebuffer_iova(fb, mdp4_kms->id, 0);
139
140 DBG("%s: set_scanout: %08x (%u)", mdp4_plane->name,
141 iova, fb->pitches[0]);
142
143 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
144 MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
145 MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
146
147 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
148 MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
149 MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
150
151 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe), iova);
152
153 plane->fb = fb;
154 }
155
156 #define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
157
158 static int mdp4_plane_mode_set(struct drm_plane *plane,
159 struct drm_crtc *crtc, struct drm_framebuffer *fb,
160 int crtc_x, int crtc_y,
161 unsigned int crtc_w, unsigned int crtc_h,
162 uint32_t src_x, uint32_t src_y,
163 uint32_t src_w, uint32_t src_h)
164 {
165 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
166 struct mdp4_kms *mdp4_kms = get_kms(plane);
167 enum mdp4_pipe pipe = mdp4_plane->pipe;
168 const struct mdp_format *format;
169 uint32_t op_mode = 0;
170 uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
171 uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
172
173 if (!(crtc && fb)) {
174 DBG("%s: disabled!", mdp4_plane->name);
175 return 0;
176 }
177
178 /* src values are in Q16 fixed point, convert to integer: */
179 src_x = src_x >> 16;
180 src_y = src_y >> 16;
181 src_w = src_w >> 16;
182 src_h = src_h >> 16;
183
184 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
185 fb->base.id, src_x, src_y, src_w, src_h,
186 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
187
188 if (src_w != crtc_w) {
189 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
190 /* TODO calc phasex_step */
191 }
192
193 if (src_h != crtc_h) {
194 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
195 /* TODO calc phasey_step */
196 }
197
198 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
199 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
200 MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
201
202 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
203 MDP4_PIPE_SRC_XY_X(src_x) |
204 MDP4_PIPE_SRC_XY_Y(src_y));
205
206 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
207 MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
208 MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
209
210 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
211 MDP4_PIPE_DST_XY_X(crtc_x) |
212 MDP4_PIPE_DST_XY_Y(crtc_y));
213
214 mdp4_plane_set_scanout(plane, fb);
215
216 format = to_mdp_format(msm_framebuffer_format(fb));
217
218 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
219 MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
220 MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
221 MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
222 MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
223 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
224 MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
225 MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
226 COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
227
228 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
229 MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
230 MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
231 MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
232 MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
233
234 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
235 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
236 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
237
238 return 0;
239 }
240
241 static const char *pipe_names[] = {
242 "VG1", "VG2",
243 "RGB1", "RGB2", "RGB3",
244 "VG3", "VG4",
245 };
246
247 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
248 {
249 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
250 return mdp4_plane->pipe;
251 }
252
253 /* initialize plane */
254 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
255 enum mdp4_pipe pipe_id, bool private_plane)
256 {
257 struct drm_plane *plane = NULL;
258 struct mdp4_plane *mdp4_plane;
259 int ret;
260 enum drm_plane_type type;
261
262 mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
263 if (!mdp4_plane) {
264 ret = -ENOMEM;
265 goto fail;
266 }
267
268 plane = &mdp4_plane->base;
269
270 mdp4_plane->pipe = pipe_id;
271 mdp4_plane->name = pipe_names[pipe_id];
272
273 mdp4_plane->nformats = mdp4_get_formats(pipe_id, mdp4_plane->formats,
274 ARRAY_SIZE(mdp4_plane->formats));
275
276 type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
277 ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
278 mdp4_plane->formats, mdp4_plane->nformats, type);
279 if (ret)
280 goto fail;
281
282 drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
283
284 mdp4_plane_install_properties(plane, &plane->base);
285
286 return plane;
287
288 fail:
289 if (plane)
290 mdp4_plane_destroy(plane);
291
292 return ERR_PTR(ret);
293 }
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