MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture
[deliverable/linux.git] / drivers / gpu / drm / msm / msm_atomic.c
1 /*
2 * Copyright (C) 2014 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #include "msm_drv.h"
19 #include "msm_kms.h"
20 #include "msm_gem.h"
21
22 struct msm_commit {
23 struct drm_device *dev;
24 struct drm_atomic_state *state;
25 uint32_t fence;
26 struct msm_fence_cb fence_cb;
27 uint32_t crtc_mask;
28 };
29
30 static void fence_cb(struct msm_fence_cb *cb);
31
32 /* block until specified crtcs are no longer pending update, and
33 * atomically mark them as pending update
34 */
35 static int start_atomic(struct msm_drm_private *priv, uint32_t crtc_mask)
36 {
37 int ret;
38
39 spin_lock(&priv->pending_crtcs_event.lock);
40 ret = wait_event_interruptible_locked(priv->pending_crtcs_event,
41 !(priv->pending_crtcs & crtc_mask));
42 if (ret == 0) {
43 DBG("start: %08x", crtc_mask);
44 priv->pending_crtcs |= crtc_mask;
45 }
46 spin_unlock(&priv->pending_crtcs_event.lock);
47
48 return ret;
49 }
50
51 /* clear specified crtcs (no longer pending update)
52 */
53 static void end_atomic(struct msm_drm_private *priv, uint32_t crtc_mask)
54 {
55 spin_lock(&priv->pending_crtcs_event.lock);
56 DBG("end: %08x", crtc_mask);
57 priv->pending_crtcs &= ~crtc_mask;
58 wake_up_all_locked(&priv->pending_crtcs_event);
59 spin_unlock(&priv->pending_crtcs_event.lock);
60 }
61
62 static struct msm_commit *commit_init(struct drm_atomic_state *state)
63 {
64 struct msm_commit *c = kzalloc(sizeof(*c), GFP_KERNEL);
65
66 if (!c)
67 return NULL;
68
69 c->dev = state->dev;
70 c->state = state;
71
72 /* TODO we might need a way to indicate to run the cb on a
73 * different wq so wait_for_vblanks() doesn't block retiring
74 * bo's..
75 */
76 INIT_FENCE_CB(&c->fence_cb, fence_cb);
77
78 return c;
79 }
80
81 static void commit_destroy(struct msm_commit *c)
82 {
83 end_atomic(c->dev->dev_private, c->crtc_mask);
84 kfree(c);
85 }
86
87 /* The (potentially) asynchronous part of the commit. At this point
88 * nothing can fail short of armageddon.
89 */
90 static void complete_commit(struct msm_commit *c)
91 {
92 struct drm_atomic_state *state = c->state;
93 struct drm_device *dev = state->dev;
94 struct msm_drm_private *priv = dev->dev_private;
95 struct msm_kms *kms = priv->kms;
96
97 kms->funcs->prepare_commit(kms, state);
98
99 drm_atomic_helper_commit_pre_planes(dev, state);
100
101 drm_atomic_helper_commit_planes(dev, state);
102
103 drm_atomic_helper_commit_post_planes(dev, state);
104
105 /* NOTE: _wait_for_vblanks() only waits for vblank on
106 * enabled CRTCs. So we end up faulting when disabling
107 * due to (potentially) unref'ing the outgoing fb's
108 * before the vblank when the disable has latched.
109 *
110 * But if it did wait on disabled (or newly disabled)
111 * CRTCs, that would be racy (ie. we could have missed
112 * the irq. We need some way to poll for pipe shut
113 * down. Or just live with occasionally hitting the
114 * timeout in the CRTC disable path (which really should
115 * not be critical path)
116 */
117
118 drm_atomic_helper_wait_for_vblanks(dev, state);
119
120 drm_atomic_helper_cleanup_planes(dev, state);
121
122 kms->funcs->complete_commit(kms, state);
123
124 drm_atomic_state_free(state);
125
126 commit_destroy(c);
127 }
128
129 static void fence_cb(struct msm_fence_cb *cb)
130 {
131 struct msm_commit *c =
132 container_of(cb, struct msm_commit, fence_cb);
133 complete_commit(c);
134 }
135
136 static void add_fb(struct msm_commit *c, struct drm_framebuffer *fb)
137 {
138 struct drm_gem_object *obj = msm_framebuffer_bo(fb, 0);
139 c->fence = max(c->fence, msm_gem_fence(to_msm_bo(obj), MSM_PREP_READ));
140 }
141
142
143 int msm_atomic_check(struct drm_device *dev,
144 struct drm_atomic_state *state)
145 {
146 int ret;
147
148 /*
149 * msm ->atomic_check can update ->mode_changed for pixel format
150 * changes, hence must be run before we check the modeset changes.
151 */
152 ret = drm_atomic_helper_check_planes(dev, state);
153 if (ret)
154 return ret;
155
156 ret = drm_atomic_helper_check_modeset(dev, state);
157 if (ret)
158 return ret;
159
160 return ret;
161 }
162
163 /**
164 * drm_atomic_helper_commit - commit validated state object
165 * @dev: DRM device
166 * @state: the driver state object
167 * @async: asynchronous commit
168 *
169 * This function commits a with drm_atomic_helper_check() pre-validated state
170 * object. This can still fail when e.g. the framebuffer reservation fails. For
171 * now this doesn't implement asynchronous commits.
172 *
173 * RETURNS
174 * Zero for success or -errno.
175 */
176 int msm_atomic_commit(struct drm_device *dev,
177 struct drm_atomic_state *state, bool async)
178 {
179 int nplanes = dev->mode_config.num_total_plane;
180 int ncrtcs = dev->mode_config.num_crtc;
181 struct timespec timeout;
182 struct msm_commit *c;
183 int i, ret;
184
185 ret = drm_atomic_helper_prepare_planes(dev, state);
186 if (ret)
187 return ret;
188
189 c = commit_init(state);
190 if (!c)
191 return -ENOMEM;
192
193 /*
194 * Figure out what crtcs we have:
195 */
196 for (i = 0; i < ncrtcs; i++) {
197 struct drm_crtc *crtc = state->crtcs[i];
198 if (!crtc)
199 continue;
200 c->crtc_mask |= (1 << drm_crtc_index(crtc));
201 }
202
203 /*
204 * Figure out what fence to wait for:
205 */
206 for (i = 0; i < nplanes; i++) {
207 struct drm_plane *plane = state->planes[i];
208 struct drm_plane_state *new_state = state->plane_states[i];
209
210 if (!plane)
211 continue;
212
213 if ((plane->state->fb != new_state->fb) && new_state->fb)
214 add_fb(c, new_state->fb);
215 }
216
217 /*
218 * Wait for pending updates on any of the same crtc's and then
219 * mark our set of crtc's as busy:
220 */
221 ret = start_atomic(dev->dev_private, c->crtc_mask);
222 if (ret)
223 return ret;
224
225 /*
226 * This is the point of no return - everything below never fails except
227 * when the hw goes bonghits. Which means we can commit the new state on
228 * the software side now.
229 */
230
231 drm_atomic_helper_swap_state(dev, state);
232
233 /*
234 * Everything below can be run asynchronously without the need to grab
235 * any modeset locks at all under one conditions: It must be guaranteed
236 * that the asynchronous work has either been cancelled (if the driver
237 * supports it, which at least requires that the framebuffers get
238 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
239 * before the new state gets committed on the software side with
240 * drm_atomic_helper_swap_state().
241 *
242 * This scheme allows new atomic state updates to be prepared and
243 * checked in parallel to the asynchronous completion of the previous
244 * update. Which is important since compositors need to figure out the
245 * composition of the next frame right after having submitted the
246 * current layout.
247 */
248
249 if (async) {
250 msm_queue_fence_cb(dev, &c->fence_cb, c->fence);
251 return 0;
252 }
253
254 jiffies_to_timespec(jiffies + msecs_to_jiffies(1000), &timeout);
255
256 ret = msm_wait_fence_interruptable(dev, c->fence, &timeout);
257 if (ret) {
258 WARN_ON(ret); // TODO unswap state back? or??
259 commit_destroy(c);
260 return ret;
261 }
262
263 complete_commit(c);
264
265 return 0;
266 }
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