x86/mce: Handle Local MCE events
[deliverable/linux.git] / drivers / gpu / drm / msm / msm_drv.c
1 /*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #include "msm_drv.h"
19 #include "msm_gpu.h"
20 #include "msm_kms.h"
21
22 static void msm_fb_output_poll_changed(struct drm_device *dev)
23 {
24 struct msm_drm_private *priv = dev->dev_private;
25 if (priv->fbdev)
26 drm_fb_helper_hotplug_event(priv->fbdev);
27 }
28
29 static const struct drm_mode_config_funcs mode_config_funcs = {
30 .fb_create = msm_framebuffer_create,
31 .output_poll_changed = msm_fb_output_poll_changed,
32 .atomic_check = msm_atomic_check,
33 .atomic_commit = msm_atomic_commit,
34 };
35
36 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu)
37 {
38 struct msm_drm_private *priv = dev->dev_private;
39 int idx = priv->num_mmus++;
40
41 if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus)))
42 return -EINVAL;
43
44 priv->mmus[idx] = mmu;
45
46 return idx;
47 }
48
49 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
50 static bool reglog = false;
51 MODULE_PARM_DESC(reglog, "Enable register read/write logging");
52 module_param(reglog, bool, 0600);
53 #else
54 #define reglog 0
55 #endif
56
57 #ifdef CONFIG_DRM_MSM_FBDEV
58 static bool fbdev = true;
59 MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
60 module_param(fbdev, bool, 0600);
61 #endif
62
63 static char *vram = "16m";
64 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU");
65 module_param(vram, charp, 0);
66
67 /*
68 * Util/helpers:
69 */
70
71 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
72 const char *dbgname)
73 {
74 struct resource *res;
75 unsigned long size;
76 void __iomem *ptr;
77
78 if (name)
79 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
80 else
81 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
82
83 if (!res) {
84 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
85 return ERR_PTR(-EINVAL);
86 }
87
88 size = resource_size(res);
89
90 ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
91 if (!ptr) {
92 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
93 return ERR_PTR(-ENOMEM);
94 }
95
96 if (reglog)
97 printk(KERN_DEBUG "IO:region %s %08x %08lx\n", dbgname, (u32)ptr, size);
98
99 return ptr;
100 }
101
102 void msm_writel(u32 data, void __iomem *addr)
103 {
104 if (reglog)
105 printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data);
106 writel(data, addr);
107 }
108
109 u32 msm_readl(const void __iomem *addr)
110 {
111 u32 val = readl(addr);
112 if (reglog)
113 printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val);
114 return val;
115 }
116
117 /*
118 * DRM operations:
119 */
120
121 static int msm_unload(struct drm_device *dev)
122 {
123 struct msm_drm_private *priv = dev->dev_private;
124 struct msm_kms *kms = priv->kms;
125 struct msm_gpu *gpu = priv->gpu;
126
127 drm_kms_helper_poll_fini(dev);
128 drm_mode_config_cleanup(dev);
129 drm_vblank_cleanup(dev);
130
131 pm_runtime_get_sync(dev->dev);
132 drm_irq_uninstall(dev);
133 pm_runtime_put_sync(dev->dev);
134
135 flush_workqueue(priv->wq);
136 destroy_workqueue(priv->wq);
137
138 if (kms) {
139 pm_runtime_disable(dev->dev);
140 kms->funcs->destroy(kms);
141 }
142
143 if (gpu) {
144 mutex_lock(&dev->struct_mutex);
145 gpu->funcs->pm_suspend(gpu);
146 gpu->funcs->destroy(gpu);
147 mutex_unlock(&dev->struct_mutex);
148 }
149
150 if (priv->vram.paddr) {
151 DEFINE_DMA_ATTRS(attrs);
152 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
153 drm_mm_takedown(&priv->vram.mm);
154 dma_free_attrs(dev->dev, priv->vram.size, NULL,
155 priv->vram.paddr, &attrs);
156 }
157
158 component_unbind_all(dev->dev, dev);
159
160 dev->dev_private = NULL;
161
162 kfree(priv);
163
164 return 0;
165 }
166
167 static int get_mdp_ver(struct platform_device *pdev)
168 {
169 #ifdef CONFIG_OF
170 static const struct of_device_id match_types[] = { {
171 .compatible = "qcom,mdss_mdp",
172 .data = (void *)5,
173 }, {
174 /* end node */
175 } };
176 struct device *dev = &pdev->dev;
177 const struct of_device_id *match;
178 match = of_match_node(match_types, dev->of_node);
179 if (match)
180 return (int)match->data;
181 #endif
182 return 4;
183 }
184
185 #include <linux/of_address.h>
186
187 static int msm_init_vram(struct drm_device *dev)
188 {
189 struct msm_drm_private *priv = dev->dev_private;
190 unsigned long size = 0;
191 int ret = 0;
192
193 #ifdef CONFIG_OF
194 /* In the device-tree world, we could have a 'memory-region'
195 * phandle, which gives us a link to our "vram". Allocating
196 * is all nicely abstracted behind the dma api, but we need
197 * to know the entire size to allocate it all in one go. There
198 * are two cases:
199 * 1) device with no IOMMU, in which case we need exclusive
200 * access to a VRAM carveout big enough for all gpu
201 * buffers
202 * 2) device with IOMMU, but where the bootloader puts up
203 * a splash screen. In this case, the VRAM carveout
204 * need only be large enough for fbdev fb. But we need
205 * exclusive access to the buffer to avoid the kernel
206 * using those pages for other purposes (which appears
207 * as corruption on screen before we have a chance to
208 * load and do initial modeset)
209 */
210 struct device_node *node;
211
212 node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
213 if (node) {
214 struct resource r;
215 ret = of_address_to_resource(node, 0, &r);
216 if (ret)
217 return ret;
218 size = r.end - r.start;
219 DRM_INFO("using VRAM carveout: %lx@%08x\n", size, r.start);
220 } else
221 #endif
222
223 /* if we have no IOMMU, then we need to use carveout allocator.
224 * Grab the entire CMA chunk carved out in early startup in
225 * mach-msm:
226 */
227 if (!iommu_present(&platform_bus_type)) {
228 DRM_INFO("using %s VRAM carveout\n", vram);
229 size = memparse(vram, NULL);
230 }
231
232 if (size) {
233 DEFINE_DMA_ATTRS(attrs);
234 void *p;
235
236 priv->vram.size = size;
237
238 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
239
240 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
241 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
242
243 /* note that for no-kernel-mapping, the vaddr returned
244 * is bogus, but non-null if allocation succeeded:
245 */
246 p = dma_alloc_attrs(dev->dev, size,
247 &priv->vram.paddr, GFP_KERNEL, &attrs);
248 if (!p) {
249 dev_err(dev->dev, "failed to allocate VRAM\n");
250 priv->vram.paddr = 0;
251 return -ENOMEM;
252 }
253
254 dev_info(dev->dev, "VRAM: %08x->%08x\n",
255 (uint32_t)priv->vram.paddr,
256 (uint32_t)(priv->vram.paddr + size));
257 }
258
259 return ret;
260 }
261
262 static int msm_load(struct drm_device *dev, unsigned long flags)
263 {
264 struct platform_device *pdev = dev->platformdev;
265 struct msm_drm_private *priv;
266 struct msm_kms *kms;
267 int ret;
268
269 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
270 if (!priv) {
271 dev_err(dev->dev, "failed to allocate private data\n");
272 return -ENOMEM;
273 }
274
275 dev->dev_private = priv;
276
277 priv->wq = alloc_ordered_workqueue("msm", 0);
278 init_waitqueue_head(&priv->fence_event);
279 init_waitqueue_head(&priv->pending_crtcs_event);
280
281 INIT_LIST_HEAD(&priv->inactive_list);
282 INIT_LIST_HEAD(&priv->fence_cbs);
283
284 drm_mode_config_init(dev);
285
286 ret = msm_init_vram(dev);
287 if (ret)
288 goto fail;
289
290 platform_set_drvdata(pdev, dev);
291
292 /* Bind all our sub-components: */
293 ret = component_bind_all(dev->dev, dev);
294 if (ret)
295 return ret;
296
297 switch (get_mdp_ver(pdev)) {
298 case 4:
299 kms = mdp4_kms_init(dev);
300 break;
301 case 5:
302 kms = mdp5_kms_init(dev);
303 break;
304 default:
305 kms = ERR_PTR(-ENODEV);
306 break;
307 }
308
309 if (IS_ERR(kms)) {
310 /*
311 * NOTE: once we have GPU support, having no kms should not
312 * be considered fatal.. ideally we would still support gpu
313 * and (for example) use dmabuf/prime to share buffers with
314 * imx drm driver on iMX5
315 */
316 dev_err(dev->dev, "failed to load kms\n");
317 ret = PTR_ERR(kms);
318 goto fail;
319 }
320
321 priv->kms = kms;
322
323 if (kms) {
324 pm_runtime_enable(dev->dev);
325 ret = kms->funcs->hw_init(kms);
326 if (ret) {
327 dev_err(dev->dev, "kms hw init failed: %d\n", ret);
328 goto fail;
329 }
330 }
331
332 dev->mode_config.min_width = 0;
333 dev->mode_config.min_height = 0;
334 dev->mode_config.max_width = 2048;
335 dev->mode_config.max_height = 2048;
336 dev->mode_config.funcs = &mode_config_funcs;
337
338 ret = drm_vblank_init(dev, priv->num_crtcs);
339 if (ret < 0) {
340 dev_err(dev->dev, "failed to initialize vblank\n");
341 goto fail;
342 }
343
344 pm_runtime_get_sync(dev->dev);
345 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
346 pm_runtime_put_sync(dev->dev);
347 if (ret < 0) {
348 dev_err(dev->dev, "failed to install IRQ handler\n");
349 goto fail;
350 }
351
352 drm_mode_config_reset(dev);
353
354 #ifdef CONFIG_DRM_MSM_FBDEV
355 if (fbdev)
356 priv->fbdev = msm_fbdev_init(dev);
357 #endif
358
359 ret = msm_debugfs_late_init(dev);
360 if (ret)
361 goto fail;
362
363 drm_kms_helper_poll_init(dev);
364
365 return 0;
366
367 fail:
368 msm_unload(dev);
369 return ret;
370 }
371
372 static void load_gpu(struct drm_device *dev)
373 {
374 static DEFINE_MUTEX(init_lock);
375 struct msm_drm_private *priv = dev->dev_private;
376
377 mutex_lock(&init_lock);
378
379 if (!priv->gpu)
380 priv->gpu = adreno_load_gpu(dev);
381
382 mutex_unlock(&init_lock);
383 }
384
385 static int msm_open(struct drm_device *dev, struct drm_file *file)
386 {
387 struct msm_file_private *ctx;
388
389 /* For now, load gpu on open.. to avoid the requirement of having
390 * firmware in the initrd.
391 */
392 load_gpu(dev);
393
394 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
395 if (!ctx)
396 return -ENOMEM;
397
398 file->driver_priv = ctx;
399
400 return 0;
401 }
402
403 static void msm_preclose(struct drm_device *dev, struct drm_file *file)
404 {
405 struct msm_drm_private *priv = dev->dev_private;
406 struct msm_file_private *ctx = file->driver_priv;
407 struct msm_kms *kms = priv->kms;
408
409 if (kms)
410 kms->funcs->preclose(kms, file);
411
412 mutex_lock(&dev->struct_mutex);
413 if (ctx == priv->lastctx)
414 priv->lastctx = NULL;
415 mutex_unlock(&dev->struct_mutex);
416
417 kfree(ctx);
418 }
419
420 static void msm_lastclose(struct drm_device *dev)
421 {
422 struct msm_drm_private *priv = dev->dev_private;
423 if (priv->fbdev)
424 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
425 }
426
427 static irqreturn_t msm_irq(int irq, void *arg)
428 {
429 struct drm_device *dev = arg;
430 struct msm_drm_private *priv = dev->dev_private;
431 struct msm_kms *kms = priv->kms;
432 BUG_ON(!kms);
433 return kms->funcs->irq(kms);
434 }
435
436 static void msm_irq_preinstall(struct drm_device *dev)
437 {
438 struct msm_drm_private *priv = dev->dev_private;
439 struct msm_kms *kms = priv->kms;
440 BUG_ON(!kms);
441 kms->funcs->irq_preinstall(kms);
442 }
443
444 static int msm_irq_postinstall(struct drm_device *dev)
445 {
446 struct msm_drm_private *priv = dev->dev_private;
447 struct msm_kms *kms = priv->kms;
448 BUG_ON(!kms);
449 return kms->funcs->irq_postinstall(kms);
450 }
451
452 static void msm_irq_uninstall(struct drm_device *dev)
453 {
454 struct msm_drm_private *priv = dev->dev_private;
455 struct msm_kms *kms = priv->kms;
456 BUG_ON(!kms);
457 kms->funcs->irq_uninstall(kms);
458 }
459
460 static int msm_enable_vblank(struct drm_device *dev, int crtc_id)
461 {
462 struct msm_drm_private *priv = dev->dev_private;
463 struct msm_kms *kms = priv->kms;
464 if (!kms)
465 return -ENXIO;
466 DBG("dev=%p, crtc=%d", dev, crtc_id);
467 return kms->funcs->enable_vblank(kms, priv->crtcs[crtc_id]);
468 }
469
470 static void msm_disable_vblank(struct drm_device *dev, int crtc_id)
471 {
472 struct msm_drm_private *priv = dev->dev_private;
473 struct msm_kms *kms = priv->kms;
474 if (!kms)
475 return;
476 DBG("dev=%p, crtc=%d", dev, crtc_id);
477 kms->funcs->disable_vblank(kms, priv->crtcs[crtc_id]);
478 }
479
480 /*
481 * DRM debugfs:
482 */
483
484 #ifdef CONFIG_DEBUG_FS
485 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
486 {
487 struct msm_drm_private *priv = dev->dev_private;
488 struct msm_gpu *gpu = priv->gpu;
489
490 if (gpu) {
491 seq_printf(m, "%s Status:\n", gpu->name);
492 gpu->funcs->show(gpu, m);
493 }
494
495 return 0;
496 }
497
498 static int msm_gem_show(struct drm_device *dev, struct seq_file *m)
499 {
500 struct msm_drm_private *priv = dev->dev_private;
501 struct msm_gpu *gpu = priv->gpu;
502
503 if (gpu) {
504 seq_printf(m, "Active Objects (%s):\n", gpu->name);
505 msm_gem_describe_objects(&gpu->active_list, m);
506 }
507
508 seq_printf(m, "Inactive Objects:\n");
509 msm_gem_describe_objects(&priv->inactive_list, m);
510
511 return 0;
512 }
513
514 static int msm_mm_show(struct drm_device *dev, struct seq_file *m)
515 {
516 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
517 }
518
519 static int msm_fb_show(struct drm_device *dev, struct seq_file *m)
520 {
521 struct msm_drm_private *priv = dev->dev_private;
522 struct drm_framebuffer *fb, *fbdev_fb = NULL;
523
524 if (priv->fbdev) {
525 seq_printf(m, "fbcon ");
526 fbdev_fb = priv->fbdev->fb;
527 msm_framebuffer_describe(fbdev_fb, m);
528 }
529
530 mutex_lock(&dev->mode_config.fb_lock);
531 list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
532 if (fb == fbdev_fb)
533 continue;
534
535 seq_printf(m, "user ");
536 msm_framebuffer_describe(fb, m);
537 }
538 mutex_unlock(&dev->mode_config.fb_lock);
539
540 return 0;
541 }
542
543 static int show_locked(struct seq_file *m, void *arg)
544 {
545 struct drm_info_node *node = (struct drm_info_node *) m->private;
546 struct drm_device *dev = node->minor->dev;
547 int (*show)(struct drm_device *dev, struct seq_file *m) =
548 node->info_ent->data;
549 int ret;
550
551 ret = mutex_lock_interruptible(&dev->struct_mutex);
552 if (ret)
553 return ret;
554
555 ret = show(dev, m);
556
557 mutex_unlock(&dev->struct_mutex);
558
559 return ret;
560 }
561
562 static struct drm_info_list msm_debugfs_list[] = {
563 {"gpu", show_locked, 0, msm_gpu_show},
564 {"gem", show_locked, 0, msm_gem_show},
565 { "mm", show_locked, 0, msm_mm_show },
566 { "fb", show_locked, 0, msm_fb_show },
567 };
568
569 static int late_init_minor(struct drm_minor *minor)
570 {
571 int ret;
572
573 if (!minor)
574 return 0;
575
576 ret = msm_rd_debugfs_init(minor);
577 if (ret) {
578 dev_err(minor->dev->dev, "could not install rd debugfs\n");
579 return ret;
580 }
581
582 ret = msm_perf_debugfs_init(minor);
583 if (ret) {
584 dev_err(minor->dev->dev, "could not install perf debugfs\n");
585 return ret;
586 }
587
588 return 0;
589 }
590
591 int msm_debugfs_late_init(struct drm_device *dev)
592 {
593 int ret;
594 ret = late_init_minor(dev->primary);
595 if (ret)
596 return ret;
597 ret = late_init_minor(dev->render);
598 if (ret)
599 return ret;
600 ret = late_init_minor(dev->control);
601 return ret;
602 }
603
604 static int msm_debugfs_init(struct drm_minor *minor)
605 {
606 struct drm_device *dev = minor->dev;
607 int ret;
608
609 ret = drm_debugfs_create_files(msm_debugfs_list,
610 ARRAY_SIZE(msm_debugfs_list),
611 minor->debugfs_root, minor);
612
613 if (ret) {
614 dev_err(dev->dev, "could not install msm_debugfs_list\n");
615 return ret;
616 }
617
618 return 0;
619 }
620
621 static void msm_debugfs_cleanup(struct drm_minor *minor)
622 {
623 drm_debugfs_remove_files(msm_debugfs_list,
624 ARRAY_SIZE(msm_debugfs_list), minor);
625 if (!minor->dev->dev_private)
626 return;
627 msm_rd_debugfs_cleanup(minor);
628 msm_perf_debugfs_cleanup(minor);
629 }
630 #endif
631
632 /*
633 * Fences:
634 */
635
636 int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
637 struct timespec *timeout)
638 {
639 struct msm_drm_private *priv = dev->dev_private;
640 int ret;
641
642 if (!priv->gpu)
643 return 0;
644
645 if (fence > priv->gpu->submitted_fence) {
646 DRM_ERROR("waiting on invalid fence: %u (of %u)\n",
647 fence, priv->gpu->submitted_fence);
648 return -EINVAL;
649 }
650
651 if (!timeout) {
652 /* no-wait: */
653 ret = fence_completed(dev, fence) ? 0 : -EBUSY;
654 } else {
655 unsigned long timeout_jiffies = timespec_to_jiffies(timeout);
656 unsigned long start_jiffies = jiffies;
657 unsigned long remaining_jiffies;
658
659 if (time_after(start_jiffies, timeout_jiffies))
660 remaining_jiffies = 0;
661 else
662 remaining_jiffies = timeout_jiffies - start_jiffies;
663
664 ret = wait_event_interruptible_timeout(priv->fence_event,
665 fence_completed(dev, fence),
666 remaining_jiffies);
667
668 if (ret == 0) {
669 DBG("timeout waiting for fence: %u (completed: %u)",
670 fence, priv->completed_fence);
671 ret = -ETIMEDOUT;
672 } else if (ret != -ERESTARTSYS) {
673 ret = 0;
674 }
675 }
676
677 return ret;
678 }
679
680 int msm_queue_fence_cb(struct drm_device *dev,
681 struct msm_fence_cb *cb, uint32_t fence)
682 {
683 struct msm_drm_private *priv = dev->dev_private;
684 int ret = 0;
685
686 mutex_lock(&dev->struct_mutex);
687 if (!list_empty(&cb->work.entry)) {
688 ret = -EINVAL;
689 } else if (fence > priv->completed_fence) {
690 cb->fence = fence;
691 list_add_tail(&cb->work.entry, &priv->fence_cbs);
692 } else {
693 queue_work(priv->wq, &cb->work);
694 }
695 mutex_unlock(&dev->struct_mutex);
696
697 return ret;
698 }
699
700 /* called from workqueue */
701 void msm_update_fence(struct drm_device *dev, uint32_t fence)
702 {
703 struct msm_drm_private *priv = dev->dev_private;
704
705 mutex_lock(&dev->struct_mutex);
706 priv->completed_fence = max(fence, priv->completed_fence);
707
708 while (!list_empty(&priv->fence_cbs)) {
709 struct msm_fence_cb *cb;
710
711 cb = list_first_entry(&priv->fence_cbs,
712 struct msm_fence_cb, work.entry);
713
714 if (cb->fence > priv->completed_fence)
715 break;
716
717 list_del_init(&cb->work.entry);
718 queue_work(priv->wq, &cb->work);
719 }
720
721 mutex_unlock(&dev->struct_mutex);
722
723 wake_up_all(&priv->fence_event);
724 }
725
726 void __msm_fence_worker(struct work_struct *work)
727 {
728 struct msm_fence_cb *cb = container_of(work, struct msm_fence_cb, work);
729 cb->func(cb);
730 }
731
732 /*
733 * DRM ioctls:
734 */
735
736 static int msm_ioctl_get_param(struct drm_device *dev, void *data,
737 struct drm_file *file)
738 {
739 struct msm_drm_private *priv = dev->dev_private;
740 struct drm_msm_param *args = data;
741 struct msm_gpu *gpu;
742
743 /* for now, we just have 3d pipe.. eventually this would need to
744 * be more clever to dispatch to appropriate gpu module:
745 */
746 if (args->pipe != MSM_PIPE_3D0)
747 return -EINVAL;
748
749 gpu = priv->gpu;
750
751 if (!gpu)
752 return -ENXIO;
753
754 return gpu->funcs->get_param(gpu, args->param, &args->value);
755 }
756
757 static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
758 struct drm_file *file)
759 {
760 struct drm_msm_gem_new *args = data;
761
762 if (args->flags & ~MSM_BO_FLAGS) {
763 DRM_ERROR("invalid flags: %08x\n", args->flags);
764 return -EINVAL;
765 }
766
767 return msm_gem_new_handle(dev, file, args->size,
768 args->flags, &args->handle);
769 }
770
771 #define TS(t) ((struct timespec){ .tv_sec = (t).tv_sec, .tv_nsec = (t).tv_nsec })
772
773 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
774 struct drm_file *file)
775 {
776 struct drm_msm_gem_cpu_prep *args = data;
777 struct drm_gem_object *obj;
778 int ret;
779
780 if (args->op & ~MSM_PREP_FLAGS) {
781 DRM_ERROR("invalid op: %08x\n", args->op);
782 return -EINVAL;
783 }
784
785 obj = drm_gem_object_lookup(dev, file, args->handle);
786 if (!obj)
787 return -ENOENT;
788
789 ret = msm_gem_cpu_prep(obj, args->op, &TS(args->timeout));
790
791 drm_gem_object_unreference_unlocked(obj);
792
793 return ret;
794 }
795
796 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
797 struct drm_file *file)
798 {
799 struct drm_msm_gem_cpu_fini *args = data;
800 struct drm_gem_object *obj;
801 int ret;
802
803 obj = drm_gem_object_lookup(dev, file, args->handle);
804 if (!obj)
805 return -ENOENT;
806
807 ret = msm_gem_cpu_fini(obj);
808
809 drm_gem_object_unreference_unlocked(obj);
810
811 return ret;
812 }
813
814 static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
815 struct drm_file *file)
816 {
817 struct drm_msm_gem_info *args = data;
818 struct drm_gem_object *obj;
819 int ret = 0;
820
821 if (args->pad)
822 return -EINVAL;
823
824 obj = drm_gem_object_lookup(dev, file, args->handle);
825 if (!obj)
826 return -ENOENT;
827
828 args->offset = msm_gem_mmap_offset(obj);
829
830 drm_gem_object_unreference_unlocked(obj);
831
832 return ret;
833 }
834
835 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
836 struct drm_file *file)
837 {
838 struct drm_msm_wait_fence *args = data;
839
840 if (args->pad) {
841 DRM_ERROR("invalid pad: %08x\n", args->pad);
842 return -EINVAL;
843 }
844
845 return msm_wait_fence_interruptable(dev, args->fence,
846 &TS(args->timeout));
847 }
848
849 static const struct drm_ioctl_desc msm_ioctls[] = {
850 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
851 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
852 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
853 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
854 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
855 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
856 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
857 };
858
859 static const struct vm_operations_struct vm_ops = {
860 .fault = msm_gem_fault,
861 .open = drm_gem_vm_open,
862 .close = drm_gem_vm_close,
863 };
864
865 static const struct file_operations fops = {
866 .owner = THIS_MODULE,
867 .open = drm_open,
868 .release = drm_release,
869 .unlocked_ioctl = drm_ioctl,
870 #ifdef CONFIG_COMPAT
871 .compat_ioctl = drm_compat_ioctl,
872 #endif
873 .poll = drm_poll,
874 .read = drm_read,
875 .llseek = no_llseek,
876 .mmap = msm_gem_mmap,
877 };
878
879 static struct drm_driver msm_driver = {
880 .driver_features = DRIVER_HAVE_IRQ |
881 DRIVER_GEM |
882 DRIVER_PRIME |
883 DRIVER_RENDER |
884 DRIVER_MODESET,
885 .load = msm_load,
886 .unload = msm_unload,
887 .open = msm_open,
888 .preclose = msm_preclose,
889 .lastclose = msm_lastclose,
890 .set_busid = drm_platform_set_busid,
891 .irq_handler = msm_irq,
892 .irq_preinstall = msm_irq_preinstall,
893 .irq_postinstall = msm_irq_postinstall,
894 .irq_uninstall = msm_irq_uninstall,
895 .get_vblank_counter = drm_vblank_count,
896 .enable_vblank = msm_enable_vblank,
897 .disable_vblank = msm_disable_vblank,
898 .gem_free_object = msm_gem_free_object,
899 .gem_vm_ops = &vm_ops,
900 .dumb_create = msm_gem_dumb_create,
901 .dumb_map_offset = msm_gem_dumb_map_offset,
902 .dumb_destroy = drm_gem_dumb_destroy,
903 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
904 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
905 .gem_prime_export = drm_gem_prime_export,
906 .gem_prime_import = drm_gem_prime_import,
907 .gem_prime_pin = msm_gem_prime_pin,
908 .gem_prime_unpin = msm_gem_prime_unpin,
909 .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
910 .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
911 .gem_prime_vmap = msm_gem_prime_vmap,
912 .gem_prime_vunmap = msm_gem_prime_vunmap,
913 .gem_prime_mmap = msm_gem_prime_mmap,
914 #ifdef CONFIG_DEBUG_FS
915 .debugfs_init = msm_debugfs_init,
916 .debugfs_cleanup = msm_debugfs_cleanup,
917 #endif
918 .ioctls = msm_ioctls,
919 .num_ioctls = DRM_MSM_NUM_IOCTLS,
920 .fops = &fops,
921 .name = "msm",
922 .desc = "MSM Snapdragon DRM",
923 .date = "20130625",
924 .major = 1,
925 .minor = 0,
926 };
927
928 #ifdef CONFIG_PM_SLEEP
929 static int msm_pm_suspend(struct device *dev)
930 {
931 struct drm_device *ddev = dev_get_drvdata(dev);
932
933 drm_kms_helper_poll_disable(ddev);
934
935 return 0;
936 }
937
938 static int msm_pm_resume(struct device *dev)
939 {
940 struct drm_device *ddev = dev_get_drvdata(dev);
941
942 drm_kms_helper_poll_enable(ddev);
943
944 return 0;
945 }
946 #endif
947
948 static const struct dev_pm_ops msm_pm_ops = {
949 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
950 };
951
952 /*
953 * Componentized driver support:
954 */
955
956 #ifdef CONFIG_OF
957 /* NOTE: the CONFIG_OF case duplicates the same code as exynos or imx
958 * (or probably any other).. so probably some room for some helpers
959 */
960 static int compare_of(struct device *dev, void *data)
961 {
962 return dev->of_node == data;
963 }
964
965 static int add_components(struct device *dev, struct component_match **matchptr,
966 const char *name)
967 {
968 struct device_node *np = dev->of_node;
969 unsigned i;
970
971 for (i = 0; ; i++) {
972 struct device_node *node;
973
974 node = of_parse_phandle(np, name, i);
975 if (!node)
976 break;
977
978 component_match_add(dev, matchptr, compare_of, node);
979 }
980
981 return 0;
982 }
983 #else
984 static int compare_dev(struct device *dev, void *data)
985 {
986 return dev == data;
987 }
988 #endif
989
990 static int msm_drm_bind(struct device *dev)
991 {
992 return drm_platform_init(&msm_driver, to_platform_device(dev));
993 }
994
995 static void msm_drm_unbind(struct device *dev)
996 {
997 drm_put_dev(platform_get_drvdata(to_platform_device(dev)));
998 }
999
1000 static const struct component_master_ops msm_drm_ops = {
1001 .bind = msm_drm_bind,
1002 .unbind = msm_drm_unbind,
1003 };
1004
1005 /*
1006 * Platform driver:
1007 */
1008
1009 static int msm_pdev_probe(struct platform_device *pdev)
1010 {
1011 struct component_match *match = NULL;
1012 #ifdef CONFIG_OF
1013 add_components(&pdev->dev, &match, "connectors");
1014 add_components(&pdev->dev, &match, "gpus");
1015 #else
1016 /* For non-DT case, it kinda sucks. We don't actually have a way
1017 * to know whether or not we are waiting for certain devices (or if
1018 * they are simply not present). But for non-DT we only need to
1019 * care about apq8064/apq8060/etc (all mdp4/a3xx):
1020 */
1021 static const char *devnames[] = {
1022 "hdmi_msm.0", "kgsl-3d0.0",
1023 };
1024 int i;
1025
1026 DBG("Adding components..");
1027
1028 for (i = 0; i < ARRAY_SIZE(devnames); i++) {
1029 struct device *dev;
1030
1031 dev = bus_find_device_by_name(&platform_bus_type,
1032 NULL, devnames[i]);
1033 if (!dev) {
1034 dev_info(&pdev->dev, "still waiting for %s\n", devnames[i]);
1035 return -EPROBE_DEFER;
1036 }
1037
1038 component_match_add(&pdev->dev, &match, compare_dev, dev);
1039 }
1040 #endif
1041
1042 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
1043 return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
1044 }
1045
1046 static int msm_pdev_remove(struct platform_device *pdev)
1047 {
1048 component_master_del(&pdev->dev, &msm_drm_ops);
1049
1050 return 0;
1051 }
1052
1053 static const struct platform_device_id msm_id[] = {
1054 { "mdp", 0 },
1055 { }
1056 };
1057
1058 static const struct of_device_id dt_match[] = {
1059 { .compatible = "qcom,mdp" }, /* mdp4 */
1060 { .compatible = "qcom,mdss_mdp" }, /* mdp5 */
1061 {}
1062 };
1063 MODULE_DEVICE_TABLE(of, dt_match);
1064
1065 static struct platform_driver msm_platform_driver = {
1066 .probe = msm_pdev_probe,
1067 .remove = msm_pdev_remove,
1068 .driver = {
1069 .name = "msm",
1070 .of_match_table = dt_match,
1071 .pm = &msm_pm_ops,
1072 },
1073 .id_table = msm_id,
1074 };
1075
1076 static int __init msm_drm_register(void)
1077 {
1078 DBG("init");
1079 msm_dsi_register();
1080 msm_edp_register();
1081 hdmi_register();
1082 adreno_register();
1083 return platform_driver_register(&msm_platform_driver);
1084 }
1085
1086 static void __exit msm_drm_unregister(void)
1087 {
1088 DBG("fini");
1089 platform_driver_unregister(&msm_platform_driver);
1090 hdmi_unregister();
1091 adreno_unregister();
1092 msm_edp_unregister();
1093 msm_dsi_unregister();
1094 }
1095
1096 module_init(msm_drm_register);
1097 module_exit(msm_drm_unregister);
1098
1099 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
1100 MODULE_DESCRIPTION("MSM DRM Driver");
1101 MODULE_LICENSE("GPL");
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