drivers/gpu/drm/msm/msm_drv.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "msm_drv.h"
  19 #include "msm_debugfs.h"
  20 #include "msm_fence.h"
  21 #include "msm_gpu.h"
  22 #include "msm_kms.h"
  23
  24 static void msm_fb_output_poll_changed(struct drm_device *dev)
  25 {
  26         struct msm_drm_private *priv = dev->dev_private;
  27         if (priv->fbdev)
  28                 drm_fb_helper_hotplug_event(priv->fbdev);
  29 }
  30
  31 static const struct drm_mode_config_funcs mode_config_funcs = {
  32         .fb_create = msm_framebuffer_create,
  33         .output_poll_changed = msm_fb_output_poll_changed,
  34         .atomic_check = msm_atomic_check,
  35         .atomic_commit = msm_atomic_commit,
  36 };
  37
  38 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu)
  39 {
  40         struct msm_drm_private *priv = dev->dev_private;
  41         int idx = priv->num_mmus++;
  42
  43         if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus)))
  44                 return -EINVAL;
  45
  46         priv->mmus[idx] = mmu;
  47
  48         return idx;
  49 }
  50
  51 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
  52 static bool reglog = false;
  53 MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  54 module_param(reglog, bool, 0600);
  55 #else
  56 #define reglog 0
  57 #endif
  58
  59 #ifdef CONFIG_DRM_FBDEV_EMULATION
  60 static bool fbdev = true;
  61 MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  62 module_param(fbdev, bool, 0600);
  63 #endif
  64
  65 static char *vram = "16m";
  66 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
  67 module_param(vram, charp, 0);
  68
  69 /*
  70  * Util/helpers:
  71  */
  72
  73 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  74                 const char *dbgname)
  75 {
  76         struct resource *res;
  77         unsigned long size;
  78         void __iomem *ptr;
  79
  80         if (name)
  81                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  82         else
  83                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  84
  85         if (!res) {
  86                 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
  87                 return ERR_PTR(-EINVAL);
  88         }
  89
  90         size = resource_size(res);
  91
  92         ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
  93         if (!ptr) {
  94                 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
  95                 return ERR_PTR(-ENOMEM);
  96         }
  97
  98         if (reglog)
  99                 printk(KERN_DEBUG "IO:region %s %p %08lx\n", dbgname, ptr, size);
 100
 101         return ptr;
 102 }
 103
 104 void msm_writel(u32 data, void __iomem *addr)
 105 {
 106         if (reglog)
 107                 printk(KERN_DEBUG "IO:W %p %08x\n", addr, data);
 108         writel(data, addr);
 109 }
 110
 111 u32 msm_readl(const void __iomem *addr)
 112 {
 113         u32 val = readl(addr);
 114         if (reglog)
 115                 printk(KERN_ERR "IO:R %p %08x\n", addr, val);
 116         return val;
 117 }
 118
 119 struct vblank_event {
 120         struct list_head node;
 121         int crtc_id;
 122         bool enable;
 123 };
 124
 125 static void vblank_ctrl_worker(struct work_struct *work)
 126 {
 127         struct msm_vblank_ctrl *vbl_ctrl = container_of(work,
 128                                                 struct msm_vblank_ctrl, work);
 129         struct msm_drm_private *priv = container_of(vbl_ctrl,
 130                                         struct msm_drm_private, vblank_ctrl);
 131         struct msm_kms *kms = priv->kms;
 132         struct vblank_event *vbl_ev, *tmp;
 133         unsigned long flags;
 134
 135         spin_lock_irqsave(&vbl_ctrl->lock, flags);
 136         list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
 137                 list_del(&vbl_ev->node);
 138                 spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 139
 140                 if (vbl_ev->enable)
 141                         kms->funcs->enable_vblank(kms,
 142                                                 priv->crtcs[vbl_ev->crtc_id]);
 143                 else
 144                         kms->funcs->disable_vblank(kms,
 145                                                 priv->crtcs[vbl_ev->crtc_id]);
 146
 147                 kfree(vbl_ev);
 148
 149                 spin_lock_irqsave(&vbl_ctrl->lock, flags);
 150         }
 151
 152         spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 153 }
 154
 155 static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
 156                                         int crtc_id, bool enable)
 157 {
 158         struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
 159         struct vblank_event *vbl_ev;
 160         unsigned long flags;
 161
 162         vbl_ev = kzalloc(sizeof(*vbl_ev), GFP_ATOMIC);
 163         if (!vbl_ev)
 164                 return -ENOMEM;
 165
 166         vbl_ev->crtc_id = crtc_id;
 167         vbl_ev->enable = enable;
 168
 169         spin_lock_irqsave(&vbl_ctrl->lock, flags);
 170         list_add_tail(&vbl_ev->node, &vbl_ctrl->event_list);
 171         spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 172
 173         queue_work(priv->wq, &vbl_ctrl->work);
 174
 175         return 0;
 176 }
 177
 178 static int msm_drm_uninit(struct device *dev)
 179 {
 180         struct platform_device *pdev = to_platform_device(dev);
 181         struct drm_device *ddev = platform_get_drvdata(pdev);
 182         struct msm_drm_private *priv = ddev->dev_private;
 183         struct msm_kms *kms = priv->kms;
 184         struct msm_gpu *gpu = priv->gpu;
 185         struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
 186         struct vblank_event *vbl_ev, *tmp;
 187
 188         /* We must cancel and cleanup any pending vblank enable/disable
 189          * work before drm_irq_uninstall() to avoid work re-enabling an
 190          * irq after uninstall has disabled it.
 191          */
 192         cancel_work_sync(&vbl_ctrl->work);
 193         list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
 194                 list_del(&vbl_ev->node);
 195                 kfree(vbl_ev);
 196         }
 197
 198         drm_kms_helper_poll_fini(ddev);
 199
 200         drm_dev_unregister(ddev);
 201
 202 #ifdef CONFIG_DRM_FBDEV_EMULATION
 203         if (fbdev && priv->fbdev)
 204                 msm_fbdev_free(ddev);
 205 #endif
 206         drm_mode_config_cleanup(ddev);
 207
 208         pm_runtime_get_sync(dev);
 209         drm_irq_uninstall(ddev);
 210         pm_runtime_put_sync(dev);
 211
 212         flush_workqueue(priv->wq);
 213         destroy_workqueue(priv->wq);
 214
 215         flush_workqueue(priv->atomic_wq);
 216         destroy_workqueue(priv->atomic_wq);
 217
 218         if (kms) {
 219                 pm_runtime_disable(dev);
 220                 kms->funcs->destroy(kms);
 221         }
 222
 223         if (gpu) {
 224                 mutex_lock(&ddev->struct_mutex);
 225                 gpu->funcs->pm_suspend(gpu);
 226                 mutex_unlock(&ddev->struct_mutex);
 227                 gpu->funcs->destroy(gpu);
 228         }
 229
 230         if (priv->vram.paddr) {
 231                 DEFINE_DMA_ATTRS(attrs);
 232                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
 233                 drm_mm_takedown(&priv->vram.mm);
 234                 dma_free_attrs(dev, priv->vram.size, NULL,
 235                                priv->vram.paddr, &attrs);
 236         }
 237
 238         component_unbind_all(dev, ddev);
 239
 240         ddev->dev_private = NULL;
 241         drm_dev_unref(ddev);
 242
 243         kfree(priv);
 244
 245         return 0;
 246 }
 247
 248 static int get_mdp_ver(struct platform_device *pdev)
 249 {
 250         struct device *dev = &pdev->dev;
 251
 252         return (int) (unsigned long) of_device_get_match_data(dev);
 253 }
 254
 255 #include <linux/of_address.h>
 256
 257 static int msm_init_vram(struct drm_device *dev)
 258 {
 259         struct msm_drm_private *priv = dev->dev_private;
 260         struct device_node *node;
 261         unsigned long size = 0;
 262         int ret = 0;
 263
 264         /* In the device-tree world, we could have a 'memory-region'
 265          * phandle, which gives us a link to our "vram".  Allocating
 266          * is all nicely abstracted behind the dma api, but we need
 267          * to know the entire size to allocate it all in one go. There
 268          * are two cases:
 269          *  1) device with no IOMMU, in which case we need exclusive
 270          *     access to a VRAM carveout big enough for all gpu
 271          *     buffers
 272          *  2) device with IOMMU, but where the bootloader puts up
 273          *     a splash screen.  In this case, the VRAM carveout
 274          *     need only be large enough for fbdev fb.  But we need
 275          *     exclusive access to the buffer to avoid the kernel
 276          *     using those pages for other purposes (which appears
 277          *     as corruption on screen before we have a chance to
 278          *     load and do initial modeset)
 279          */
 280
 281         node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
 282         if (node) {
 283                 struct resource r;
 284                 ret = of_address_to_resource(node, 0, &r);
 285                 if (ret)
 286                         return ret;
 287                 size = r.end - r.start;
 288                 DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
 289
 290                 /* if we have no IOMMU, then we need to use carveout allocator.
 291                  * Grab the entire CMA chunk carved out in early startup in
 292                  * mach-msm:
 293                  */
 294         } else if (!iommu_present(&platform_bus_type)) {
 295                 DRM_INFO("using %s VRAM carveout\n", vram);
 296                 size = memparse(vram, NULL);
 297         }
 298
 299         if (size) {
 300                 DEFINE_DMA_ATTRS(attrs);
 301                 void *p;
 302
 303                 priv->vram.size = size;
 304
 305                 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
 306
 307                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
 308                 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
 309
 310                 /* note that for no-kernel-mapping, the vaddr returned
 311                  * is bogus, but non-null if allocation succeeded:
 312                  */
 313                 p = dma_alloc_attrs(dev->dev, size,
 314                                 &priv->vram.paddr, GFP_KERNEL, &attrs);
 315                 if (!p) {
 316                         dev_err(dev->dev, "failed to allocate VRAM\n");
 317                         priv->vram.paddr = 0;
 318                         return -ENOMEM;
 319                 }
 320
 321                 dev_info(dev->dev, "VRAM: %08x->%08x\n",
 322                                 (uint32_t)priv->vram.paddr,
 323                                 (uint32_t)(priv->vram.paddr + size));
 324         }
 325
 326         return ret;
 327 }
 328
 329 static int msm_drm_init(struct device *dev, struct drm_driver *drv)
 330 {
 331         struct platform_device *pdev = to_platform_device(dev);
 332         struct drm_device *ddev;
 333         struct msm_drm_private *priv;
 334         struct msm_kms *kms;
 335         int ret;
 336
 337         ddev = drm_dev_alloc(drv, dev);
 338         if (!ddev) {
 339                 dev_err(dev, "failed to allocate drm_device\n");
 340                 return -ENOMEM;
 341         }
 342
 343         platform_set_drvdata(pdev, ddev);
 344         ddev->platformdev = pdev;
 345
 346         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 347         if (!priv) {
 348                 drm_dev_unref(ddev);
 349                 return -ENOMEM;
 350         }
 351
 352         ddev->dev_private = priv;
 353
 354         priv->wq = alloc_ordered_workqueue("msm", 0);
 355         priv->atomic_wq = alloc_ordered_workqueue("msm:atomic", 0);
 356         init_waitqueue_head(&priv->pending_crtcs_event);
 357
 358         INIT_LIST_HEAD(&priv->inactive_list);
 359         INIT_LIST_HEAD(&priv->vblank_ctrl.event_list);
 360         INIT_WORK(&priv->vblank_ctrl.work, vblank_ctrl_worker);
 361         spin_lock_init(&priv->vblank_ctrl.lock);
 362
 363         drm_mode_config_init(ddev);
 364
 365         /* Bind all our sub-components: */
 366         ret = component_bind_all(dev, ddev);
 367         if (ret) {
 368                 kfree(priv);
 369                 drm_dev_unref(ddev);
 370                 return ret;
 371         }
 372
 373         ret = msm_init_vram(ddev);
 374         if (ret)
 375                 goto fail;
 376
 377         switch (get_mdp_ver(pdev)) {
 378         case 4:
 379                 kms = mdp4_kms_init(ddev);
 380                 break;
 381         case 5:
 382                 kms = mdp5_kms_init(ddev);
 383                 break;
 384         default:
 385                 kms = ERR_PTR(-ENODEV);
 386                 break;
 387         }
 388
 389         if (IS_ERR(kms)) {
 390                 /*
 391                  * NOTE: once we have GPU support, having no kms should not
 392                  * be considered fatal.. ideally we would still support gpu
 393                  * and (for example) use dmabuf/prime to share buffers with
 394                  * imx drm driver on iMX5
 395                  */
 396                 dev_err(dev, "failed to load kms\n");
 397                 ret = PTR_ERR(kms);
 398                 goto fail;
 399         }
 400
 401         priv->kms = kms;
 402
 403         if (kms) {
 404                 pm_runtime_enable(dev);
 405                 ret = kms->funcs->hw_init(kms);
 406                 if (ret) {
 407                         dev_err(dev, "kms hw init failed: %d\n", ret);
 408                         goto fail;
 409                 }
 410         }
 411
 412         ddev->mode_config.funcs = &mode_config_funcs;
 413
 414         ret = drm_vblank_init(ddev, priv->num_crtcs);
 415         if (ret < 0) {
 416                 dev_err(dev, "failed to initialize vblank\n");
 417                 goto fail;
 418         }
 419
 420         pm_runtime_get_sync(dev);
 421         ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
 422         pm_runtime_put_sync(dev);
 423         if (ret < 0) {
 424                 dev_err(dev, "failed to install IRQ handler\n");
 425                 goto fail;
 426         }
 427
 428         ret = drm_dev_register(ddev, 0);
 429         if (ret)
 430                 goto fail;
 431
 432         drm_mode_config_reset(ddev);
 433
 434 #ifdef CONFIG_DRM_FBDEV_EMULATION
 435         if (fbdev)
 436                 priv->fbdev = msm_fbdev_init(ddev);
 437 #endif
 438
 439         ret = msm_debugfs_late_init(ddev);
 440         if (ret)
 441                 goto fail;
 442
 443         drm_kms_helper_poll_init(ddev);
 444
 445         return 0;
 446
 447 fail:
 448         msm_drm_uninit(dev);
 449         return ret;
 450 }
 451
 452 /*
 453  * DRM operations:
 454  */
 455
 456 static void load_gpu(struct drm_device *dev)
 457 {
 458         static DEFINE_MUTEX(init_lock);
 459         struct msm_drm_private *priv = dev->dev_private;
 460
 461         mutex_lock(&init_lock);
 462
 463         if (!priv->gpu)
 464                 priv->gpu = adreno_load_gpu(dev);
 465
 466         mutex_unlock(&init_lock);
 467 }
 468
 469 static int msm_open(struct drm_device *dev, struct drm_file *file)
 470 {
 471         struct msm_file_private *ctx;
 472
 473         /* For now, load gpu on open.. to avoid the requirement of having
 474          * firmware in the initrd.
 475          */
 476         load_gpu(dev);
 477
 478         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 479         if (!ctx)
 480                 return -ENOMEM;
 481
 482         file->driver_priv = ctx;
 483
 484         return 0;
 485 }
 486
 487 static void msm_preclose(struct drm_device *dev, struct drm_file *file)
 488 {
 489         struct msm_drm_private *priv = dev->dev_private;
 490         struct msm_file_private *ctx = file->driver_priv;
 491
 492         mutex_lock(&dev->struct_mutex);
 493         if (ctx == priv->lastctx)
 494                 priv->lastctx = NULL;
 495         mutex_unlock(&dev->struct_mutex);
 496
 497         kfree(ctx);
 498 }
 499
 500 static void msm_lastclose(struct drm_device *dev)
 501 {
 502         struct msm_drm_private *priv = dev->dev_private;
 503         if (priv->fbdev)
 504                 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 505 }
 506
 507 static irqreturn_t msm_irq(int irq, void *arg)
 508 {
 509         struct drm_device *dev = arg;
 510         struct msm_drm_private *priv = dev->dev_private;
 511         struct msm_kms *kms = priv->kms;
 512         BUG_ON(!kms);
 513         return kms->funcs->irq(kms);
 514 }
 515
 516 static void msm_irq_preinstall(struct drm_device *dev)
 517 {
 518         struct msm_drm_private *priv = dev->dev_private;
 519         struct msm_kms *kms = priv->kms;
 520         BUG_ON(!kms);
 521         kms->funcs->irq_preinstall(kms);
 522 }
 523
 524 static int msm_irq_postinstall(struct drm_device *dev)
 525 {
 526         struct msm_drm_private *priv = dev->dev_private;
 527         struct msm_kms *kms = priv->kms;
 528         BUG_ON(!kms);
 529         return kms->funcs->irq_postinstall(kms);
 530 }
 531
 532 static void msm_irq_uninstall(struct drm_device *dev)
 533 {
 534         struct msm_drm_private *priv = dev->dev_private;
 535         struct msm_kms *kms = priv->kms;
 536         BUG_ON(!kms);
 537         kms->funcs->irq_uninstall(kms);
 538 }
 539
 540 static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
 541 {
 542         struct msm_drm_private *priv = dev->dev_private;
 543         struct msm_kms *kms = priv->kms;
 544         if (!kms)
 545                 return -ENXIO;
 546         DBG("dev=%p, crtc=%u", dev, pipe);
 547         return vblank_ctrl_queue_work(priv, pipe, true);
 548 }
 549
 550 static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
 551 {
 552         struct msm_drm_private *priv = dev->dev_private;
 553         struct msm_kms *kms = priv->kms;
 554         if (!kms)
 555                 return;
 556         DBG("dev=%p, crtc=%u", dev, pipe);
 557         vblank_ctrl_queue_work(priv, pipe, false);
 558 }
 559
 560 /*
 561  * DRM ioctls:
 562  */
 563
 564 static int msm_ioctl_get_param(struct drm_device *dev, void *data,
 565                 struct drm_file *file)
 566 {
 567         struct msm_drm_private *priv = dev->dev_private;
 568         struct drm_msm_param *args = data;
 569         struct msm_gpu *gpu;
 570
 571         /* for now, we just have 3d pipe.. eventually this would need to
 572          * be more clever to dispatch to appropriate gpu module:
 573          */
 574         if (args->pipe != MSM_PIPE_3D0)
 575                 return -EINVAL;
 576
 577         gpu = priv->gpu;
 578
 579         if (!gpu)
 580                 return -ENXIO;
 581
 582         return gpu->funcs->get_param(gpu, args->param, &args->value);
 583 }
 584
 585 static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
 586                 struct drm_file *file)
 587 {
 588         struct drm_msm_gem_new *args = data;
 589
 590         if (args->flags & ~MSM_BO_FLAGS) {
 591                 DRM_ERROR("invalid flags: %08x\n", args->flags);
 592                 return -EINVAL;
 593         }
 594
 595         return msm_gem_new_handle(dev, file, args->size,
 596                         args->flags, &args->handle);
 597 }
 598
 599 static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
 600 {
 601         return ktime_set(timeout.tv_sec, timeout.tv_nsec);
 602 }
 603
 604 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 605                 struct drm_file *file)
 606 {
 607         struct drm_msm_gem_cpu_prep *args = data;
 608         struct drm_gem_object *obj;
 609         ktime_t timeout = to_ktime(args->timeout);
 610         int ret;
 611
 612         if (args->op & ~MSM_PREP_FLAGS) {
 613                 DRM_ERROR("invalid op: %08x\n", args->op);
 614                 return -EINVAL;
 615         }
 616
 617         obj = drm_gem_object_lookup(file, args->handle);
 618         if (!obj)
 619                 return -ENOENT;
 620
 621         ret = msm_gem_cpu_prep(obj, args->op, &timeout);
 622
 623         drm_gem_object_unreference_unlocked(obj);
 624
 625         return ret;
 626 }
 627
 628 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 629                 struct drm_file *file)
 630 {
 631         struct drm_msm_gem_cpu_fini *args = data;
 632         struct drm_gem_object *obj;
 633         int ret;
 634
 635         obj = drm_gem_object_lookup(file, args->handle);
 636         if (!obj)
 637                 return -ENOENT;
 638
 639         ret = msm_gem_cpu_fini(obj);
 640
 641         drm_gem_object_unreference_unlocked(obj);
 642
 643         return ret;
 644 }
 645
 646 static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
 647                 struct drm_file *file)
 648 {
 649         struct drm_msm_gem_info *args = data;
 650         struct drm_gem_object *obj;
 651         int ret = 0;
 652
 653         if (args->pad)
 654                 return -EINVAL;
 655
 656         obj = drm_gem_object_lookup(file, args->handle);
 657         if (!obj)
 658                 return -ENOENT;
 659
 660         args->offset = msm_gem_mmap_offset(obj);
 661
 662         drm_gem_object_unreference_unlocked(obj);
 663
 664         return ret;
 665 }
 666
 667 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
 668                 struct drm_file *file)
 669 {
 670         struct msm_drm_private *priv = dev->dev_private;
 671         struct drm_msm_wait_fence *args = data;
 672         ktime_t timeout = to_ktime(args->timeout);
 673
 674         if (args->pad) {
 675                 DRM_ERROR("invalid pad: %08x\n", args->pad);
 676                 return -EINVAL;
 677         }
 678
 679         if (!priv->gpu)
 680                 return 0;
 681
 682         return msm_wait_fence(priv->gpu->fctx, args->fence, &timeout, true);
 683 }
 684
 685 static const struct drm_ioctl_desc msm_ioctls[] = {
 686         DRM_IOCTL_DEF_DRV(MSM_GET_PARAM,    msm_ioctl_get_param,    DRM_AUTH|DRM_RENDER_ALLOW),
 687         DRM_IOCTL_DEF_DRV(MSM_GEM_NEW,      msm_ioctl_gem_new,      DRM_AUTH|DRM_RENDER_ALLOW),
 688         DRM_IOCTL_DEF_DRV(MSM_GEM_INFO,     msm_ioctl_gem_info,     DRM_AUTH|DRM_RENDER_ALLOW),
 689         DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
 690         DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
 691         DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT,   msm_ioctl_gem_submit,   DRM_AUTH|DRM_RENDER_ALLOW),
 692         DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE,   msm_ioctl_wait_fence,   DRM_AUTH|DRM_RENDER_ALLOW),
 693 };
 694
 695 static const struct vm_operations_struct vm_ops = {
 696         .fault = msm_gem_fault,
 697         .open = drm_gem_vm_open,
 698         .close = drm_gem_vm_close,
 699 };
 700
 701 static const struct file_operations fops = {
 702         .owner              = THIS_MODULE,
 703         .open               = drm_open,
 704         .release            = drm_release,
 705         .unlocked_ioctl     = drm_ioctl,
 706 #ifdef CONFIG_COMPAT
 707         .compat_ioctl       = drm_compat_ioctl,
 708 #endif
 709         .poll               = drm_poll,
 710         .read               = drm_read,
 711         .llseek             = no_llseek,
 712         .mmap               = msm_gem_mmap,
 713 };
 714
 715 static struct drm_driver msm_driver = {
 716         .driver_features    = DRIVER_HAVE_IRQ |
 717                                 DRIVER_GEM |
 718                                 DRIVER_PRIME |
 719                                 DRIVER_RENDER |
 720                                 DRIVER_ATOMIC |
 721                                 DRIVER_MODESET,
 722         .open               = msm_open,
 723         .preclose           = msm_preclose,
 724         .lastclose          = msm_lastclose,
 725         .irq_handler        = msm_irq,
 726         .irq_preinstall     = msm_irq_preinstall,
 727         .irq_postinstall    = msm_irq_postinstall,
 728         .irq_uninstall      = msm_irq_uninstall,
 729         .get_vblank_counter = drm_vblank_no_hw_counter,
 730         .enable_vblank      = msm_enable_vblank,
 731         .disable_vblank     = msm_disable_vblank,
 732         .gem_free_object    = msm_gem_free_object,
 733         .gem_vm_ops         = &vm_ops,
 734         .dumb_create        = msm_gem_dumb_create,
 735         .dumb_map_offset    = msm_gem_dumb_map_offset,
 736         .dumb_destroy       = drm_gem_dumb_destroy,
 737         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 738         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 739         .gem_prime_export   = drm_gem_prime_export,
 740         .gem_prime_import   = drm_gem_prime_import,
 741         .gem_prime_pin      = msm_gem_prime_pin,
 742         .gem_prime_unpin    = msm_gem_prime_unpin,
 743         .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
 744         .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
 745         .gem_prime_vmap     = msm_gem_prime_vmap,
 746         .gem_prime_vunmap   = msm_gem_prime_vunmap,
 747         .gem_prime_mmap     = msm_gem_prime_mmap,
 748 #ifdef CONFIG_DEBUG_FS
 749         .debugfs_init       = msm_debugfs_init,
 750         .debugfs_cleanup    = msm_debugfs_cleanup,
 751 #endif
 752         .ioctls             = msm_ioctls,
 753         .num_ioctls         = DRM_MSM_NUM_IOCTLS,
 754         .fops               = &fops,
 755         .name               = "msm",
 756         .desc               = "MSM Snapdragon DRM",
 757         .date               = "20130625",
 758         .major              = 1,
 759         .minor              = 0,
 760 };
 761
 762 #ifdef CONFIG_PM_SLEEP
 763 static int msm_pm_suspend(struct device *dev)
 764 {
 765         struct drm_device *ddev = dev_get_drvdata(dev);
 766
 767         drm_kms_helper_poll_disable(ddev);
 768
 769         return 0;
 770 }
 771
 772 static int msm_pm_resume(struct device *dev)
 773 {
 774         struct drm_device *ddev = dev_get_drvdata(dev);
 775
 776         drm_kms_helper_poll_enable(ddev);
 777
 778         return 0;
 779 }
 780 #endif
 781
 782 static const struct dev_pm_ops msm_pm_ops = {
 783         SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
 784 };
 785
 786 /*
 787  * Componentized driver support:
 788  */
 789
 790 /*
 791  * NOTE: duplication of the same code as exynos or imx (or probably any other).
 792  * so probably some room for some helpers
 793  */
 794 static int compare_of(struct device *dev, void *data)
 795 {
 796         return dev->of_node == data;
 797 }
 798
 799 static int add_components(struct device *dev, struct component_match **matchptr,
 800                 const char *name)
 801 {
 802         struct device_node *np = dev->of_node;
 803         unsigned i;
 804
 805         for (i = 0; ; i++) {
 806                 struct device_node *node;
 807
 808                 node = of_parse_phandle(np, name, i);
 809                 if (!node)
 810                         break;
 811
 812                 component_match_add(dev, matchptr, compare_of, node);
 813         }
 814
 815         return 0;
 816 }
 817
 818 static int msm_drm_bind(struct device *dev)
 819 {
 820         return msm_drm_init(dev, &msm_driver);
 821 }
 822
 823 static void msm_drm_unbind(struct device *dev)
 824 {
 825         msm_drm_uninit(dev);
 826 }
 827
 828 static const struct component_master_ops msm_drm_ops = {
 829         .bind = msm_drm_bind,
 830         .unbind = msm_drm_unbind,
 831 };
 832
 833 /*
 834  * Platform driver:
 835  */
 836
 837 static int msm_pdev_probe(struct platform_device *pdev)
 838 {
 839         struct component_match *match = NULL;
 840
 841         add_components(&pdev->dev, &match, "connectors");
 842         add_components(&pdev->dev, &match, "gpus");
 843
 844         pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
 845         return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
 846 }
 847
 848 static int msm_pdev_remove(struct platform_device *pdev)
 849 {
 850         component_master_del(&pdev->dev, &msm_drm_ops);
 851
 852         return 0;
 853 }
 854
 855 static const struct platform_device_id msm_id[] = {
 856         { "mdp", 0 },
 857         { }
 858 };
 859
 860 static const struct of_device_id dt_match[] = {
 861         { .compatible = "qcom,mdp4", .data = (void *) 4 },      /* mdp4 */
 862         { .compatible = "qcom,mdp5", .data = (void *) 5 },      /* mdp5 */
 863         /* to support downstream DT files */
 864         { .compatible = "qcom,mdss_mdp", .data = (void *) 5 },  /* mdp5 */
 865         {}
 866 };
 867 MODULE_DEVICE_TABLE(of, dt_match);
 868
 869 static struct platform_driver msm_platform_driver = {
 870         .probe      = msm_pdev_probe,
 871         .remove     = msm_pdev_remove,
 872         .driver     = {
 873                 .name   = "msm",
 874                 .of_match_table = dt_match,
 875                 .pm     = &msm_pm_ops,
 876         },
 877         .id_table   = msm_id,
 878 };
 879
 880 static int __init msm_drm_register(void)
 881 {
 882         DBG("init");
 883         msm_dsi_register();
 884         msm_edp_register();
 885         msm_hdmi_register();
 886         adreno_register();
 887         return platform_driver_register(&msm_platform_driver);
 888 }
 889
 890 static void __exit msm_drm_unregister(void)
 891 {
 892         DBG("fini");
 893         platform_driver_unregister(&msm_platform_driver);
 894         msm_hdmi_unregister();
 895         adreno_unregister();
 896         msm_edp_unregister();
 897         msm_dsi_unregister();
 898 }
 899
 900 module_init(msm_drm_register);
 901 module_exit(msm_drm_unregister);
 902
 903 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 904 MODULE_DESCRIPTION("MSM DRM Driver");
 905 MODULE_LICENSE("GPL");