f849b698d942f6ffb12d23880e147d307790c061
[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / copy / nva3.c
1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25 #include <core/falcon.h>
26 #include <core/class.h>
27 #include <core/enum.h>
28
29 #include <subdev/fb.h>
30 #include <subdev/vm.h>
31
32 #include <engine/fifo.h>
33 #include <engine/copy.h>
34
35 #include "fuc/nva3.fuc.h"
36
37 struct nva3_copy_priv {
38 struct nouveau_falcon base;
39 };
40
41 struct nva3_copy_chan {
42 struct nouveau_falcon_chan base;
43 };
44
45 /*******************************************************************************
46 * Copy object classes
47 ******************************************************************************/
48
49 static struct nouveau_oclass
50 nva3_copy_sclass[] = {
51 { 0x85b5, &nouveau_object_ofuncs },
52 {}
53 };
54
55 /*******************************************************************************
56 * PCOPY context
57 ******************************************************************************/
58
59 static int
60 nva3_copy_context_ctor(struct nouveau_object *parent,
61 struct nouveau_object *engine,
62 struct nouveau_oclass *oclass, void *data, u32 size,
63 struct nouveau_object **pobject)
64 {
65 struct nva3_copy_chan *priv;
66 int ret;
67
68 ret = nouveau_falcon_context_create(parent, engine, oclass, NULL, 256,
69 0, NVOBJ_FLAG_ZERO_ALLOC, &priv);
70 *pobject = nv_object(priv);
71 if (ret)
72 return ret;
73
74 return 0;
75 }
76
77 static struct nouveau_oclass
78 nva3_copy_cclass = {
79 .handle = NV_ENGCTX(COPY0, 0xa3),
80 .ofuncs = &(struct nouveau_ofuncs) {
81 .ctor = nva3_copy_context_ctor,
82 .dtor = _nouveau_falcon_context_dtor,
83 .init = _nouveau_falcon_context_init,
84 .fini = _nouveau_falcon_context_fini,
85 .rd32 = _nouveau_falcon_context_rd32,
86 .wr32 = _nouveau_falcon_context_wr32,
87
88 },
89 };
90
91 /*******************************************************************************
92 * PCOPY engine/subdev functions
93 ******************************************************************************/
94
95 static const struct nouveau_enum nva3_copy_isr_error_name[] = {
96 { 0x0001, "ILLEGAL_MTHD" },
97 { 0x0002, "INVALID_ENUM" },
98 { 0x0003, "INVALID_BITFIELD" },
99 {}
100 };
101
102 void
103 nva3_copy_intr(struct nouveau_subdev *subdev)
104 {
105 struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
106 struct nouveau_engine *engine = nv_engine(subdev);
107 struct nouveau_falcon *falcon = (void *)subdev;
108 struct nouveau_object *engctx;
109 u32 dispatch = nv_ro32(falcon, 0x01c);
110 u32 stat = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16);
111 u64 inst = nv_ro32(falcon, 0x050) & 0x3fffffff;
112 u32 ssta = nv_ro32(falcon, 0x040) & 0x0000ffff;
113 u32 addr = nv_ro32(falcon, 0x040) >> 16;
114 u32 mthd = (addr & 0x07ff) << 2;
115 u32 subc = (addr & 0x3800) >> 11;
116 u32 data = nv_ro32(falcon, 0x044);
117 int chid;
118
119 engctx = nouveau_engctx_get(engine, inst);
120 chid = pfifo->chid(pfifo, engctx);
121
122 if (stat & 0x00000040) {
123 nv_error(falcon, "DISPATCH_ERROR [");
124 nouveau_enum_print(nva3_copy_isr_error_name, ssta);
125 printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
126 chid, inst << 12, subc, mthd, data);
127 nv_wo32(falcon, 0x004, 0x00000040);
128 stat &= ~0x00000040;
129 }
130
131 if (stat) {
132 nv_error(falcon, "unhandled intr 0x%08x\n", stat);
133 nv_wo32(falcon, 0x004, stat);
134 }
135
136 nouveau_engctx_put(engctx);
137 }
138
139 static int
140 nva3_copy_tlb_flush(struct nouveau_engine *engine)
141 {
142 nv50_vm_flush_engine(&engine->base, 0x0d);
143 return 0;
144 }
145
146 static int
147 nva3_copy_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
148 struct nouveau_oclass *oclass, void *data, u32 size,
149 struct nouveau_object **pobject)
150 {
151 bool enable = (nv_device(parent)->chipset != 0xaf);
152 struct nva3_copy_priv *priv;
153 int ret;
154
155 ret = nouveau_falcon_create(parent, engine, oclass, 0x104000, enable,
156 "PCE0", "copy0", &priv);
157 *pobject = nv_object(priv);
158 if (ret)
159 return ret;
160
161 nv_subdev(priv)->unit = 0x00802000;
162 nv_subdev(priv)->intr = nva3_copy_intr;
163 nv_engine(priv)->cclass = &nva3_copy_cclass;
164 nv_engine(priv)->sclass = nva3_copy_sclass;
165 nv_engine(priv)->tlb_flush = nva3_copy_tlb_flush;
166 nv_falcon(priv)->code.data = nva3_pcopy_code;
167 nv_falcon(priv)->code.size = sizeof(nva3_pcopy_code);
168 nv_falcon(priv)->data.data = nva3_pcopy_data;
169 nv_falcon(priv)->data.size = sizeof(nva3_pcopy_data);
170 return 0;
171 }
172
173 struct nouveau_oclass
174 nva3_copy_oclass = {
175 .handle = NV_ENGINE(COPY0, 0xa3),
176 .ofuncs = &(struct nouveau_ofuncs) {
177 .ctor = nva3_copy_ctor,
178 .dtor = _nouveau_falcon_dtor,
179 .init = _nouveau_falcon_init,
180 .fini = _nouveau_falcon_fini,
181 .rd32 = _nouveau_falcon_rd32,
182 .wr32 = _nouveau_falcon_wr32,
183 },
184 };
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