drm/nouveau: port all engines to new engine module format
[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / copy / nvc0.c
1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25 #include <core/os.h>
26 #include <core/enum.h>
27 #include <core/class.h>
28 #include <core/engctx.h>
29
30 #include <engine/copy.h>
31
32 #include "fuc/nvc0.fuc.h"
33
34 struct nvc0_copy_priv {
35 struct nouveau_copy base;
36 };
37
38 struct nvc0_copy_chan {
39 struct nouveau_copy_chan base;
40 };
41
42 /*******************************************************************************
43 * Copy object classes
44 ******************************************************************************/
45
46 static struct nouveau_oclass
47 nvc0_copy0_sclass[] = {
48 { 0x90b5, &nouveau_object_ofuncs },
49 {},
50 };
51
52 static struct nouveau_oclass
53 nvc0_copy1_sclass[] = {
54 { 0x90b8, &nouveau_object_ofuncs },
55 {},
56 };
57
58 /*******************************************************************************
59 * PCOPY context
60 ******************************************************************************/
61
62 static int
63 nvc0_copy_context_ctor(struct nouveau_object *parent,
64 struct nouveau_object *engine,
65 struct nouveau_oclass *oclass, void *data, u32 size,
66 struct nouveau_object **pobject)
67 {
68 struct nvc0_copy_chan *priv;
69 int ret;
70
71 ret = nouveau_copy_context_create(parent, engine, oclass, NULL, 256,
72 256, NVOBJ_FLAG_ZERO_ALLOC, &priv);
73 *pobject = nv_object(priv);
74 if (ret)
75 return ret;
76
77 return 0;
78 }
79
80 static struct nouveau_ofuncs
81 nvc0_copy_context_ofuncs = {
82 .ctor = nvc0_copy_context_ctor,
83 .dtor = _nouveau_copy_context_dtor,
84 .init = _nouveau_copy_context_init,
85 .fini = _nouveau_copy_context_fini,
86 .rd32 = _nouveau_copy_context_rd32,
87 .wr32 = _nouveau_copy_context_wr32,
88 };
89
90 static struct nouveau_oclass
91 nvc0_copy0_cclass = {
92 .handle = NV_ENGCTX(COPY0, 0xc0),
93 .ofuncs = &nvc0_copy_context_ofuncs,
94 };
95
96 static struct nouveau_oclass
97 nvc0_copy1_cclass = {
98 .handle = NV_ENGCTX(COPY1, 0xc0),
99 .ofuncs = &nvc0_copy_context_ofuncs,
100 };
101
102 /*******************************************************************************
103 * PCOPY engine/subdev functions
104 ******************************************************************************/
105
106 static struct nouveau_enum nvc0_copy_isr_error_name[] = {
107 { 0x0001, "ILLEGAL_MTHD" },
108 { 0x0002, "INVALID_ENUM" },
109 { 0x0003, "INVALID_BITFIELD" },
110 {}
111 };
112
113 static void
114 nvc0_copy_intr(struct nouveau_subdev *subdev)
115 {
116 int idx = nv_engidx(nv_object(subdev)) - NVDEV_ENGINE_COPY0;
117 struct nvc0_copy_priv *priv = (void *)subdev;
118 u32 disp = nv_rd32(priv, 0x10401c + (idx * 0x1000));
119 u32 intr = nv_rd32(priv, 0x104008 + (idx * 0x1000));
120 u32 stat = intr & disp & ~(disp >> 16);
121 u64 inst = nv_rd32(priv, 0x104050 + (idx * 0x1000)) & 0x0fffffff;
122 u32 ssta = nv_rd32(priv, 0x104040 + (idx * 0x1000)) & 0x0000ffff;
123 u32 addr = nv_rd32(priv, 0x104040 + (idx * 0x1000)) >> 16;
124 u32 mthd = (addr & 0x07ff) << 2;
125 u32 subc = (addr & 0x3800) >> 11;
126 u32 data = nv_rd32(priv, 0x104044 + (idx * 0x1000));
127
128 if (stat & 0x00000040) {
129 nv_error(priv, "DISPATCH_ERROR [");
130 nouveau_enum_print(nvc0_copy_isr_error_name, ssta);
131 printk("] ch 0x%010llx subc %d mthd 0x%04x data 0x%08x\n",
132 (u64)inst << 12, subc, mthd, data);
133 nv_wr32(priv, 0x104004 + (idx * 0x1000), 0x00000040);
134 stat &= ~0x00000040;
135 }
136
137 if (stat) {
138 nv_error(priv, "unhandled intr 0x%08x\n", stat);
139 nv_wr32(priv, 0x104004 + (idx * 0x1000), stat);
140 }
141 }
142
143 static int
144 nvc0_copy0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
145 struct nouveau_oclass *oclass, void *data, u32 size,
146 struct nouveau_object **pobject)
147 {
148 struct nvc0_copy_priv *priv;
149 int ret;
150
151 if (nv_rd32(parent, 0x022500) & 0x00000100)
152 return -ENODEV;
153
154 ret = nouveau_copy_create(parent, engine, oclass, true, 0, &priv);
155 *pobject = nv_object(priv);
156 if (ret)
157 return ret;
158
159 nv_subdev(priv)->unit = 0x00000040;
160 nv_subdev(priv)->intr = nvc0_copy_intr;
161 nv_engine(priv)->cclass = &nvc0_copy0_cclass;
162 nv_engine(priv)->sclass = nvc0_copy0_sclass;
163 return 0;
164 }
165
166 static int
167 nvc0_copy1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
168 struct nouveau_oclass *oclass, void *data, u32 size,
169 struct nouveau_object **pobject)
170 {
171 struct nvc0_copy_priv *priv;
172 int ret;
173
174 if (nv_rd32(parent, 0x022500) & 0x00000200)
175 return -ENODEV;
176
177 ret = nouveau_copy_create(parent, engine, oclass, true, 1, &priv);
178 *pobject = nv_object(priv);
179 if (ret)
180 return ret;
181
182 nv_subdev(priv)->unit = 0x00000080;
183 nv_subdev(priv)->intr = nvc0_copy_intr;
184 nv_engine(priv)->cclass = &nvc0_copy1_cclass;
185 nv_engine(priv)->sclass = nvc0_copy1_sclass;
186 return 0;
187 }
188
189 static int
190 nvc0_copy_init(struct nouveau_object *object)
191 {
192 int idx = nv_engidx(object) - NVDEV_ENGINE_COPY0;
193 struct nvc0_copy_priv *priv = (void *)object;
194 int ret, i;
195
196 ret = nouveau_copy_init(&priv->base);
197 if (ret)
198 return ret;
199
200 /* disable all interrupts */
201 nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);
202
203 /* upload ucode */
204 nv_wr32(priv, 0x1041c0 + (idx * 0x1000), 0x01000000);
205 for (i = 0; i < sizeof(nvc0_pcopy_data) / 4; i++)
206 nv_wr32(priv, 0x1041c4 + (idx * 0x1000), nvc0_pcopy_data[i]);
207
208 nv_wr32(priv, 0x104180 + (idx * 0x1000), 0x01000000);
209 for (i = 0; i < sizeof(nvc0_pcopy_code) / 4; i++) {
210 if ((i & 0x3f) == 0)
211 nv_wr32(priv, 0x104188 + (idx * 0x1000), i >> 6);
212 nv_wr32(priv, 0x104184 + (idx * 0x1000), nvc0_pcopy_code[i]);
213 }
214
215 /* start it running */
216 nv_wr32(priv, 0x104084 + (idx * 0x1000), idx);
217 nv_wr32(priv, 0x10410c + (idx * 0x1000), 0x00000000);
218 nv_wr32(priv, 0x104104 + (idx * 0x1000), 0x00000000); /* ENTRY */
219 nv_wr32(priv, 0x104100 + (idx * 0x1000), 0x00000002); /* TRIGGER */
220 return 0;
221 }
222
223 static int
224 nvc0_copy_fini(struct nouveau_object *object, bool suspend)
225 {
226 int idx = nv_engidx(object) - NVDEV_ENGINE_COPY0;
227 struct nvc0_copy_priv *priv = (void *)object;
228
229 nv_mask(priv, 0x104048 + (idx * 0x1000), 0x00000003, 0x00000000);
230 nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);
231
232 return nouveau_copy_fini(&priv->base, suspend);
233 }
234
235 struct nouveau_oclass
236 nvc0_copy0_oclass = {
237 .handle = NV_ENGINE(COPY0, 0xc0),
238 .ofuncs = &(struct nouveau_ofuncs) {
239 .ctor = nvc0_copy0_ctor,
240 .dtor = _nouveau_copy_dtor,
241 .init = nvc0_copy_init,
242 .fini = nvc0_copy_fini,
243 },
244 };
245
246 struct nouveau_oclass
247 nvc0_copy1_oclass = {
248 .handle = NV_ENGINE(COPY1, 0xc0),
249 .ofuncs = &(struct nouveau_ofuncs) {
250 .ctor = nvc0_copy1_ctor,
251 .dtor = _nouveau_copy_dtor,
252 .init = nvc0_copy_init,
253 .fini = nvc0_copy_fini,
254 },
255 };
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