drm/nvd0/disp: call into core to handle dac power state changes
[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / disp / nv50.h
1 #ifndef __NV50_DISP_H__
2 #define __NV50_DISP_H__
3
4 #include <core/parent.h>
5 #include <core/namedb.h>
6 #include <core/ramht.h>
7
8 #include <engine/dmaobj.h>
9 #include <engine/disp.h>
10
11 struct dcb_output;
12
13 struct nv50_disp_priv {
14 struct nouveau_disp base;
15 struct nouveau_oclass *sclass;
16 struct {
17 int nr;
18 } head;
19 struct {
20 int nr;
21 int (*power)(struct nv50_disp_priv *, int dac, u32 data);
22 int (*sense)(struct nv50_disp_priv *, int dac);
23 } dac;
24 struct {
25 int nr;
26 int (*power)(struct nv50_disp_priv *, int sor, u32 data);
27 int (*dp_train)(struct nv50_disp_priv *, int sor, int link,
28 u16 type, u16 mask, u32 data,
29 struct dcb_output *);
30 int (*dp_lnkctl)(struct nv50_disp_priv *, int sor, int link,
31 int head, u16 type, u16 mask, u32 data,
32 struct dcb_output *);
33 int (*dp_drvctl)(struct nv50_disp_priv *, int sor, int link,
34 int lane, u16 type, u16 mask, u32 data,
35 struct dcb_output *);
36 } sor;
37 };
38
39 extern struct nouveau_omthds nva3_disp_base_omthds[];
40
41 #define DAC_MTHD(n) (n), (n) + 0x03
42
43 int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32);
44 int nv50_dac_power(struct nv50_disp_priv *, int, u32);
45 int nv50_dac_sense(struct nv50_disp_priv *, int);
46
47 #define SOR_MTHD(n) (n), (n) + 0x3f
48
49 int nv50_sor_mthd(struct nouveau_object *, u32, void *, u32);
50 int nv50_sor_power(struct nv50_disp_priv *, int, u32);
51
52 int nvd0_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
53 struct dcb_output *);
54 int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
55 struct dcb_output *);
56 int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
57 struct dcb_output *);
58
59 struct nv50_disp_base {
60 struct nouveau_parent base;
61 struct nouveau_ramht *ramht;
62 u32 chan;
63 };
64
65 struct nv50_disp_chan {
66 struct nouveau_namedb base;
67 int chid;
68 };
69
70 int nv50_disp_chan_create_(struct nouveau_object *, struct nouveau_object *,
71 struct nouveau_oclass *, int, int, void **);
72 void nv50_disp_chan_destroy(struct nv50_disp_chan *);
73 u32 nv50_disp_chan_rd32(struct nouveau_object *, u64);
74 void nv50_disp_chan_wr32(struct nouveau_object *, u64, u32);
75
76 #define nv50_disp_chan_init(a) \
77 nouveau_namedb_init(&(a)->base)
78 #define nv50_disp_chan_fini(a,b) \
79 nouveau_namedb_fini(&(a)->base, (b))
80
81 int nv50_disp_dmac_create_(struct nouveau_object *, struct nouveau_object *,
82 struct nouveau_oclass *, u32, int, int, void **);
83 void nv50_disp_dmac_dtor(struct nouveau_object *);
84
85 struct nv50_disp_dmac {
86 struct nv50_disp_chan base;
87 struct nouveau_dmaobj *pushdma;
88 u32 push;
89 };
90
91 struct nv50_disp_pioc {
92 struct nv50_disp_chan base;
93 };
94
95 extern struct nouveau_ofuncs nv50_disp_mast_ofuncs;
96 extern struct nouveau_ofuncs nv50_disp_sync_ofuncs;
97 extern struct nouveau_ofuncs nv50_disp_ovly_ofuncs;
98 extern struct nouveau_ofuncs nv50_disp_oimm_ofuncs;
99 extern struct nouveau_ofuncs nv50_disp_curs_ofuncs;
100 extern struct nouveau_ofuncs nv50_disp_base_ofuncs;
101 extern struct nouveau_oclass nv50_disp_cclass;
102 void nv50_disp_intr(struct nouveau_subdev *);
103
104 extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;
105 extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;
106 extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;
107 extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;
108 extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;
109 extern struct nouveau_ofuncs nvd0_disp_base_ofuncs;
110 extern struct nouveau_oclass nvd0_disp_cclass;
111 void nvd0_disp_intr(struct nouveau_subdev *);
112
113 #endif
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