drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <core/gpuobj.h>
  26
  27 #include <subdev/fb.h>
  28 #include <engine/dmaobj.h>
  29
  30 struct nv50_dmaeng_priv {
  31         struct nouveau_dmaeng base;
  32 };
  33
  34 struct nv50_dmaobj_priv {
  35         struct nouveau_dmaobj base;
  36 };
  37
  38 static int
  39 nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
  40                  struct nouveau_object *parent,
  41                  struct nouveau_dmaobj *dmaobj,
  42                  struct nouveau_gpuobj **pgpuobj)
  43 {
  44         u32 flags = nv_mclass(dmaobj);
  45         int ret;
  46
  47         switch (dmaobj->target) {
  48         case NV_MEM_TARGET_VM:
  49                 flags |= 0x00000000;
  50                 flags |= 0x60000000; /* COMPRESSION_USEVM */
  51                 flags |= 0x1fc00000; /* STORAGE_TYPE_USEVM */
  52                 break;
  53         case NV_MEM_TARGET_VRAM:
  54                 flags |= 0x00010000;
  55                 flags |= 0x00100000; /* ACCESSUS_USER_SYSTEM */
  56                 break;
  57         case NV_MEM_TARGET_PCI:
  58                 flags |= 0x00020000;
  59                 flags |= 0x00100000; /* ACCESSUS_USER_SYSTEM */
  60                 break;
  61         case NV_MEM_TARGET_PCI_NOSNOOP:
  62                 flags |= 0x00030000;
  63                 flags |= 0x00100000; /* ACCESSUS_USER_SYSTEM */
  64                 break;
  65         default:
  66                 return -EINVAL;
  67         }
  68
  69         switch (dmaobj->access) {
  70         case NV_MEM_ACCESS_VM:
  71                 break;
  72         case NV_MEM_ACCESS_RO:
  73                 flags |= 0x00040000;
  74                 break;
  75         case NV_MEM_ACCESS_WO:
  76         case NV_MEM_ACCESS_RW:
  77                 flags |= 0x00080000;
  78                 break;
  79         }
  80
  81         ret = nouveau_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
  82         if (ret == 0) {
  83                 nv_wo32(*pgpuobj, 0x00, flags);
  84                 nv_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->limit));
  85                 nv_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->start));
  86                 nv_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->limit) << 24 |
  87                                         upper_32_bits(dmaobj->start));
  88                 nv_wo32(*pgpuobj, 0x10, 0x00000000);
  89                 nv_wo32(*pgpuobj, 0x14, 0x00000000);
  90         }
  91
  92         return ret;
  93 }
  94
  95 static int
  96 nv50_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  97                  struct nouveau_oclass *oclass, void *data, u32 size,
  98                  struct nouveau_object **pobject)
  99 {
 100         struct nouveau_dmaeng *dmaeng = (void *)engine;
 101         struct nv50_dmaobj_priv *dmaobj;
 102         struct nouveau_gpuobj *gpuobj;
 103         int ret;
 104
 105         ret = nouveau_dmaobj_create(parent, engine, oclass,
 106                                     data, size, &dmaobj);
 107         *pobject = nv_object(dmaobj);
 108         if (ret)
 109                 return ret;
 110
 111         switch (nv_mclass(parent)) {
 112         case 0x506f:
 113         case 0x826f:
 114                 ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
 115                 nouveau_object_ref(NULL, pobject);
 116                 *pobject = nv_object(gpuobj);
 117                 break;
 118         default:
 119                 break;
 120         }
 121
 122         return ret;
 123 }
 124
 125 static struct nouveau_ofuncs
 126 nv50_dmaobj_ofuncs = {
 127         .ctor = nv50_dmaobj_ctor,
 128         .dtor = _nouveau_dmaobj_dtor,
 129         .init = _nouveau_dmaobj_init,
 130         .fini = _nouveau_dmaobj_fini,
 131 };
 132
 133 static struct nouveau_oclass
 134 nv50_dmaobj_sclass[] = {
 135         { 0x0002, &nv50_dmaobj_ofuncs },
 136         { 0x0003, &nv50_dmaobj_ofuncs },
 137         { 0x003d, &nv50_dmaobj_ofuncs },
 138         {}
 139 };
 140
 141 static int
 142 nv50_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 143                  struct nouveau_oclass *oclass, void *data, u32 size,
 144                  struct nouveau_object **pobject)
 145 {
 146         struct nv50_dmaeng_priv *priv;
 147         int ret;
 148
 149         ret = nouveau_dmaeng_create(parent, engine, oclass, &priv);
 150         *pobject = nv_object(priv);
 151         if (ret)
 152                 return ret;
 153
 154         priv->base.base.sclass = nv50_dmaobj_sclass;
 155         priv->base.bind = nv50_dmaobj_bind;
 156         return 0;
 157 }
 158
 159 struct nouveau_oclass
 160 nv50_dmaeng_oclass = {
 161         .handle = NV_ENGINE(DMAOBJ, 0x50),
 162         .ofuncs = &(struct nouveau_ofuncs) {
 163                 .ctor = nv50_dmaeng_ctor,
 164                 .dtor = _nouveau_dmaeng_dtor,
 165                 .init = _nouveau_dmaeng_init,
 166                 .fini = _nouveau_dmaeng_fini,
 167         },
 168 };