drivers/gpu/drm/nouveau/core/engine/fifo/base.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <core/object.h>
  26 #include <core/handle.h>
  27
  28 #include <engine/dmaobj.h>
  29 #include <engine/fifo.h>
  30
  31 int
  32 nouveau_fifo_channel_create_(struct nouveau_object *parent,
  33                              struct nouveau_object *engine,
  34                              struct nouveau_oclass *oclass,
  35                              int bar, u32 addr, u32 size, u32 pushbuf,
  36                              u32 engmask, int len, void **ptr)
  37 {
  38         struct nouveau_device *device = nv_device(engine);
  39         struct nouveau_fifo *priv = (void *)engine;
  40         struct nouveau_fifo_chan *chan;
  41         struct nouveau_dmaeng *dmaeng;
  42         unsigned long flags;
  43         int ret;
  44
  45         /* create base object class */
  46         ret = nouveau_namedb_create_(parent, engine, oclass, 0, NULL,
  47                                      engmask, len, ptr);
  48         chan = *ptr;
  49         if (ret)
  50                 return ret;
  51
  52         /* validate dma object representing push buffer */
  53         chan->pushdma = (void *)nouveau_handle_ref(parent, pushbuf);
  54         if (!chan->pushdma)
  55                 return -ENOENT;
  56
  57         dmaeng = (void *)chan->pushdma->base.engine;
  58         switch (chan->pushdma->base.oclass->handle) {
  59         case 0x0002:
  60         case 0x003d:
  61                 break;
  62         default:
  63                 return -EINVAL;
  64         }
  65
  66         if (dmaeng->bind) {
  67                 ret = dmaeng->bind(dmaeng, parent, chan->pushdma, &chan->pushgpu);
  68                 if (ret)
  69                         return ret;
  70         }
  71
  72         /* find a free fifo channel */
  73         spin_lock_irqsave(&priv->lock, flags);
  74         for (chan->chid = priv->min; chan->chid < priv->max; chan->chid++) {
  75                 if (!priv->channel[chan->chid]) {
  76                         priv->channel[chan->chid] = nv_object(chan);
  77                         break;
  78                 }
  79         }
  80         spin_unlock_irqrestore(&priv->lock, flags);
  81
  82         if (chan->chid == priv->max) {
  83                 nv_error(priv, "no free channels\n");
  84                 return -ENOSPC;
  85         }
  86
  87         /* map fifo control registers */
  88         chan->user = ioremap(pci_resource_start(device->pdev, bar) + addr +
  89                              (chan->chid * size), size);
  90         if (!chan->user)
  91                 return -EFAULT;
  92
  93         chan->size = size;
  94         return 0;
  95 }
  96
  97 void
  98 nouveau_fifo_channel_destroy(struct nouveau_fifo_chan *chan)
  99 {
 100         struct nouveau_fifo *priv = (void *)nv_object(chan)->engine;
 101         unsigned long flags;
 102
 103         iounmap(chan->user);
 104
 105         spin_lock_irqsave(&priv->lock, flags);
 106         priv->channel[chan->chid] = NULL;
 107         spin_unlock_irqrestore(&priv->lock, flags);
 108
 109         nouveau_gpuobj_ref(NULL, &chan->pushgpu);
 110         nouveau_object_ref(NULL, (struct nouveau_object **)&chan->pushdma);
 111         nouveau_namedb_destroy(&chan->base);
 112 }
 113
 114 void
 115 _nouveau_fifo_channel_dtor(struct nouveau_object *object)
 116 {
 117         struct nouveau_fifo_chan *chan = (void *)object;
 118         nouveau_fifo_channel_destroy(chan);
 119 }
 120
 121 u32
 122 _nouveau_fifo_channel_rd32(struct nouveau_object *object, u32 addr)
 123 {
 124         struct nouveau_fifo_chan *chan = (void *)object;
 125         return ioread32_native(chan->user + addr);
 126 }
 127
 128 void
 129 _nouveau_fifo_channel_wr32(struct nouveau_object *object, u32 addr, u32 data)
 130 {
 131         struct nouveau_fifo_chan *chan = (void *)object;
 132         iowrite32_native(data, chan->user + addr);
 133 }
 134
 135 void
 136 nouveau_fifo_destroy(struct nouveau_fifo *priv)
 137 {
 138         kfree(priv->channel);
 139         nouveau_engine_destroy(&priv->base);
 140 }
 141
 142 int
 143 nouveau_fifo_create_(struct nouveau_object *parent,
 144                      struct nouveau_object *engine,
 145                      struct nouveau_oclass *oclass,
 146                      int min, int max, int length, void **pobject)
 147 {
 148         struct nouveau_fifo *priv;
 149         int ret;
 150
 151         ret = nouveau_engine_create_(parent, engine, oclass, true, "PFIFO",
 152                                      "fifo", length, pobject);
 153         priv = *pobject;
 154         if (ret)
 155                 return ret;
 156
 157         priv->min = min;
 158         priv->max = max;
 159         priv->channel = kzalloc(sizeof(*priv->channel) * (max + 1), GFP_KERNEL);
 160         if (!priv->channel)
 161                 return -ENOMEM;
 162
 163         spin_lock_init(&priv->lock);
 164         return 0;
 165 }