drm/nouveau: port all engines to new engine module format
[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / graph / nv25.c
1 #include <core/os.h>
2 #include <core/class.h>
3 #include <core/engctx.h>
4 #include <core/enum.h>
5
6 #include <subdev/timer.h>
7 #include <subdev/fb.h>
8
9 #include <engine/graph.h>
10
11 #include "nv20.h"
12 #include "regs.h"
13
14 /*******************************************************************************
15 * Graphics object classes
16 ******************************************************************************/
17
18 struct nouveau_oclass
19 nv25_graph_sclass[] = {
20 { 0x0012, &nv04_graph_ofuncs, NULL }, /* beta1 */
21 { 0x0019, &nv04_graph_ofuncs, NULL }, /* clip */
22 { 0x0030, &nv04_graph_ofuncs, NULL }, /* null */
23 { 0x0039, &nv04_graph_ofuncs, NULL }, /* m2mf */
24 { 0x0043, &nv04_graph_ofuncs, NULL }, /* rop */
25 { 0x0044, &nv04_graph_ofuncs, NULL }, /* patt */
26 { 0x004a, &nv04_graph_ofuncs, NULL }, /* gdi */
27 { 0x0062, &nv04_graph_ofuncs, NULL }, /* surf2d */
28 { 0x0072, &nv04_graph_ofuncs, NULL }, /* beta4 */
29 { 0x0089, &nv04_graph_ofuncs, NULL }, /* sifm */
30 { 0x008a, &nv04_graph_ofuncs, NULL }, /* ifc */
31 { 0x0096, &nv04_graph_ofuncs, NULL }, /* celcius */
32 { 0x009e, &nv04_graph_ofuncs, NULL }, /* swzsurf */
33 { 0x009f, &nv04_graph_ofuncs, NULL }, /* imageblit */
34 { 0x0597, &nv04_graph_ofuncs, NULL }, /* kelvin */
35 {},
36 };
37
38 /*******************************************************************************
39 * PGRAPH context
40 ******************************************************************************/
41
42 static int
43 nv25_graph_context_ctor(struct nouveau_object *parent,
44 struct nouveau_object *engine,
45 struct nouveau_oclass *oclass, void *data, u32 size,
46 struct nouveau_object **pobject)
47 {
48 struct nv20_graph_chan *chan;
49 int ret, i;
50
51 ret = nouveau_graph_context_create(parent, engine, oclass, NULL, 0x3724,
52 16, NVOBJ_FLAG_ZERO_ALLOC, &chan);
53 *pobject = nv_object(chan);
54 if (ret)
55 return ret;
56
57 chan->chid = nouveau_fifo_chan(parent)->chid;
58
59 nv_wo32(chan, 0x0028, 0x00000001 | (chan->chid << 24));
60 nv_wo32(chan, 0x035c, 0xffff0000);
61 nv_wo32(chan, 0x03c0, 0x0fff0000);
62 nv_wo32(chan, 0x03c4, 0x0fff0000);
63 nv_wo32(chan, 0x049c, 0x00000101);
64 nv_wo32(chan, 0x04b0, 0x00000111);
65 nv_wo32(chan, 0x04c8, 0x00000080);
66 nv_wo32(chan, 0x04cc, 0xffff0000);
67 nv_wo32(chan, 0x04d0, 0x00000001);
68 nv_wo32(chan, 0x04e4, 0x44400000);
69 nv_wo32(chan, 0x04fc, 0x4b800000);
70 for (i = 0x0510; i <= 0x051c; i += 4)
71 nv_wo32(chan, i, 0x00030303);
72 for (i = 0x0530; i <= 0x053c; i += 4)
73 nv_wo32(chan, i, 0x00080000);
74 for (i = 0x0548; i <= 0x0554; i += 4)
75 nv_wo32(chan, i, 0x01012000);
76 for (i = 0x0558; i <= 0x0564; i += 4)
77 nv_wo32(chan, i, 0x000105b8);
78 for (i = 0x0568; i <= 0x0574; i += 4)
79 nv_wo32(chan, i, 0x00080008);
80 for (i = 0x0598; i <= 0x05d4; i += 4)
81 nv_wo32(chan, i, 0x07ff0000);
82 nv_wo32(chan, 0x05e0, 0x4b7fffff);
83 nv_wo32(chan, 0x0620, 0x00000080);
84 nv_wo32(chan, 0x0624, 0x30201000);
85 nv_wo32(chan, 0x0628, 0x70605040);
86 nv_wo32(chan, 0x062c, 0xb0a09080);
87 nv_wo32(chan, 0x0630, 0xf0e0d0c0);
88 nv_wo32(chan, 0x0664, 0x00000001);
89 nv_wo32(chan, 0x066c, 0x00004000);
90 nv_wo32(chan, 0x0678, 0x00000001);
91 nv_wo32(chan, 0x0680, 0x00040000);
92 nv_wo32(chan, 0x0684, 0x00010000);
93 for (i = 0x1b04; i <= 0x2374; i += 16) {
94 nv_wo32(chan, (i + 0), 0x10700ff9);
95 nv_wo32(chan, (i + 4), 0x0436086c);
96 nv_wo32(chan, (i + 8), 0x000c001b);
97 }
98 nv_wo32(chan, 0x2704, 0x3f800000);
99 nv_wo32(chan, 0x2718, 0x3f800000);
100 nv_wo32(chan, 0x2744, 0x40000000);
101 nv_wo32(chan, 0x2748, 0x3f800000);
102 nv_wo32(chan, 0x274c, 0x3f000000);
103 nv_wo32(chan, 0x2754, 0x40000000);
104 nv_wo32(chan, 0x2758, 0x3f800000);
105 nv_wo32(chan, 0x2760, 0xbf800000);
106 nv_wo32(chan, 0x2768, 0xbf800000);
107 nv_wo32(chan, 0x308c, 0x000fe000);
108 nv_wo32(chan, 0x3108, 0x000003f8);
109 nv_wo32(chan, 0x3468, 0x002fe000);
110 for (i = 0x3484; i <= 0x34a0; i += 4)
111 nv_wo32(chan, i, 0x001c527c);
112 return 0;
113 }
114
115 static struct nouveau_oclass
116 nv25_graph_cclass = {
117 .handle = NV_ENGCTX(GR, 0x25),
118 .ofuncs = &(struct nouveau_ofuncs) {
119 .ctor = nv25_graph_context_ctor,
120 .dtor = _nouveau_graph_context_dtor,
121 .init = nv20_graph_context_init,
122 .fini = nv20_graph_context_fini,
123 .rd32 = _nouveau_graph_context_rd32,
124 .wr32 = _nouveau_graph_context_wr32,
125 },
126 };
127
128 /*******************************************************************************
129 * PGRAPH engine/subdev functions
130 ******************************************************************************/
131
132 static int
133 nv25_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
134 struct nouveau_oclass *oclass, void *data, u32 size,
135 struct nouveau_object **pobject)
136 {
137 struct nv20_graph_priv *priv;
138 int ret;
139
140 ret = nouveau_graph_create(parent, engine, oclass, true, &priv);
141 *pobject = nv_object(priv);
142 if (ret)
143 return ret;
144
145 ret = nouveau_gpuobj_new(parent, NULL, 32 * 4, 16,
146 NVOBJ_FLAG_ZERO_ALLOC, &priv->ctxtab);
147 if (ret)
148 return ret;
149
150 nv_subdev(priv)->unit = 0x00001000;
151 nv_subdev(priv)->intr = nv20_graph_intr;
152 nv_engine(priv)->cclass = &nv25_graph_cclass;
153 nv_engine(priv)->sclass = nv25_graph_sclass;
154 nv_engine(priv)->tile_prog = nv20_graph_tile_prog;
155 return 0;
156 }
157
158 struct nouveau_oclass
159 nv25_graph_oclass = {
160 .handle = NV_ENGINE(GR, 0x25),
161 .ofuncs = &(struct nouveau_ofuncs) {
162 .ctor = nv25_graph_ctor,
163 .dtor = nv20_graph_dtor,
164 .init = nv20_graph_init,
165 .fini = _nouveau_graph_fini,
166 },
167 };
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