drm/gf100-/gr: split gpc state into its subunits
[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / graph / nvd9.c
1 /*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24
25 #include "nvc0.h"
26 #include "ctxnvc0.h"
27
28 /*******************************************************************************
29 * PGRAPH register lists
30 ******************************************************************************/
31
32 const struct nvc0_graph_init
33 nvd9_graph_init_pd_0[] = {
34 { 0x406024, 1, 0x04, 0x00000000 },
35 { 0x4064f0, 3, 0x04, 0x00000000 },
36 {}
37 };
38
39 const struct nvc0_graph_init
40 nvd9_graph_init_ds_0[] = {
41 { 0x405844, 1, 0x04, 0x00ffffff },
42 { 0x405850, 1, 0x04, 0x00000000 },
43 { 0x405900, 1, 0x04, 0x00002834 },
44 { 0x405908, 1, 0x04, 0x00000000 },
45 { 0x405928, 2, 0x04, 0x00000000 },
46 {}
47 };
48
49 const struct nvc0_graph_init
50 nvd9_graph_init_prop_0[] = {
51 { 0x418408, 1, 0x04, 0x00000000 },
52 { 0x4184a0, 3, 0x04, 0x00000000 },
53 {}
54 };
55
56 const struct nvc0_graph_init
57 nvd9_graph_init_gpm_0[] = {
58 { 0x418c04, 1, 0x04, 0x00000000 },
59 { 0x418c64, 2, 0x04, 0x00000000 },
60 { 0x418c88, 1, 0x04, 0x00000000 },
61 { 0x418cb4, 2, 0x04, 0x00000000 },
62 {}
63 };
64
65 const struct nvc0_graph_init
66 nvd9_graph_init_gpc_unk_1[] = {
67 { 0x418d00, 1, 0x04, 0x00000000 },
68 { 0x418d28, 2, 0x04, 0x00000000 },
69 { 0x418f00, 1, 0x04, 0x00000000 },
70 { 0x418f08, 1, 0x04, 0x00000000 },
71 { 0x418f20, 2, 0x04, 0x00000000 },
72 { 0x418e00, 1, 0x04, 0x00000003 },
73 { 0x418e08, 1, 0x04, 0x00000000 },
74 { 0x418e1c, 2, 0x04, 0x00000000 },
75 {}
76 };
77
78 static const struct nvc0_graph_init
79 nvd9_graph_init_tpc_0[] = {
80 { 0x419d08, 2, 0x04, 0x00000000 },
81 { 0x419d10, 1, 0x04, 0x00000014 },
82 { 0x419ab0, 1, 0x04, 0x00000000 },
83 { 0x419ac8, 1, 0x04, 0x00000000 },
84 { 0x419ab8, 1, 0x04, 0x000000e7 },
85 { 0x419abc, 2, 0x04, 0x00000000 },
86 { 0x419ab4, 1, 0x04, 0x00000000 },
87 { 0x41980c, 1, 0x04, 0x00000010 },
88 { 0x419810, 1, 0x04, 0x00000000 },
89 { 0x419814, 1, 0x04, 0x00000004 },
90 { 0x419844, 1, 0x04, 0x00000000 },
91 { 0x41984c, 1, 0x04, 0x0000a918 },
92 { 0x419850, 4, 0x04, 0x00000000 },
93 { 0x419880, 1, 0x04, 0x00000002 },
94 { 0x419c98, 1, 0x04, 0x00000000 },
95 { 0x419ca8, 1, 0x04, 0x80000000 },
96 { 0x419cb4, 1, 0x04, 0x00000000 },
97 { 0x419cb8, 1, 0x04, 0x00008bf4 },
98 { 0x419cbc, 1, 0x04, 0x28137606 },
99 { 0x419cc0, 2, 0x04, 0x00000000 },
100 { 0x419bd4, 1, 0x04, 0x00800000 },
101 { 0x419bdc, 1, 0x04, 0x00000000 },
102 { 0x419bf8, 2, 0x04, 0x00000000 },
103 { 0x419d2c, 1, 0x04, 0x00000000 },
104 { 0x419d48, 2, 0x04, 0x00000000 },
105 { 0x419c0c, 1, 0x04, 0x00000000 },
106 { 0x419e00, 1, 0x04, 0x00000000 },
107 { 0x419ea0, 1, 0x04, 0x00000000 },
108 { 0x419ea4, 1, 0x04, 0x00000100 },
109 { 0x419ea8, 1, 0x04, 0x02001100 },
110 { 0x419eac, 1, 0x04, 0x11100702 },
111 { 0x419eb0, 1, 0x04, 0x00000003 },
112 { 0x419eb4, 4, 0x04, 0x00000000 },
113 { 0x419ec8, 1, 0x04, 0x0e063818 },
114 { 0x419ecc, 1, 0x04, 0x0e060e06 },
115 { 0x419ed0, 1, 0x04, 0x00003818 },
116 { 0x419ed4, 1, 0x04, 0x011104f1 },
117 { 0x419edc, 1, 0x04, 0x00000000 },
118 { 0x419f00, 1, 0x04, 0x00000000 },
119 { 0x419f2c, 1, 0x04, 0x00000000 },
120 {}
121 };
122
123 const struct nvc0_graph_init
124 nvd9_graph_init_fe_1[] = {
125 { 0x40402c, 1, 0x04, 0x00000000 },
126 { 0x4040f0, 1, 0x04, 0x00000000 },
127 { 0x404174, 1, 0x04, 0x00000000 },
128 {}
129 };
130
131 static const struct nvc0_graph_pack
132 nvd9_graph_pack_mmio[] = {
133 { nvc0_graph_init_main_0 },
134 { nvc0_graph_init_fe_0 },
135 { nvc0_graph_init_pri_0 },
136 { nvc0_graph_init_rstr2d_0 },
137 { nvd9_graph_init_pd_0 },
138 { nvd9_graph_init_ds_0 },
139 { nvc0_graph_init_scc_0 },
140 { nvd9_graph_init_prop_0 },
141 { nvc1_graph_init_gpc_unk_0 },
142 { nvc0_graph_init_setup_0 },
143 { nvc0_graph_init_crstr_0 },
144 { nvc1_graph_init_setup_1 },
145 { nvc0_graph_init_zcull_0 },
146 { nvd9_graph_init_gpm_0 },
147 { nvd9_graph_init_gpc_unk_1 },
148 { nvc0_graph_init_gcc_0 },
149 { nvd9_graph_init_tpc_0 },
150 { nvc0_graph_init_be_0 },
151 { nvd9_graph_init_fe_1 },
152 {}
153 };
154
155 /*******************************************************************************
156 * PGRAPH engine/subdev functions
157 ******************************************************************************/
158
159 struct nouveau_oclass *
160 nvd9_graph_oclass = &(struct nvc0_graph_oclass) {
161 .base.handle = NV_ENGINE(GR, 0xd9),
162 .base.ofuncs = &(struct nouveau_ofuncs) {
163 .ctor = nvc0_graph_ctor,
164 .dtor = nvc0_graph_dtor,
165 .init = nvc0_graph_init,
166 .fini = _nouveau_graph_fini,
167 },
168 .cclass = &nvd9_grctx_oclass,
169 .sclass = nvc8_graph_sclass,
170 .mmio = nvd9_graph_pack_mmio,
171 .fecs.ucode = &nvc0_graph_fecs_ucode,
172 .gpccs.ucode = &nvc0_graph_gpccs_ucode,
173 }.base;
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