drm/nouveau/device: provide a way for devinit to mark engines as disabled
[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / include / core / device.h
1 #ifndef __NOUVEAU_DEVICE_H__
2 #define __NOUVEAU_DEVICE_H__
3
4 #include <core/object.h>
5 #include <core/subdev.h>
6 #include <core/engine.h>
7
8 enum nv_subdev_type {
9 NVDEV_ENGINE_DEVICE,
10 NVDEV_SUBDEV_VBIOS,
11
12 /* All subdevs from DEVINIT to DEVINIT_LAST will be created before
13 * *any* of them are initialised. This subdev category is used
14 * for any subdevs that the VBIOS init table parsing may call out
15 * to during POST.
16 */
17 NVDEV_SUBDEV_DEVINIT,
18 NVDEV_SUBDEV_GPIO,
19 NVDEV_SUBDEV_I2C,
20 NVDEV_SUBDEV_DEVINIT_LAST = NVDEV_SUBDEV_I2C,
21
22 /* This grouping of subdevs are initialised right after they've
23 * been created, and are allowed to assume any subdevs in the
24 * list above them exist and have been initialised.
25 */
26 NVDEV_SUBDEV_MXM,
27 NVDEV_SUBDEV_MC,
28 NVDEV_SUBDEV_BUS,
29 NVDEV_SUBDEV_TIMER,
30 NVDEV_SUBDEV_FB,
31 NVDEV_SUBDEV_LTCG,
32 NVDEV_SUBDEV_IBUS,
33 NVDEV_SUBDEV_INSTMEM,
34 NVDEV_SUBDEV_VM,
35 NVDEV_SUBDEV_BAR,
36 NVDEV_SUBDEV_PWR,
37 NVDEV_SUBDEV_VOLT,
38 NVDEV_SUBDEV_THERM,
39 NVDEV_SUBDEV_CLOCK,
40
41 NVDEV_ENGINE_FIRST,
42 NVDEV_ENGINE_DMAOBJ = NVDEV_ENGINE_FIRST,
43 NVDEV_ENGINE_FIFO,
44 NVDEV_ENGINE_SW,
45 NVDEV_ENGINE_GR,
46 NVDEV_ENGINE_MPEG,
47 NVDEV_ENGINE_ME,
48 NVDEV_ENGINE_VP,
49 NVDEV_ENGINE_CRYPT,
50 NVDEV_ENGINE_BSP,
51 NVDEV_ENGINE_PPP,
52 NVDEV_ENGINE_COPY0,
53 NVDEV_ENGINE_COPY1,
54 NVDEV_ENGINE_COPY2,
55 NVDEV_ENGINE_VIC,
56 NVDEV_ENGINE_VENC,
57 NVDEV_ENGINE_DISP,
58 NVDEV_ENGINE_PERFMON,
59
60 NVDEV_SUBDEV_NR,
61 };
62
63 struct nouveau_device {
64 struct nouveau_engine base;
65 struct list_head head;
66
67 struct pci_dev *pdev;
68 u64 handle;
69
70 const char *cfgopt;
71 const char *dbgopt;
72 const char *name;
73 const char *cname;
74 u64 disable_mask;
75
76 enum {
77 NV_04 = 0x04,
78 NV_10 = 0x10,
79 NV_11 = 0x11,
80 NV_20 = 0x20,
81 NV_30 = 0x30,
82 NV_40 = 0x40,
83 NV_50 = 0x50,
84 NV_C0 = 0xc0,
85 NV_D0 = 0xd0,
86 NV_E0 = 0xe0,
87 } card_type;
88 u32 chipset;
89 u32 crystal;
90
91 struct nouveau_oclass *oclass[NVDEV_SUBDEV_NR];
92 struct nouveau_object *subdev[NVDEV_SUBDEV_NR];
93 };
94
95 static inline struct nouveau_device *
96 nv_device(void *obj)
97 {
98 struct nouveau_object *object = nv_object(obj);
99 struct nouveau_object *device = object;
100
101 if (device->engine)
102 device = device->engine;
103 if (device->parent)
104 device = device->parent;
105
106 #if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA
107 if (unlikely(!nv_iclass(device, NV_SUBDEV_CLASS) ||
108 (nv_hclass(device) & 0xff) != NVDEV_ENGINE_DEVICE)) {
109 nv_assert("BAD CAST -> NvDevice, 0x%08x 0x%08x",
110 nv_hclass(object), nv_hclass(device));
111 }
112 #endif
113
114 return (void *)device;
115 }
116
117 static inline struct nouveau_subdev *
118 nouveau_subdev(void *obj, int sub)
119 {
120 if (nv_device(obj)->subdev[sub])
121 return nv_subdev(nv_device(obj)->subdev[sub]);
122 return NULL;
123 }
124
125 static inline struct nouveau_engine *
126 nouveau_engine(void *obj, int sub)
127 {
128 struct nouveau_subdev *subdev = nouveau_subdev(obj, sub);
129 if (subdev && nv_iclass(subdev, NV_ENGINE_CLASS))
130 return nv_engine(subdev);
131 return NULL;
132 }
133
134 static inline bool
135 nv_device_match(struct nouveau_object *object, u16 dev, u16 ven, u16 sub)
136 {
137 struct nouveau_device *device = nv_device(object);
138 return device->pdev->device == dev &&
139 device->pdev->subsystem_vendor == ven &&
140 device->pdev->subsystem_device == sub;
141 }
142
143 #endif
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