drivers/gpu/drm/nouveau/core/subdev/devinit/fbmem.h

   1 /*
   2  * Copyright (C) 2010 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include <core/device.h>
  28
  29 #define NV04_PFB_BOOT_0                                         0x00100000
  30 #       define NV04_PFB_BOOT_0_RAM_AMOUNT                       0x00000003
  31 #       define NV04_PFB_BOOT_0_RAM_AMOUNT_32MB                  0x00000000
  32 #       define NV04_PFB_BOOT_0_RAM_AMOUNT_4MB                   0x00000001
  33 #       define NV04_PFB_BOOT_0_RAM_AMOUNT_8MB                   0x00000002
  34 #       define NV04_PFB_BOOT_0_RAM_AMOUNT_16MB                  0x00000003
  35 #       define NV04_PFB_BOOT_0_RAM_WIDTH_128                    0x00000004
  36 #       define NV04_PFB_BOOT_0_RAM_TYPE                         0x00000028
  37 #       define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT             0x00000000
  38 #       define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT            0x00000008
  39 #       define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT_4BANK      0x00000010
  40 #       define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_16MBIT            0x00000018
  41 #       define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBIT            0x00000020
  42 #       define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBITX16         0x00000028
  43 #       define NV04_PFB_BOOT_0_UMA_ENABLE                       0x00000100
  44 #       define NV04_PFB_BOOT_0_UMA_SIZE                         0x0000f000
  45 #define NV04_PFB_DEBUG_0                                        0x00100080
  46 #       define NV04_PFB_DEBUG_0_PAGE_MODE                       0x00000001
  47 #       define NV04_PFB_DEBUG_0_REFRESH_OFF                     0x00000010
  48 #       define NV04_PFB_DEBUG_0_REFRESH_COUNTX64                0x00003f00
  49 #       define NV04_PFB_DEBUG_0_REFRESH_SLOW_CLK                0x00004000
  50 #       define NV04_PFB_DEBUG_0_SAFE_MODE                       0x00008000
  51 #       define NV04_PFB_DEBUG_0_ALOM_ENABLE                     0x00010000
  52 #       define NV04_PFB_DEBUG_0_CASOE                           0x00100000
  53 #       define NV04_PFB_DEBUG_0_CKE_INVERT                      0x10000000
  54 #       define NV04_PFB_DEBUG_0_REFINC                          0x20000000
  55 #       define NV04_PFB_DEBUG_0_SAVE_POWER_OFF                  0x40000000
  56 #define NV04_PFB_CFG0                                           0x00100200
  57 #       define NV04_PFB_CFG0_SCRAMBLE                           0x20000000
  58 #define NV04_PFB_CFG1                                           0x00100204
  59 #define NV04_PFB_SCRAMBLE(i)                         (0x00100400 + 4 * (i))
  60
  61 #define NV10_PFB_REFCTRL                                        0x00100210
  62 #       define NV10_PFB_REFCTRL_VALID_1                         (1 << 31)
  63
  64 static inline struct io_mapping *
  65 fbmem_init(struct nouveau_device *dev)
  66 {
  67         return io_mapping_create_wc(nv_device_resource_start(dev, 1),
  68                                     nv_device_resource_len(dev, 1));
  69 }
  70
  71 static inline void
  72 fbmem_fini(struct io_mapping *fb)
  73 {
  74         io_mapping_free(fb);
  75 }
  76
  77 static inline u32
  78 fbmem_peek(struct io_mapping *fb, u32 off)
  79 {
  80         u8 __iomem *p = io_mapping_map_atomic_wc(fb, off & PAGE_MASK);
  81         u32 val = ioread32(p + (off & ~PAGE_MASK));
  82         io_mapping_unmap_atomic(p);
  83         return val;
  84 }
  85
  86 static inline void
  87 fbmem_poke(struct io_mapping *fb, u32 off, u32 val)
  88 {
  89         u8 __iomem *p = io_mapping_map_atomic_wc(fb, off & PAGE_MASK);
  90         iowrite32(val, p + (off & ~PAGE_MASK));
  91         wmb();
  92         io_mapping_unmap_atomic(p);
  93 }
  94
  95 static inline bool
  96 fbmem_readback(struct io_mapping *fb, u32 off, u32 val)
  97 {
  98         fbmem_poke(fb, off, val);
  99         return val == fbmem_peek(fb, off);
 100 }