drivers/gpu/drm/nouveau/core/subdev/gpio/nv10.c

   1 /*
   2  * Copyright (C) 2009 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "priv.h"
  28
  29 struct nv10_gpio_priv {
  30         struct nouveau_gpio base;
  31 };
  32
  33 static int
  34 nv10_gpio_sense(struct nouveau_gpio *gpio, int line)
  35 {
  36         if (line < 2) {
  37                 line = line * 16;
  38                 line = nv_rd32(gpio, 0x600818) >> line;
  39                 return !!(line & 0x0100);
  40         } else
  41         if (line < 10) {
  42                 line = (line - 2) * 4;
  43                 line = nv_rd32(gpio, 0x60081c) >> line;
  44                 return !!(line & 0x04);
  45         } else
  46         if (line < 14) {
  47                 line = (line - 10) * 4;
  48                 line = nv_rd32(gpio, 0x600850) >> line;
  49                 return !!(line & 0x04);
  50         }
  51
  52         return -EINVAL;
  53 }
  54
  55 static int
  56 nv10_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
  57 {
  58         u32 reg, mask, data;
  59
  60         if (line < 2) {
  61                 line = line * 16;
  62                 reg  = 0x600818;
  63                 mask = 0x00000011;
  64                 data = (dir << 4) | out;
  65         } else
  66         if (line < 10) {
  67                 line = (line - 2) * 4;
  68                 reg  = 0x60081c;
  69                 mask = 0x00000003;
  70                 data = (dir << 1) | out;
  71         } else
  72         if (line < 14) {
  73                 line = (line - 10) * 4;
  74                 reg  = 0x600850;
  75                 mask = 0x00000003;
  76                 data = (dir << 1) | out;
  77         } else {
  78                 return -EINVAL;
  79         }
  80
  81         nv_mask(gpio, reg, mask << line, data << line);
  82         return 0;
  83 }
  84
  85 static void
  86 nv10_gpio_intr(struct nouveau_subdev *subdev)
  87 {
  88         struct nv10_gpio_priv *priv = (void *)subdev;
  89         u32 intr = nv_rd32(priv, 0x001104);
  90         u32 hi = (intr & 0x0000ffff) >> 0;
  91         u32 lo = (intr & 0xffff0000) >> 16;
  92         int i;
  93
  94         for (i = 0; (hi | lo) && i < 32; i++) {
  95                 if ((hi | lo) & (1 << i))
  96                         nouveau_event_trigger(priv->base.events, 1, i);
  97         }
  98
  99         nv_wr32(priv, 0x001104, intr);
 100 }
 101
 102 static void
 103 nv10_gpio_intr_enable(struct nouveau_event *event, int line)
 104 {
 105         nv_wr32(event->priv, 0x001104, 0x00010001 << line);
 106         nv_mask(event->priv, 0x001144, 0x00010001 << line, 0x00010001 << line);
 107 }
 108
 109 static void
 110 nv10_gpio_intr_disable(struct nouveau_event *event, int line)
 111 {
 112         nv_wr32(event->priv, 0x001104, 0x00010001 << line);
 113         nv_mask(event->priv, 0x001144, 0x00010001 << line, 0x00000000);
 114 }
 115
 116 static int
 117 nv10_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 118                struct nouveau_oclass *oclass, void *data, u32 size,
 119                struct nouveau_object **pobject)
 120 {
 121         struct nv10_gpio_priv *priv;
 122         int ret;
 123
 124         ret = nouveau_gpio_create(parent, engine, oclass, 16, &priv);
 125         *pobject = nv_object(priv);
 126         if (ret)
 127                 return ret;
 128
 129         priv->base.drive = nv10_gpio_drive;
 130         priv->base.sense = nv10_gpio_sense;
 131         priv->base.events->priv = priv;
 132         priv->base.events->enable = nv10_gpio_intr_enable;
 133         priv->base.events->disable = nv10_gpio_intr_disable;
 134         nv_subdev(priv)->intr = nv10_gpio_intr;
 135         return 0;
 136 }
 137
 138 static void
 139 nv10_gpio_dtor(struct nouveau_object *object)
 140 {
 141         struct nv10_gpio_priv *priv = (void *)object;
 142         nouveau_gpio_destroy(&priv->base);
 143 }
 144
 145 static int
 146 nv10_gpio_init(struct nouveau_object *object)
 147 {
 148         struct nv10_gpio_priv *priv = (void *)object;
 149         int ret;
 150
 151         ret = nouveau_gpio_init(&priv->base);
 152         if (ret)
 153                 return ret;
 154
 155         nv_wr32(priv, 0x001144, 0x00000000);
 156         nv_wr32(priv, 0x001104, 0xffffffff);
 157         return 0;
 158 }
 159
 160 static int
 161 nv10_gpio_fini(struct nouveau_object *object, bool suspend)
 162 {
 163         struct nv10_gpio_priv *priv = (void *)object;
 164         nv_wr32(priv, 0x001144, 0x00000000);
 165         return nouveau_gpio_fini(&priv->base, suspend);
 166 }
 167
 168 struct nouveau_oclass *
 169 nv10_gpio_oclass = &(struct nouveau_oclass) {
 170         .handle = NV_SUBDEV(GPIO, 0x10),
 171         .ofuncs = &(struct nouveau_ofuncs) {
 172                 .ctor = nv10_gpio_ctor,
 173                 .dtor = nv10_gpio_dtor,
 174                 .init = nv10_gpio_init,
 175                 .fini = nv10_gpio_fini,
 176         },
 177 };