2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 struct nvd0_gpio_priv
{
28 struct nouveau_gpio base
;
32 nvd0_gpio_reset(struct nouveau_gpio
*gpio
, u8 match
)
34 struct nouveau_bios
*bios
= nouveau_bios(gpio
);
35 struct nvd0_gpio_priv
*priv
= (void *)gpio
;
40 while ((entry
= dcb_gpio_entry(bios
, 0, ++ent
, &ver
, &len
))) {
41 u32 data
= nv_ro32(bios
, entry
);
42 u8 line
= (data
& 0x0000003f);
43 u8 defs
= !!(data
& 0x00000080);
44 u8 func
= (data
& 0x0000ff00) >> 8;
45 u8 unk0
= (data
& 0x00ff0000) >> 16;
46 u8 unk1
= (data
& 0x1f000000) >> 24;
48 if ( func
== DCB_GPIO_UNUSED
||
49 (match
!= DCB_GPIO_UNUSED
&& match
!= func
))
52 gpio
->set(gpio
, 0, func
, line
, defs
);
54 nv_mask(priv
, 0x00d610 + (line
* 4), 0xff, unk0
);
56 nv_mask(priv
, 0x00d740 + (unk1
* 4), 0xff, line
);
61 nvd0_gpio_drive(struct nouveau_gpio
*gpio
, int line
, int dir
, int out
)
63 u32 data
= ((dir
^ 1) << 13) | (out
<< 12);
64 nv_mask(gpio
, 0x00d610 + (line
* 4), 0x00003000, data
);
65 nv_mask(gpio
, 0x00d604, 0x00000001, 0x00000001); /* update? */
70 nvd0_gpio_sense(struct nouveau_gpio
*gpio
, int line
)
72 return !!(nv_rd32(gpio
, 0x00d610 + (line
* 4)) & 0x00004000);
76 nvd0_gpio_ctor(struct nouveau_object
*parent
, struct nouveau_object
*engine
,
77 struct nouveau_oclass
*oclass
, void *data
, u32 size
,
78 struct nouveau_object
**pobject
)
80 struct nvd0_gpio_priv
*priv
;
83 ret
= nouveau_gpio_create(parent
, engine
, oclass
, &priv
);
84 *pobject
= nv_object(priv
);
88 priv
->base
.reset
= nvd0_gpio_reset
;
89 priv
->base
.drive
= nvd0_gpio_drive
;
90 priv
->base
.sense
= nvd0_gpio_sense
;
91 priv
->base
.events
->priv
= priv
;
92 priv
->base
.events
->enable
= nv50_gpio_intr_enable
;
93 priv
->base
.events
->disable
= nv50_gpio_intr_disable
;
94 nv_subdev(priv
)->intr
= nv50_gpio_intr
;
98 struct nouveau_oclass
*
99 nvd0_gpio_oclass
= &(struct nouveau_gpio_impl
) {
100 .base
.handle
= NV_SUBDEV(GPIO
, 0xd0),
101 .base
.ofuncs
= &(struct nouveau_ofuncs
) {
102 .ctor
= nvd0_gpio_ctor
,
103 .dtor
= nv50_gpio_dtor
,
104 .init
= nv50_gpio_init
,
105 .fini
= nv50_gpio_fini
,
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