support for platform devices
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_bios.c
1 /*
2 * Copyright 2005-2006 Erik Waling
3 * Copyright 2006 Stephane Marchesin
4 * Copyright 2007-2009 Stuart Bennett
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include <subdev/bios.h>
26
27 #include <drm/drmP.h>
28
29 #include "nouveau_drm.h"
30 #include "nouveau_reg.h"
31 #include "dispnv04/hw.h"
32 #include "nouveau_encoder.h"
33
34 #include <linux/io-mapping.h>
35 #include <linux/firmware.h>
36
37 /* these defines are made up */
38 #define NV_CIO_CRE_44_HEADA 0x0
39 #define NV_CIO_CRE_44_HEADB 0x3
40 #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */
41
42 #define EDID1_LEN 128
43
44 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
45 #define LOG_OLD_VALUE(x)
46
47 struct init_exec {
48 bool execute;
49 bool repeat;
50 };
51
52 static bool nv_cksum(const uint8_t *data, unsigned int length)
53 {
54 /*
55 * There's a few checksums in the BIOS, so here's a generic checking
56 * function.
57 */
58 int i;
59 uint8_t sum = 0;
60
61 for (i = 0; i < length; i++)
62 sum += data[i];
63
64 if (sum)
65 return true;
66
67 return false;
68 }
69
70 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
71 {
72 int compare_record_len, i = 0;
73 uint16_t compareclk, scriptptr = 0;
74
75 if (bios->major_version < 5) /* pre BIT */
76 compare_record_len = 3;
77 else
78 compare_record_len = 4;
79
80 do {
81 compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
82 if (pxclk >= compareclk * 10) {
83 if (bios->major_version < 5) {
84 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
85 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
86 } else
87 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
88 break;
89 }
90 i++;
91 } while (compareclk);
92
93 return scriptptr;
94 }
95
96 static void
97 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
98 struct dcb_output *dcbent, int head, bool dl)
99 {
100 struct nouveau_drm *drm = nouveau_drm(dev);
101
102 NV_INFO(drm, "0x%04X: Parsing digital output script table\n",
103 scriptptr);
104 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB :
105 NV_CIO_CRE_44_HEADA);
106 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head);
107
108 nv04_dfp_bind_head(dev, dcbent, head, dl);
109 }
110
111 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)
112 {
113 struct nouveau_drm *drm = nouveau_drm(dev);
114 struct nvbios *bios = &drm->vbios;
115 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
116 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
117
118 if (!bios->fp.xlated_entry || !sub || !scriptofs)
119 return -EINVAL;
120
121 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);
122
123 if (script == LVDS_PANEL_OFF) {
124 /* off-on delay in ms */
125 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));
126 }
127 #ifdef __powerpc__
128 /* Powerbook specific quirks */
129 if (script == LVDS_RESET &&
130 (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 ||
131 dev->pdev->device == 0x0329))
132 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
133 #endif
134
135 return 0;
136 }
137
138 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
139 {
140 /*
141 * The BIT LVDS table's header has the information to setup the
142 * necessary registers. Following the standard 4 byte header are:
143 * A bitmask byte and a dual-link transition pxclk value for use in
144 * selecting the init script when not using straps; 4 script pointers
145 * for panel power, selected by output and on/off; and 8 table pointers
146 * for panel init, the needed one determined by output, and bits in the
147 * conf byte. These tables are similar to the TMDS tables, consisting
148 * of a list of pxclks and script pointers.
149 */
150 struct nouveau_drm *drm = nouveau_drm(dev);
151 struct nvbios *bios = &drm->vbios;
152 unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
153 uint16_t scriptptr = 0, clktable;
154
155 /*
156 * For now we assume version 3.0 table - g80 support will need some
157 * changes
158 */
159
160 switch (script) {
161 case LVDS_INIT:
162 return -ENOSYS;
163 case LVDS_BACKLIGHT_ON:
164 case LVDS_PANEL_ON:
165 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
166 break;
167 case LVDS_BACKLIGHT_OFF:
168 case LVDS_PANEL_OFF:
169 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
170 break;
171 case LVDS_RESET:
172 clktable = bios->fp.lvdsmanufacturerpointer + 15;
173 if (dcbent->or == 4)
174 clktable += 8;
175
176 if (dcbent->lvdsconf.use_straps_for_mode) {
177 if (bios->fp.dual_link)
178 clktable += 4;
179 if (bios->fp.if_is_24bit)
180 clktable += 2;
181 } else {
182 /* using EDID */
183 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;
184
185 if (bios->fp.dual_link) {
186 clktable += 4;
187 cmpval_24bit <<= 1;
188 }
189
190 if (bios->fp.strapless_is_24bit & cmpval_24bit)
191 clktable += 2;
192 }
193
194 clktable = ROM16(bios->data[clktable]);
195 if (!clktable) {
196 NV_ERROR(drm, "Pixel clock comparison table not found\n");
197 return -ENOENT;
198 }
199 scriptptr = clkcmptable(bios, clktable, pxclk);
200 }
201
202 if (!scriptptr) {
203 NV_ERROR(drm, "LVDS output init script not found\n");
204 return -ENOENT;
205 }
206 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);
207
208 return 0;
209 }
210
211 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
212 {
213 /*
214 * LVDS operations are multiplexed in an effort to present a single API
215 * which works with two vastly differing underlying structures.
216 * This acts as the demux
217 */
218
219 struct nouveau_drm *drm = nouveau_drm(dev);
220 struct nouveau_device *device = nv_device(drm->device);
221 struct nvbios *bios = &drm->vbios;
222 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
223 uint32_t sel_clk_binding, sel_clk;
224 int ret;
225
226 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
227 (lvds_ver >= 0x30 && script == LVDS_INIT))
228 return 0;
229
230 if (!bios->fp.lvds_init_run) {
231 bios->fp.lvds_init_run = true;
232 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);
233 }
234
235 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
236 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);
237 if (script == LVDS_RESET && bios->fp.power_off_for_reset)
238 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);
239
240 NV_INFO(drm, "Calling LVDS script %d:\n", script);
241
242 /* don't let script change pll->head binding */
243 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
244
245 if (lvds_ver < 0x30)
246 ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
247 else
248 ret = run_lvds_table(dev, dcbent, head, script, pxclk);
249
250 bios->fp.last_script_invoc = (script << 1 | head);
251
252 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
253 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
254 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */
255 nv_wr32(device, NV_PBUS_POWERCTRL_2, 0);
256
257 return ret;
258 }
259
260 struct lvdstableheader {
261 uint8_t lvds_ver, headerlen, recordlen;
262 };
263
264 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
265 {
266 /*
267 * BMP version (0xa) LVDS table has a simple header of version and
268 * record length. The BIT LVDS table has the typical BIT table header:
269 * version byte, header length byte, record length byte, and a byte for
270 * the maximum number of records that can be held in the table.
271 */
272
273 struct nouveau_drm *drm = nouveau_drm(dev);
274 uint8_t lvds_ver, headerlen, recordlen;
275
276 memset(lth, 0, sizeof(struct lvdstableheader));
277
278 if (bios->fp.lvdsmanufacturerpointer == 0x0) {
279 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");
280 return -EINVAL;
281 }
282
283 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
284
285 switch (lvds_ver) {
286 case 0x0a: /* pre NV40 */
287 headerlen = 2;
288 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
289 break;
290 case 0x30: /* NV4x */
291 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
292 if (headerlen < 0x1f) {
293 NV_ERROR(drm, "LVDS table header not understood\n");
294 return -EINVAL;
295 }
296 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
297 break;
298 case 0x40: /* G80/G90 */
299 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
300 if (headerlen < 0x7) {
301 NV_ERROR(drm, "LVDS table header not understood\n");
302 return -EINVAL;
303 }
304 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
305 break;
306 default:
307 NV_ERROR(drm,
308 "LVDS table revision %d.%d not currently supported\n",
309 lvds_ver >> 4, lvds_ver & 0xf);
310 return -ENOSYS;
311 }
312
313 lth->lvds_ver = lvds_ver;
314 lth->headerlen = headerlen;
315 lth->recordlen = recordlen;
316
317 return 0;
318 }
319
320 static int
321 get_fp_strap(struct drm_device *dev, struct nvbios *bios)
322 {
323 struct nouveau_device *device = nouveau_dev(dev);
324
325 /*
326 * The fp strap is normally dictated by the "User Strap" in
327 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the
328 * Internal_Flags struct at 0x48 is set, the user strap gets overriden
329 * by the PCI subsystem ID during POST, but not before the previous user
330 * strap has been committed to CR58 for CR57=0xf on head A, which may be
331 * read and used instead
332 */
333
334 if (bios->major_version < 5 && bios->data[0x48] & 0x4)
335 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
336
337 if (device->card_type >= NV_50)
338 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
339 else
340 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
341 }
342
343 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
344 {
345 struct nouveau_drm *drm = nouveau_drm(dev);
346 uint8_t *fptable;
347 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
348 int ret, ofs, fpstrapping;
349 struct lvdstableheader lth;
350
351 if (bios->fp.fptablepointer == 0x0) {
352 /* Apple cards don't have the fp table; the laptops use DDC */
353 /* The table is also missing on some x86 IGPs */
354 #ifndef __powerpc__
355 NV_ERROR(drm, "Pointer to flat panel table invalid\n");
356 #endif
357 bios->digital_min_front_porch = 0x4b;
358 return 0;
359 }
360
361 fptable = &bios->data[bios->fp.fptablepointer];
362 fptable_ver = fptable[0];
363
364 switch (fptable_ver) {
365 /*
366 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no
367 * version field, and miss one of the spread spectrum/PWM bytes.
368 * This could affect early GF2Go parts (not seen any appropriate ROMs
369 * though). Here we assume that a version of 0x05 matches this case
370 * (combining with a BMP version check would be better), as the
371 * common case for the panel type field is 0x0005, and that is in
372 * fact what we are reading the first byte of.
373 */
374 case 0x05: /* some NV10, 11, 15, 16 */
375 recordlen = 42;
376 ofs = -1;
377 break;
378 case 0x10: /* some NV15/16, and NV11+ */
379 recordlen = 44;
380 ofs = 0;
381 break;
382 case 0x20: /* NV40+ */
383 headerlen = fptable[1];
384 recordlen = fptable[2];
385 fpentries = fptable[3];
386 /*
387 * fptable[4] is the minimum
388 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap
389 */
390 bios->digital_min_front_porch = fptable[4];
391 ofs = -7;
392 break;
393 default:
394 NV_ERROR(drm,
395 "FP table revision %d.%d not currently supported\n",
396 fptable_ver >> 4, fptable_ver & 0xf);
397 return -ENOSYS;
398 }
399
400 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */
401 return 0;
402
403 ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
404 if (ret)
405 return ret;
406
407 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
408 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
409 lth.headerlen + 1;
410 bios->fp.xlatwidth = lth.recordlen;
411 }
412 if (bios->fp.fpxlatetableptr == 0x0) {
413 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");
414 return -EINVAL;
415 }
416
417 fpstrapping = get_fp_strap(dev, bios);
418
419 fpindex = bios->data[bios->fp.fpxlatetableptr +
420 fpstrapping * bios->fp.xlatwidth];
421
422 if (fpindex > fpentries) {
423 NV_ERROR(drm, "Bad flat panel table index\n");
424 return -ENOENT;
425 }
426
427 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */
428 if (lth.lvds_ver > 0x10)
429 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
430
431 /*
432 * If either the strap or xlated fpindex value are 0xf there is no
433 * panel using a strap-derived bios mode present. this condition
434 * includes, but is different from, the DDC panel indicator above
435 */
436 if (fpstrapping == 0xf || fpindex == 0xf)
437 return 0;
438
439 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
440 recordlen * fpindex + ofs;
441
442 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
443 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
444 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
445 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
446
447 return 0;
448 }
449
450 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
451 {
452 struct nouveau_drm *drm = nouveau_drm(dev);
453 struct nvbios *bios = &drm->vbios;
454 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
455
456 if (!mode) /* just checking whether we can produce a mode */
457 return bios->fp.mode_ptr;
458
459 memset(mode, 0, sizeof(struct drm_display_mode));
460 /*
461 * For version 1.0 (version in byte 0):
462 * bytes 1-2 are "panel type", including bits on whether Colour/mono,
463 * single/dual link, and type (TFT etc.)
464 * bytes 3-6 are bits per colour in RGBX
465 */
466 mode->clock = ROM16(mode_entry[7]) * 10;
467 /* bytes 9-10 is HActive */
468 mode->hdisplay = ROM16(mode_entry[11]) + 1;
469 /*
470 * bytes 13-14 is HValid Start
471 * bytes 15-16 is HValid End
472 */
473 mode->hsync_start = ROM16(mode_entry[17]) + 1;
474 mode->hsync_end = ROM16(mode_entry[19]) + 1;
475 mode->htotal = ROM16(mode_entry[21]) + 1;
476 /* bytes 23-24, 27-30 similarly, but vertical */
477 mode->vdisplay = ROM16(mode_entry[25]) + 1;
478 mode->vsync_start = ROM16(mode_entry[31]) + 1;
479 mode->vsync_end = ROM16(mode_entry[33]) + 1;
480 mode->vtotal = ROM16(mode_entry[35]) + 1;
481 mode->flags |= (mode_entry[37] & 0x10) ?
482 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
483 mode->flags |= (mode_entry[37] & 0x1) ?
484 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
485 /*
486 * bytes 38-39 relate to spread spectrum settings
487 * bytes 40-43 are something to do with PWM
488 */
489
490 mode->status = MODE_OK;
491 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
492 drm_mode_set_name(mode);
493 return bios->fp.mode_ptr;
494 }
495
496 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
497 {
498 /*
499 * The LVDS table header is (mostly) described in
500 * parse_lvds_manufacturer_table_header(): the BIT header additionally
501 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if
502 * straps are not being used for the panel, this specifies the frequency
503 * at which modes should be set up in the dual link style.
504 *
505 * Following the header, the BMP (ver 0xa) table has several records,
506 * indexed by a separate xlat table, indexed in turn by the fp strap in
507 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
508 * numbers for use by INIT_SUB which controlled panel init and power,
509 * and finally a dword of ms to sleep between power off and on
510 * operations.
511 *
512 * In the BIT versions, the table following the header serves as an
513 * integrated config and xlat table: the records in the table are
514 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has
515 * two bytes - the first as a config byte, the second for indexing the
516 * fp mode table pointed to by the BIT 'D' table
517 *
518 * DDC is not used until after card init, so selecting the correct table
519 * entry and setting the dual link flag for EDID equipped panels,
520 * requiring tests against the native-mode pixel clock, cannot be done
521 * until later, when this function should be called with non-zero pxclk
522 */
523 struct nouveau_drm *drm = nouveau_drm(dev);
524 struct nvbios *bios = &drm->vbios;
525 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
526 struct lvdstableheader lth;
527 uint16_t lvdsofs;
528 int ret, chip_version = bios->chip_version;
529
530 ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
531 if (ret)
532 return ret;
533
534 switch (lth.lvds_ver) {
535 case 0x0a: /* pre NV40 */
536 lvdsmanufacturerindex = bios->data[
537 bios->fp.fpxlatemanufacturertableptr +
538 fpstrapping];
539
540 /* we're done if this isn't the EDID panel case */
541 if (!pxclk)
542 break;
543
544 if (chip_version < 0x25) {
545 /* nv17 behaviour
546 *
547 * It seems the old style lvds script pointer is reused
548 * to select 18/24 bit colour depth for EDID panels.
549 */
550 lvdsmanufacturerindex =
551 (bios->legacy.lvds_single_a_script_ptr & 1) ?
552 2 : 0;
553 if (pxclk >= bios->fp.duallink_transition_clk)
554 lvdsmanufacturerindex++;
555 } else if (chip_version < 0x30) {
556 /* nv28 behaviour (off-chip encoder)
557 *
558 * nv28 does a complex dance of first using byte 121 of
559 * the EDID to choose the lvdsmanufacturerindex, then
560 * later attempting to match the EDID manufacturer and
561 * product IDs in a table (signature 'pidt' (panel id
562 * table?)), setting an lvdsmanufacturerindex of 0 and
563 * an fp strap of the match index (or 0xf if none)
564 */
565 lvdsmanufacturerindex = 0;
566 } else {
567 /* nv31, nv34 behaviour */
568 lvdsmanufacturerindex = 0;
569 if (pxclk >= bios->fp.duallink_transition_clk)
570 lvdsmanufacturerindex = 2;
571 if (pxclk >= 140000)
572 lvdsmanufacturerindex = 3;
573 }
574
575 /*
576 * nvidia set the high nibble of (cr57=f, cr58) to
577 * lvdsmanufacturerindex in this case; we don't
578 */
579 break;
580 case 0x30: /* NV4x */
581 case 0x40: /* G80/G90 */
582 lvdsmanufacturerindex = fpstrapping;
583 break;
584 default:
585 NV_ERROR(drm, "LVDS table revision not currently supported\n");
586 return -ENOSYS;
587 }
588
589 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
590 switch (lth.lvds_ver) {
591 case 0x0a:
592 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
593 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
594 bios->fp.dual_link = bios->data[lvdsofs] & 4;
595 bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
596 *if_is_24bit = bios->data[lvdsofs] & 16;
597 break;
598 case 0x30:
599 case 0x40:
600 /*
601 * No sign of the "power off for reset" or "reset for panel
602 * on" bits, but it's safer to assume we should
603 */
604 bios->fp.power_off_for_reset = true;
605 bios->fp.reset_after_pclk_change = true;
606
607 /*
608 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is
609 * over-written, and if_is_24bit isn't used
610 */
611 bios->fp.dual_link = bios->data[lvdsofs] & 1;
612 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
613 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
614 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
615 break;
616 }
617
618 /* set dual_link flag for EDID case */
619 if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
620 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
621
622 *dl = bios->fp.dual_link;
623
624 return 0;
625 }
626
627 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)
628 {
629 /*
630 * the pxclk parameter is in kHz
631 *
632 * This runs the TMDS regs setting code found on BIT bios cards
633 *
634 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and
635 * ffs(or) == 3, use the second.
636 */
637
638 struct nouveau_drm *drm = nouveau_drm(dev);
639 struct nouveau_device *device = nv_device(drm->device);
640 struct nvbios *bios = &drm->vbios;
641 int cv = bios->chip_version;
642 uint16_t clktable = 0, scriptptr;
643 uint32_t sel_clk_binding, sel_clk;
644
645 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */
646 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
647 dcbent->location != DCB_LOC_ON_CHIP)
648 return 0;
649
650 switch (ffs(dcbent->or)) {
651 case 1:
652 clktable = bios->tmds.output0_script_ptr;
653 break;
654 case 2:
655 case 3:
656 clktable = bios->tmds.output1_script_ptr;
657 break;
658 }
659
660 if (!clktable) {
661 NV_ERROR(drm, "Pixel clock comparison table not found\n");
662 return -EINVAL;
663 }
664
665 scriptptr = clkcmptable(bios, clktable, pxclk);
666
667 if (!scriptptr) {
668 NV_ERROR(drm, "TMDS output init script not found\n");
669 return -ENOENT;
670 }
671
672 /* don't let script change pll->head binding */
673 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
674 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);
675 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
676 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
677
678 return 0;
679 }
680
681 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
682 {
683 /*
684 * Parses the init table segment for pointers used in script execution.
685 *
686 * offset + 0 (16 bits): init script tables pointer
687 * offset + 2 (16 bits): macro index table pointer
688 * offset + 4 (16 bits): macro table pointer
689 * offset + 6 (16 bits): condition table pointer
690 * offset + 8 (16 bits): io condition table pointer
691 * offset + 10 (16 bits): io flag condition table pointer
692 * offset + 12 (16 bits): init function table pointer
693 */
694
695 bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
696 }
697
698 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
699 {
700 /*
701 * Parses the load detect values for g80 cards.
702 *
703 * offset + 0 (16 bits): loadval table pointer
704 */
705
706 struct nouveau_drm *drm = nouveau_drm(dev);
707 uint16_t load_table_ptr;
708 uint8_t version, headerlen, entrylen, num_entries;
709
710 if (bitentry->length != 3) {
711 NV_ERROR(drm, "Do not understand BIT A table\n");
712 return -EINVAL;
713 }
714
715 load_table_ptr = ROM16(bios->data[bitentry->offset]);
716
717 if (load_table_ptr == 0x0) {
718 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");
719 return -EINVAL;
720 }
721
722 version = bios->data[load_table_ptr];
723
724 if (version != 0x10) {
725 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",
726 version >> 4, version & 0xF);
727 return -ENOSYS;
728 }
729
730 headerlen = bios->data[load_table_ptr + 1];
731 entrylen = bios->data[load_table_ptr + 2];
732 num_entries = bios->data[load_table_ptr + 3];
733
734 if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
735 NV_ERROR(drm, "Do not understand BIT loadval table\n");
736 return -EINVAL;
737 }
738
739 /* First entry is normal dac, 2nd tv-out perhaps? */
740 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
741
742 return 0;
743 }
744
745 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
746 {
747 /*
748 * Parses the flat panel table segment that the bit entry points to.
749 * Starting at bitentry->offset:
750 *
751 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte
752 * records beginning with a freq.
753 * offset + 2 (16 bits): mode table pointer
754 */
755 struct nouveau_drm *drm = nouveau_drm(dev);
756
757 if (bitentry->length != 4) {
758 NV_ERROR(drm, "Do not understand BIT display table\n");
759 return -EINVAL;
760 }
761
762 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
763
764 return 0;
765 }
766
767 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
768 {
769 /*
770 * Parses the init table segment that the bit entry points to.
771 *
772 * See parse_script_table_pointers for layout
773 */
774 struct nouveau_drm *drm = nouveau_drm(dev);
775
776 if (bitentry->length < 14) {
777 NV_ERROR(drm, "Do not understand init table\n");
778 return -EINVAL;
779 }
780
781 parse_script_table_pointers(bios, bitentry->offset);
782 return 0;
783 }
784
785 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
786 {
787 /*
788 * BIT 'i' (info?) table
789 *
790 * offset + 0 (32 bits): BIOS version dword (as in B table)
791 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?)
792 * offset + 13 (16 bits): pointer to table containing DAC load
793 * detection comparison values
794 *
795 * There's other things in the table, purpose unknown
796 */
797
798 struct nouveau_drm *drm = nouveau_drm(dev);
799 uint16_t daccmpoffset;
800 uint8_t dacver, dacheaderlen;
801
802 if (bitentry->length < 6) {
803 NV_ERROR(drm, "BIT i table too short for needed information\n");
804 return -EINVAL;
805 }
806
807 /*
808 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's
809 * Quadro identity crisis), other bits possibly as for BMP feature byte
810 */
811 bios->feature_byte = bios->data[bitentry->offset + 5];
812 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
813
814 if (bitentry->length < 15) {
815 NV_WARN(drm, "BIT i table not long enough for DAC load "
816 "detection comparison table\n");
817 return -EINVAL;
818 }
819
820 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
821
822 /* doesn't exist on g80 */
823 if (!daccmpoffset)
824 return 0;
825
826 /*
827 * The first value in the table, following the header, is the
828 * comparison value, the second entry is a comparison value for
829 * TV load detection.
830 */
831
832 dacver = bios->data[daccmpoffset];
833 dacheaderlen = bios->data[daccmpoffset + 1];
834
835 if (dacver != 0x00 && dacver != 0x10) {
836 NV_WARN(drm, "DAC load detection comparison table version "
837 "%d.%d not known\n", dacver >> 4, dacver & 0xf);
838 return -ENOSYS;
839 }
840
841 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
842 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
843
844 return 0;
845 }
846
847 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
848 {
849 /*
850 * Parses the LVDS table segment that the bit entry points to.
851 * Starting at bitentry->offset:
852 *
853 * offset + 0 (16 bits): LVDS strap xlate table pointer
854 */
855
856 struct nouveau_drm *drm = nouveau_drm(dev);
857
858 if (bitentry->length != 2) {
859 NV_ERROR(drm, "Do not understand BIT LVDS table\n");
860 return -EINVAL;
861 }
862
863 /*
864 * No idea if it's still called the LVDS manufacturer table, but
865 * the concept's close enough.
866 */
867 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
868
869 return 0;
870 }
871
872 static int
873 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
874 struct bit_entry *bitentry)
875 {
876 /*
877 * offset + 2 (8 bits): number of options in an
878 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set
879 * offset + 3 (16 bits): pointer to strap xlate table for RAM
880 * restrict option selection
881 *
882 * There's a bunch of bits in this table other than the RAM restrict
883 * stuff that we don't use - their use currently unknown
884 */
885
886 /*
887 * Older bios versions don't have a sufficiently long table for
888 * what we want
889 */
890 if (bitentry->length < 0x5)
891 return 0;
892
893 if (bitentry->version < 2) {
894 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
895 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
896 } else {
897 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
898 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
899 }
900
901 return 0;
902 }
903
904 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
905 {
906 /*
907 * Parses the pointer to the TMDS table
908 *
909 * Starting at bitentry->offset:
910 *
911 * offset + 0 (16 bits): TMDS table pointer
912 *
913 * The TMDS table is typically found just before the DCB table, with a
914 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being
915 * length?)
916 *
917 * At offset +7 is a pointer to a script, which I don't know how to
918 * run yet.
919 * At offset +9 is a pointer to another script, likewise
920 * Offset +11 has a pointer to a table where the first word is a pxclk
921 * frequency and the second word a pointer to a script, which should be
922 * run if the comparison pxclk frequency is less than the pxclk desired.
923 * This repeats for decreasing comparison frequencies
924 * Offset +13 has a pointer to a similar table
925 * The selection of table (and possibly +7/+9 script) is dictated by
926 * "or" from the DCB.
927 */
928
929 struct nouveau_drm *drm = nouveau_drm(dev);
930 uint16_t tmdstableptr, script1, script2;
931
932 if (bitentry->length != 2) {
933 NV_ERROR(drm, "Do not understand BIT TMDS table\n");
934 return -EINVAL;
935 }
936
937 tmdstableptr = ROM16(bios->data[bitentry->offset]);
938 if (!tmdstableptr) {
939 NV_ERROR(drm, "Pointer to TMDS table invalid\n");
940 return -EINVAL;
941 }
942
943 NV_INFO(drm, "TMDS table version %d.%d\n",
944 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
945
946 /* nv50+ has v2.0, but we don't parse it atm */
947 if (bios->data[tmdstableptr] != 0x11)
948 return -ENOSYS;
949
950 /*
951 * These two scripts are odd: they don't seem to get run even when
952 * they are not stubbed.
953 */
954 script1 = ROM16(bios->data[tmdstableptr + 7]);
955 script2 = ROM16(bios->data[tmdstableptr + 9]);
956 if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
957 NV_WARN(drm, "TMDS table script pointers not stubbed\n");
958
959 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
960 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
961
962 return 0;
963 }
964
965 struct bit_table {
966 const char id;
967 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
968 };
969
970 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
971
972 int
973 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)
974 {
975 struct nouveau_drm *drm = nouveau_drm(dev);
976 struct nvbios *bios = &drm->vbios;
977 u8 entries, *entry;
978
979 if (bios->type != NVBIOS_BIT)
980 return -ENODEV;
981
982 entries = bios->data[bios->offset + 10];
983 entry = &bios->data[bios->offset + 12];
984 while (entries--) {
985 if (entry[0] == id) {
986 bit->id = entry[0];
987 bit->version = entry[1];
988 bit->length = ROM16(entry[2]);
989 bit->offset = ROM16(entry[4]);
990 bit->data = ROMPTR(dev, entry[4]);
991 return 0;
992 }
993
994 entry += bios->data[bios->offset + 9];
995 }
996
997 return -ENOENT;
998 }
999
1000 static int
1001 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
1002 struct bit_table *table)
1003 {
1004 struct drm_device *dev = bios->dev;
1005 struct nouveau_drm *drm = nouveau_drm(dev);
1006 struct bit_entry bitentry;
1007
1008 if (bit_table(dev, table->id, &bitentry) == 0)
1009 return table->parse_fn(dev, bios, &bitentry);
1010
1011 NV_INFO(drm, "BIT table '%c' not found\n", table->id);
1012 return -ENOSYS;
1013 }
1014
1015 static int
1016 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
1017 {
1018 int ret;
1019
1020 /*
1021 * The only restriction on parsing order currently is having 'i' first
1022 * for use of bios->*_version or bios->feature_byte while parsing;
1023 * functions shouldn't be actually *doing* anything apart from pulling
1024 * data from the image into the bios struct, thus no interdependencies
1025 */
1026 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));
1027 if (ret) /* info? */
1028 return ret;
1029 if (bios->major_version >= 0x60) /* g80+ */
1030 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));
1031 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));
1032 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));
1033 if (ret)
1034 return ret;
1035 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */
1036 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));
1037 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));
1038
1039 return 0;
1040 }
1041
1042 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
1043 {
1044 /*
1045 * Parses the BMP structure for useful things, but does not act on them
1046 *
1047 * offset + 5: BMP major version
1048 * offset + 6: BMP minor version
1049 * offset + 9: BMP feature byte
1050 * offset + 10: BCD encoded BIOS version
1051 *
1052 * offset + 18: init script table pointer (for bios versions < 5.10h)
1053 * offset + 20: extra init script table pointer (for bios
1054 * versions < 5.10h)
1055 *
1056 * offset + 24: memory init table pointer (used on early bios versions)
1057 * offset + 26: SDR memory sequencing setup data table
1058 * offset + 28: DDR memory sequencing setup data table
1059 *
1060 * offset + 54: index of I2C CRTC pair to use for CRT output
1061 * offset + 55: index of I2C CRTC pair to use for TV output
1062 * offset + 56: index of I2C CRTC pair to use for flat panel output
1063 * offset + 58: write CRTC index for I2C pair 0
1064 * offset + 59: read CRTC index for I2C pair 0
1065 * offset + 60: write CRTC index for I2C pair 1
1066 * offset + 61: read CRTC index for I2C pair 1
1067 *
1068 * offset + 67: maximum internal PLL frequency (single stage PLL)
1069 * offset + 71: minimum internal PLL frequency (single stage PLL)
1070 *
1071 * offset + 75: script table pointers, as described in
1072 * parse_script_table_pointers
1073 *
1074 * offset + 89: TMDS single link output A table pointer
1075 * offset + 91: TMDS single link output B table pointer
1076 * offset + 95: LVDS single link output A table pointer
1077 * offset + 105: flat panel timings table pointer
1078 * offset + 107: flat panel strapping translation table pointer
1079 * offset + 117: LVDS manufacturer panel config table pointer
1080 * offset + 119: LVDS manufacturer strapping translation table pointer
1081 *
1082 * offset + 142: PLL limits table pointer
1083 *
1084 * offset + 156: minimum pixel clock for LVDS dual link
1085 */
1086
1087 struct nouveau_drm *drm = nouveau_drm(dev);
1088 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
1089 uint16_t bmplength;
1090 uint16_t legacy_scripts_offset, legacy_i2c_offset;
1091
1092 /* load needed defaults in case we can't parse this info */
1093 bios->digital_min_front_porch = 0x4b;
1094 bios->fmaxvco = 256000;
1095 bios->fminvco = 128000;
1096 bios->fp.duallink_transition_clk = 90000;
1097
1098 bmp_version_major = bmp[5];
1099 bmp_version_minor = bmp[6];
1100
1101 NV_INFO(drm, "BMP version %d.%d\n",
1102 bmp_version_major, bmp_version_minor);
1103
1104 /*
1105 * Make sure that 0x36 is blank and can't be mistaken for a DCB
1106 * pointer on early versions
1107 */
1108 if (bmp_version_major < 5)
1109 *(uint16_t *)&bios->data[0x36] = 0;
1110
1111 /*
1112 * Seems that the minor version was 1 for all major versions prior
1113 * to 5. Version 6 could theoretically exist, but I suspect BIT
1114 * happened instead.
1115 */
1116 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
1117 NV_ERROR(drm, "You have an unsupported BMP version. "
1118 "Please send in your bios\n");
1119 return -ENOSYS;
1120 }
1121
1122 if (bmp_version_major == 0)
1123 /* nothing that's currently useful in this version */
1124 return 0;
1125 else if (bmp_version_major == 1)
1126 bmplength = 44; /* exact for 1.01 */
1127 else if (bmp_version_major == 2)
1128 bmplength = 48; /* exact for 2.01 */
1129 else if (bmp_version_major == 3)
1130 bmplength = 54;
1131 /* guessed - mem init tables added in this version */
1132 else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
1133 /* don't know if 5.0 exists... */
1134 bmplength = 62;
1135 /* guessed - BMP I2C indices added in version 4*/
1136 else if (bmp_version_minor < 0x6)
1137 bmplength = 67; /* exact for 5.01 */
1138 else if (bmp_version_minor < 0x10)
1139 bmplength = 75; /* exact for 5.06 */
1140 else if (bmp_version_minor == 0x10)
1141 bmplength = 89; /* exact for 5.10h */
1142 else if (bmp_version_minor < 0x14)
1143 bmplength = 118; /* exact for 5.11h */
1144 else if (bmp_version_minor < 0x24)
1145 /*
1146 * Not sure of version where pll limits came in;
1147 * certainly exist by 0x24 though.
1148 */
1149 /* length not exact: this is long enough to get lvds members */
1150 bmplength = 123;
1151 else if (bmp_version_minor < 0x27)
1152 /*
1153 * Length not exact: this is long enough to get pll limit
1154 * member
1155 */
1156 bmplength = 144;
1157 else
1158 /*
1159 * Length not exact: this is long enough to get dual link
1160 * transition clock.
1161 */
1162 bmplength = 158;
1163
1164 /* checksum */
1165 if (nv_cksum(bmp, 8)) {
1166 NV_ERROR(drm, "Bad BMP checksum\n");
1167 return -EINVAL;
1168 }
1169
1170 /*
1171 * Bit 4 seems to indicate either a mobile bios or a quadro card --
1172 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl
1173 * (not nv10gl), bit 5 that the flat panel tables are present, and
1174 * bit 6 a tv bios.
1175 */
1176 bios->feature_byte = bmp[9];
1177
1178 if (bmp_version_major < 5 || bmp_version_minor < 0x10)
1179 bios->old_style_init = true;
1180 legacy_scripts_offset = 18;
1181 if (bmp_version_major < 2)
1182 legacy_scripts_offset -= 4;
1183 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
1184 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
1185
1186 if (bmp_version_major > 2) { /* appears in BMP 3 */
1187 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
1188 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
1189 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
1190 }
1191
1192 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */
1193 if (bmplength > 61)
1194 legacy_i2c_offset = offset + 54;
1195 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
1196 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
1197 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
1198
1199 if (bmplength > 74) {
1200 bios->fmaxvco = ROM32(bmp[67]);
1201 bios->fminvco = ROM32(bmp[71]);
1202 }
1203 if (bmplength > 88)
1204 parse_script_table_pointers(bios, offset + 75);
1205 if (bmplength > 94) {
1206 bios->tmds.output0_script_ptr = ROM16(bmp[89]);
1207 bios->tmds.output1_script_ptr = ROM16(bmp[91]);
1208 /*
1209 * Never observed in use with lvds scripts, but is reused for
1210 * 18/24 bit panel interface default for EDID equipped panels
1211 * (if_is_24bit not set directly to avoid any oscillation).
1212 */
1213 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
1214 }
1215 if (bmplength > 108) {
1216 bios->fp.fptablepointer = ROM16(bmp[105]);
1217 bios->fp.fpxlatetableptr = ROM16(bmp[107]);
1218 bios->fp.xlatwidth = 1;
1219 }
1220 if (bmplength > 120) {
1221 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
1222 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
1223 }
1224 #if 0
1225 if (bmplength > 143)
1226 bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
1227 #endif
1228
1229 if (bmplength > 157)
1230 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
1231
1232 return 0;
1233 }
1234
1235 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
1236 {
1237 int i, j;
1238
1239 for (i = 0; i <= (n - len); i++) {
1240 for (j = 0; j < len; j++)
1241 if (data[i + j] != str[j])
1242 break;
1243 if (j == len)
1244 return i;
1245 }
1246
1247 return 0;
1248 }
1249
1250 void *
1251 olddcb_table(struct drm_device *dev)
1252 {
1253 struct nouveau_drm *drm = nouveau_drm(dev);
1254 u8 *dcb = NULL;
1255
1256 if (nv_device(drm->device)->card_type > NV_04)
1257 dcb = ROMPTR(dev, drm->vbios.data[0x36]);
1258 if (!dcb) {
1259 NV_WARN(drm, "No DCB data found in VBIOS\n");
1260 return NULL;
1261 }
1262
1263 if (dcb[0] >= 0x41) {
1264 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);
1265 return NULL;
1266 } else
1267 if (dcb[0] >= 0x30) {
1268 if (ROM32(dcb[6]) == 0x4edcbdcb)
1269 return dcb;
1270 } else
1271 if (dcb[0] >= 0x20) {
1272 if (ROM32(dcb[4]) == 0x4edcbdcb)
1273 return dcb;
1274 } else
1275 if (dcb[0] >= 0x15) {
1276 if (!memcmp(&dcb[-7], "DEV_REC", 7))
1277 return dcb;
1278 } else {
1279 /*
1280 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but
1281 * always has the same single (crt) entry, even when tv-out
1282 * present, so the conclusion is this version cannot really
1283 * be used.
1284 *
1285 * v1.2 tables (some NV6/10, and NV15+) normally have the
1286 * same 5 entries, which are not specific to the card and so
1287 * no use.
1288 *
1289 * v1.2 does have an I2C table that read_dcb_i2c_table can
1290 * handle, but cards exist (nv11 in #14821) with a bad i2c
1291 * table pointer, so use the indices parsed in
1292 * parse_bmp_structure.
1293 *
1294 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful
1295 */
1296 NV_WARN(drm, "No useful DCB data in VBIOS\n");
1297 return NULL;
1298 }
1299
1300 NV_WARN(drm, "DCB header validation failed\n");
1301 return NULL;
1302 }
1303
1304 void *
1305 olddcb_outp(struct drm_device *dev, u8 idx)
1306 {
1307 u8 *dcb = olddcb_table(dev);
1308 if (dcb && dcb[0] >= 0x30) {
1309 if (idx < dcb[2])
1310 return dcb + dcb[1] + (idx * dcb[3]);
1311 } else
1312 if (dcb && dcb[0] >= 0x20) {
1313 u8 *i2c = ROMPTR(dev, dcb[2]);
1314 u8 *ent = dcb + 8 + (idx * 8);
1315 if (i2c && ent < i2c)
1316 return ent;
1317 } else
1318 if (dcb && dcb[0] >= 0x15) {
1319 u8 *i2c = ROMPTR(dev, dcb[2]);
1320 u8 *ent = dcb + 4 + (idx * 10);
1321 if (i2c && ent < i2c)
1322 return ent;
1323 }
1324
1325 return NULL;
1326 }
1327
1328 int
1329 olddcb_outp_foreach(struct drm_device *dev, void *data,
1330 int (*exec)(struct drm_device *, void *, int idx, u8 *outp))
1331 {
1332 int ret, idx = -1;
1333 u8 *outp = NULL;
1334 while ((outp = olddcb_outp(dev, ++idx))) {
1335 if (ROM32(outp[0]) == 0x00000000)
1336 break; /* seen on an NV11 with DCB v1.5 */
1337 if (ROM32(outp[0]) == 0xffffffff)
1338 break; /* seen on an NV17 with DCB v2.0 */
1339
1340 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)
1341 continue;
1342 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)
1343 break;
1344
1345 ret = exec(dev, data, idx, outp);
1346 if (ret)
1347 return ret;
1348 }
1349
1350 return 0;
1351 }
1352
1353 u8 *
1354 olddcb_conntab(struct drm_device *dev)
1355 {
1356 u8 *dcb = olddcb_table(dev);
1357 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {
1358 u8 *conntab = ROMPTR(dev, dcb[0x14]);
1359 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)
1360 return conntab;
1361 }
1362 return NULL;
1363 }
1364
1365 u8 *
1366 olddcb_conn(struct drm_device *dev, u8 idx)
1367 {
1368 u8 *conntab = olddcb_conntab(dev);
1369 if (conntab && idx < conntab[2])
1370 return conntab + conntab[1] + (idx * conntab[3]);
1371 return NULL;
1372 }
1373
1374 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)
1375 {
1376 struct dcb_output *entry = &dcb->entry[dcb->entries];
1377
1378 memset(entry, 0, sizeof(struct dcb_output));
1379 entry->index = dcb->entries++;
1380
1381 return entry;
1382 }
1383
1384 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,
1385 int heads, int or)
1386 {
1387 struct dcb_output *entry = new_dcb_entry(dcb);
1388
1389 entry->type = type;
1390 entry->i2c_index = i2c;
1391 entry->heads = heads;
1392 if (type != DCB_OUTPUT_ANALOG)
1393 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */
1394 entry->or = or;
1395 }
1396
1397 static bool
1398 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
1399 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1400 {
1401 struct nouveau_drm *drm = nouveau_drm(dev);
1402
1403 entry->type = conn & 0xf;
1404 entry->i2c_index = (conn >> 4) & 0xf;
1405 entry->heads = (conn >> 8) & 0xf;
1406 entry->connector = (conn >> 12) & 0xf;
1407 entry->bus = (conn >> 16) & 0xf;
1408 entry->location = (conn >> 20) & 0x3;
1409 entry->or = (conn >> 24) & 0xf;
1410
1411 switch (entry->type) {
1412 case DCB_OUTPUT_ANALOG:
1413 /*
1414 * Although the rest of a CRT conf dword is usually
1415 * zeros, mac biosen have stuff there so we must mask
1416 */
1417 entry->crtconf.maxfreq = (dcb->version < 0x30) ?
1418 (conf & 0xffff) * 10 :
1419 (conf & 0xff) * 10000;
1420 break;
1421 case DCB_OUTPUT_LVDS:
1422 {
1423 uint32_t mask;
1424 if (conf & 0x1)
1425 entry->lvdsconf.use_straps_for_mode = true;
1426 if (dcb->version < 0x22) {
1427 mask = ~0xd;
1428 /*
1429 * The laptop in bug 14567 lies and claims to not use
1430 * straps when it does, so assume all DCB 2.0 laptops
1431 * use straps, until a broken EDID using one is produced
1432 */
1433 entry->lvdsconf.use_straps_for_mode = true;
1434 /*
1435 * Both 0x4 and 0x8 show up in v2.0 tables; assume they
1436 * mean the same thing (probably wrong, but might work)
1437 */
1438 if (conf & 0x4 || conf & 0x8)
1439 entry->lvdsconf.use_power_scripts = true;
1440 } else {
1441 mask = ~0x7;
1442 if (conf & 0x2)
1443 entry->lvdsconf.use_acpi_for_edid = true;
1444 if (conf & 0x4)
1445 entry->lvdsconf.use_power_scripts = true;
1446 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
1447 }
1448 if (conf & mask) {
1449 /*
1450 * Until we even try to use these on G8x, it's
1451 * useless reporting unknown bits. They all are.
1452 */
1453 if (dcb->version >= 0x40)
1454 break;
1455
1456 NV_ERROR(drm, "Unknown LVDS configuration bits, "
1457 "please report\n");
1458 }
1459 break;
1460 }
1461 case DCB_OUTPUT_TV:
1462 {
1463 if (dcb->version >= 0x30)
1464 entry->tvconf.has_component_output = conf & (0x8 << 4);
1465 else
1466 entry->tvconf.has_component_output = false;
1467
1468 break;
1469 }
1470 case DCB_OUTPUT_DP:
1471 entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
1472 entry->extdev = (conf & 0x0000ff00) >> 8;
1473 switch ((conf & 0x00e00000) >> 21) {
1474 case 0:
1475 entry->dpconf.link_bw = 162000;
1476 break;
1477 default:
1478 entry->dpconf.link_bw = 270000;
1479 break;
1480 }
1481 switch ((conf & 0x0f000000) >> 24) {
1482 case 0xf:
1483 entry->dpconf.link_nr = 4;
1484 break;
1485 case 0x3:
1486 entry->dpconf.link_nr = 2;
1487 break;
1488 default:
1489 entry->dpconf.link_nr = 1;
1490 break;
1491 }
1492 break;
1493 case DCB_OUTPUT_TMDS:
1494 if (dcb->version >= 0x40) {
1495 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
1496 entry->extdev = (conf & 0x0000ff00) >> 8;
1497 }
1498 else if (dcb->version >= 0x30)
1499 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;
1500 else if (dcb->version >= 0x22)
1501 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;
1502
1503 break;
1504 case DCB_OUTPUT_EOL:
1505 /* weird g80 mobile type that "nv" treats as a terminator */
1506 dcb->entries--;
1507 return false;
1508 default:
1509 break;
1510 }
1511
1512 if (dcb->version < 0x40) {
1513 /* Normal entries consist of a single bit, but dual link has
1514 * the next most significant bit set too
1515 */
1516 entry->duallink_possible =
1517 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
1518 } else {
1519 entry->duallink_possible = (entry->sorconf.link == 3);
1520 }
1521
1522 /* unsure what DCB version introduces this, 3.0? */
1523 if (conf & 0x100000)
1524 entry->i2c_upper_default = true;
1525
1526 return true;
1527 }
1528
1529 static bool
1530 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
1531 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1532 {
1533 struct nouveau_drm *drm = nouveau_drm(dev);
1534
1535 switch (conn & 0x0000000f) {
1536 case 0:
1537 entry->type = DCB_OUTPUT_ANALOG;
1538 break;
1539 case 1:
1540 entry->type = DCB_OUTPUT_TV;
1541 break;
1542 case 2:
1543 case 4:
1544 if (conn & 0x10)
1545 entry->type = DCB_OUTPUT_LVDS;
1546 else
1547 entry->type = DCB_OUTPUT_TMDS;
1548 break;
1549 case 3:
1550 entry->type = DCB_OUTPUT_LVDS;
1551 break;
1552 default:
1553 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);
1554 return false;
1555 }
1556
1557 entry->i2c_index = (conn & 0x0003c000) >> 14;
1558 entry->heads = ((conn & 0x001c0000) >> 18) + 1;
1559 entry->or = entry->heads; /* same as heads, hopefully safe enough */
1560 entry->location = (conn & 0x01e00000) >> 21;
1561 entry->bus = (conn & 0x0e000000) >> 25;
1562 entry->duallink_possible = false;
1563
1564 switch (entry->type) {
1565 case DCB_OUTPUT_ANALOG:
1566 entry->crtconf.maxfreq = (conf & 0xffff) * 10;
1567 break;
1568 case DCB_OUTPUT_TV:
1569 entry->tvconf.has_component_output = false;
1570 break;
1571 case DCB_OUTPUT_LVDS:
1572 if ((conn & 0x00003f00) >> 8 != 0x10)
1573 entry->lvdsconf.use_straps_for_mode = true;
1574 entry->lvdsconf.use_power_scripts = true;
1575 break;
1576 default:
1577 break;
1578 }
1579
1580 return true;
1581 }
1582
1583 static
1584 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
1585 {
1586 /*
1587 * DCB v2.0 lists each output combination separately.
1588 * Here we merge compatible entries to have fewer outputs, with
1589 * more options
1590 */
1591
1592 struct nouveau_drm *drm = nouveau_drm(dev);
1593 int i, newentries = 0;
1594
1595 for (i = 0; i < dcb->entries; i++) {
1596 struct dcb_output *ient = &dcb->entry[i];
1597 int j;
1598
1599 for (j = i + 1; j < dcb->entries; j++) {
1600 struct dcb_output *jent = &dcb->entry[j];
1601
1602 if (jent->type == 100) /* already merged entry */
1603 continue;
1604
1605 /* merge heads field when all other fields the same */
1606 if (jent->i2c_index == ient->i2c_index &&
1607 jent->type == ient->type &&
1608 jent->location == ient->location &&
1609 jent->or == ient->or) {
1610 NV_INFO(drm, "Merging DCB entries %d and %d\n",
1611 i, j);
1612 ient->heads |= jent->heads;
1613 jent->type = 100; /* dummy value */
1614 }
1615 }
1616 }
1617
1618 /* Compact entries merged into others out of dcb */
1619 for (i = 0; i < dcb->entries; i++) {
1620 if (dcb->entry[i].type == 100)
1621 continue;
1622
1623 if (newentries != i) {
1624 dcb->entry[newentries] = dcb->entry[i];
1625 dcb->entry[newentries].index = newentries;
1626 }
1627 newentries++;
1628 }
1629
1630 dcb->entries = newentries;
1631 }
1632
1633 static bool
1634 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
1635 {
1636 struct nouveau_drm *drm = nouveau_drm(dev);
1637 struct dcb_table *dcb = &drm->vbios.dcb;
1638
1639 /* Dell Precision M6300
1640 * DCB entry 2: 02025312 00000010
1641 * DCB entry 3: 02026312 00000020
1642 *
1643 * Identical, except apparently a different connector on a
1644 * different SOR link. Not a clue how we're supposed to know
1645 * which one is in use if it even shares an i2c line...
1646 *
1647 * Ignore the connector on the second SOR link to prevent
1648 * nasty problems until this is sorted (assuming it's not a
1649 * VBIOS bug).
1650 */
1651 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) {
1652 if (*conn == 0x02026312 && *conf == 0x00000020)
1653 return false;
1654 }
1655
1656 /* GeForce3 Ti 200
1657 *
1658 * DCB reports an LVDS output that should be TMDS:
1659 * DCB entry 1: f2005014 ffffffff
1660 */
1661 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {
1662 if (*conn == 0xf2005014 && *conf == 0xffffffff) {
1663 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1);
1664 return false;
1665 }
1666 }
1667
1668 /* XFX GT-240X-YA
1669 *
1670 * So many things wrong here, replace the entire encoder table..
1671 */
1672 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) {
1673 if (idx == 0) {
1674 *conn = 0x02001300; /* VGA, connector 1 */
1675 *conf = 0x00000028;
1676 } else
1677 if (idx == 1) {
1678 *conn = 0x01010312; /* DVI, connector 0 */
1679 *conf = 0x00020030;
1680 } else
1681 if (idx == 2) {
1682 *conn = 0x01010310; /* VGA, connector 0 */
1683 *conf = 0x00000028;
1684 } else
1685 if (idx == 3) {
1686 *conn = 0x02022362; /* HDMI, connector 2 */
1687 *conf = 0x00020010;
1688 } else {
1689 *conn = 0x0000000e; /* EOL */
1690 *conf = 0x00000000;
1691 }
1692 }
1693
1694 /* Some other twisted XFX board (rhbz#694914)
1695 *
1696 * The DVI/VGA encoder combo that's supposed to represent the
1697 * DVI-I connector actually point at two different ones, and
1698 * the HDMI connector ends up paired with the VGA instead.
1699 *
1700 * Connector table is missing anything for VGA at all, pointing it
1701 * an invalid conntab entry 2 so we figure it out ourself.
1702 */
1703 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {
1704 if (idx == 0) {
1705 *conn = 0x02002300; /* VGA, connector 2 */
1706 *conf = 0x00000028;
1707 } else
1708 if (idx == 1) {
1709 *conn = 0x01010312; /* DVI, connector 0 */
1710 *conf = 0x00020030;
1711 } else
1712 if (idx == 2) {
1713 *conn = 0x04020310; /* VGA, connector 0 */
1714 *conf = 0x00000028;
1715 } else
1716 if (idx == 3) {
1717 *conn = 0x02021322; /* HDMI, connector 1 */
1718 *conf = 0x00020010;
1719 } else {
1720 *conn = 0x0000000e; /* EOL */
1721 *conf = 0x00000000;
1722 }
1723 }
1724
1725 /* fdo#50830: connector indices for VGA and DVI-I are backwards */
1726 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) {
1727 if (idx == 0 && *conn == 0x02000300)
1728 *conn = 0x02011300;
1729 else
1730 if (idx == 1 && *conn == 0x04011310)
1731 *conn = 0x04000310;
1732 else
1733 if (idx == 2 && *conn == 0x02011312)
1734 *conn = 0x02000312;
1735 }
1736
1737 return true;
1738 }
1739
1740 static void
1741 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)
1742 {
1743 struct dcb_table *dcb = &bios->dcb;
1744 int all_heads = (nv_two_heads(dev) ? 3 : 1);
1745
1746 #ifdef __powerpc__
1747 /* Apple iMac G4 NV17 */
1748 if (of_machine_is_compatible("PowerMac4,5")) {
1749 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1);
1750 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2);
1751 return;
1752 }
1753 #endif
1754
1755 /* Make up some sane defaults */
1756 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG,
1757 bios->legacy.i2c_indices.crt, 1, 1);
1758
1759 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
1760 fabricate_dcb_output(dcb, DCB_OUTPUT_TV,
1761 bios->legacy.i2c_indices.tv,
1762 all_heads, 0);
1763
1764 else if (bios->tmds.output0_script_ptr ||
1765 bios->tmds.output1_script_ptr)
1766 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS,
1767 bios->legacy.i2c_indices.panel,
1768 all_heads, 1);
1769 }
1770
1771 static int
1772 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)
1773 {
1774 struct nouveau_drm *drm = nouveau_drm(dev);
1775 struct dcb_table *dcb = &drm->vbios.dcb;
1776 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);
1777 u32 conn = ROM32(outp[0]);
1778 bool ret;
1779
1780 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) {
1781 struct dcb_output *entry = new_dcb_entry(dcb);
1782
1783 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);
1784
1785 if (dcb->version >= 0x20)
1786 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);
1787 else
1788 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);
1789 if (!ret)
1790 return 1; /* stop parsing */
1791
1792 /* Ignore the I2C index for on-chip TV-out, as there
1793 * are cards with bogus values (nv31m in bug 23212),
1794 * and it's otherwise useless.
1795 */
1796 if (entry->type == DCB_OUTPUT_TV &&
1797 entry->location == DCB_LOC_ON_CHIP)
1798 entry->i2c_index = 0x0f;
1799 }
1800
1801 return 0;
1802 }
1803
1804 static void
1805 dcb_fake_connectors(struct nvbios *bios)
1806 {
1807 struct dcb_table *dcbt = &bios->dcb;
1808 u8 map[16] = { };
1809 int i, idx = 0;
1810
1811 /* heuristic: if we ever get a non-zero connector field, assume
1812 * that all the indices are valid and we don't need fake them.
1813 *
1814 * and, as usual, a blacklist of boards with bad bios data..
1815 */
1816 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) {
1817 for (i = 0; i < dcbt->entries; i++) {
1818 if (dcbt->entry[i].connector)
1819 return;
1820 }
1821 }
1822
1823 /* no useful connector info available, we need to make it up
1824 * ourselves. the rule here is: anything on the same i2c bus
1825 * is considered to be on the same connector. any output
1826 * without an associated i2c bus is assigned its own unique
1827 * connector index.
1828 */
1829 for (i = 0; i < dcbt->entries; i++) {
1830 u8 i2c = dcbt->entry[i].i2c_index;
1831 if (i2c == 0x0f) {
1832 dcbt->entry[i].connector = idx++;
1833 } else {
1834 if (!map[i2c])
1835 map[i2c] = ++idx;
1836 dcbt->entry[i].connector = map[i2c] - 1;
1837 }
1838 }
1839
1840 /* if we created more than one connector, destroy the connector
1841 * table - just in case it has random, rather than stub, entries.
1842 */
1843 if (i > 1) {
1844 u8 *conntab = olddcb_conntab(bios->dev);
1845 if (conntab)
1846 conntab[0] = 0x00;
1847 }
1848 }
1849
1850 static int
1851 parse_dcb_table(struct drm_device *dev, struct nvbios *bios)
1852 {
1853 struct nouveau_drm *drm = nouveau_drm(dev);
1854 struct dcb_table *dcb = &bios->dcb;
1855 u8 *dcbt, *conn;
1856 int idx;
1857
1858 dcbt = olddcb_table(dev);
1859 if (!dcbt) {
1860 /* handle pre-DCB boards */
1861 if (bios->type == NVBIOS_BMP) {
1862 fabricate_dcb_encoder_table(dev, bios);
1863 return 0;
1864 }
1865
1866 return -EINVAL;
1867 }
1868
1869 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);
1870
1871 dcb->version = dcbt[0];
1872 olddcb_outp_foreach(dev, NULL, parse_dcb_entry);
1873
1874 /*
1875 * apart for v2.1+ not being known for requiring merging, this
1876 * guarantees dcbent->index is the index of the entry in the rom image
1877 */
1878 if (dcb->version < 0x21)
1879 merge_like_dcb_entries(dev, dcb);
1880
1881 /* dump connector table entries to log, if any exist */
1882 idx = -1;
1883 while ((conn = olddcb_conn(dev, ++idx))) {
1884 if (conn[0] != 0xff) {
1885 NV_INFO(drm, "DCB conn %02d: ", idx);
1886 if (olddcb_conntab(dev)[3] < 4)
1887 pr_cont("%04x\n", ROM16(conn[0]));
1888 else
1889 pr_cont("%08x\n", ROM32(conn[0]));
1890 }
1891 }
1892 dcb_fake_connectors(bios);
1893 return 0;
1894 }
1895
1896 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
1897 {
1898 /*
1899 * The header following the "HWSQ" signature has the number of entries,
1900 * and the entry size
1901 *
1902 * An entry consists of a dword to write to the sequencer control reg
1903 * (0x00001304), followed by the ucode bytes, written sequentially,
1904 * starting at reg 0x00001400
1905 */
1906
1907 struct nouveau_drm *drm = nouveau_drm(dev);
1908 struct nouveau_device *device = nv_device(drm->device);
1909 uint8_t bytes_to_write;
1910 uint16_t hwsq_entry_offset;
1911 int i;
1912
1913 if (bios->data[hwsq_offset] <= entry) {
1914 NV_ERROR(drm, "Too few entries in HW sequencer table for "
1915 "requested entry\n");
1916 return -ENOENT;
1917 }
1918
1919 bytes_to_write = bios->data[hwsq_offset + 1];
1920
1921 if (bytes_to_write != 36) {
1922 NV_ERROR(drm, "Unknown HW sequencer entry size\n");
1923 return -EINVAL;
1924 }
1925
1926 NV_INFO(drm, "Loading NV17 power sequencing microcode\n");
1927
1928 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
1929
1930 /* set sequencer control */
1931 nv_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
1932 bytes_to_write -= 4;
1933
1934 /* write ucode */
1935 for (i = 0; i < bytes_to_write; i += 4)
1936 nv_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
1937
1938 /* twiddle NV_PBUS_DEBUG_4 */
1939 nv_wr32(device, NV_PBUS_DEBUG_4, nv_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
1940
1941 return 0;
1942 }
1943
1944 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
1945 struct nvbios *bios)
1946 {
1947 /*
1948 * BMP based cards, from NV17, need a microcode loading to correctly
1949 * control the GPIO etc for LVDS panels
1950 *
1951 * BIT based cards seem to do this directly in the init scripts
1952 *
1953 * The microcode entries are found by the "HWSQ" signature.
1954 */
1955
1956 const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
1957 const int sz = sizeof(hwsq_signature);
1958 int hwsq_offset;
1959
1960 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);
1961 if (!hwsq_offset)
1962 return 0;
1963
1964 /* always use entry 0? */
1965 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);
1966 }
1967
1968 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
1969 {
1970 struct nouveau_drm *drm = nouveau_drm(dev);
1971 struct nvbios *bios = &drm->vbios;
1972 const uint8_t edid_sig[] = {
1973 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
1974 uint16_t offset = 0;
1975 uint16_t newoffset;
1976 int searchlen = NV_PROM_SIZE;
1977
1978 if (bios->fp.edid)
1979 return bios->fp.edid;
1980
1981 while (searchlen) {
1982 newoffset = findstr(&bios->data[offset], searchlen,
1983 edid_sig, 8);
1984 if (!newoffset)
1985 return NULL;
1986 offset += newoffset;
1987 if (!nv_cksum(&bios->data[offset], EDID1_LEN))
1988 break;
1989
1990 searchlen -= offset;
1991 offset++;
1992 }
1993
1994 NV_INFO(drm, "Found EDID in BIOS\n");
1995
1996 return bios->fp.edid = &bios->data[offset];
1997 }
1998
1999 static bool NVInitVBIOS(struct drm_device *dev)
2000 {
2001 struct nouveau_drm *drm = nouveau_drm(dev);
2002 struct nouveau_bios *bios = nouveau_bios(drm->device);
2003 struct nvbios *legacy = &drm->vbios;
2004
2005 memset(legacy, 0, sizeof(struct nvbios));
2006 spin_lock_init(&legacy->lock);
2007 legacy->dev = dev;
2008
2009 legacy->data = bios->data;
2010 legacy->length = bios->size;
2011 legacy->major_version = bios->version.major;
2012 legacy->chip_version = bios->version.chip;
2013 if (bios->bit_offset) {
2014 legacy->type = NVBIOS_BIT;
2015 legacy->offset = bios->bit_offset;
2016 return !parse_bit_structure(legacy, legacy->offset + 6);
2017 } else
2018 if (bios->bmp_offset) {
2019 legacy->type = NVBIOS_BMP;
2020 legacy->offset = bios->bmp_offset;
2021 return !parse_bmp_structure(dev, legacy, legacy->offset);
2022 }
2023
2024 return false;
2025 }
2026
2027 int
2028 nouveau_run_vbios_init(struct drm_device *dev)
2029 {
2030 struct nouveau_drm *drm = nouveau_drm(dev);
2031 struct nvbios *bios = &drm->vbios;
2032 int ret = 0;
2033
2034 /* Reset the BIOS head to 0. */
2035 bios->state.crtchead = 0;
2036
2037 if (bios->major_version < 5) /* BMP only */
2038 load_nv17_hw_sequencer_ucode(dev, bios);
2039
2040 if (bios->execute) {
2041 bios->fp.last_script_invoc = 0;
2042 bios->fp.lvds_init_run = false;
2043 }
2044
2045 return ret;
2046 }
2047
2048 static bool
2049 nouveau_bios_posted(struct drm_device *dev)
2050 {
2051 struct nouveau_drm *drm = nouveau_drm(dev);
2052 unsigned htotal;
2053
2054 if (nv_device(drm->device)->card_type >= NV_50)
2055 return true;
2056
2057 htotal = NVReadVgaCrtc(dev, 0, 0x06);
2058 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
2059 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
2060 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
2061 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
2062 return (htotal != 0);
2063 }
2064
2065 int
2066 nouveau_bios_init(struct drm_device *dev)
2067 {
2068 struct nouveau_drm *drm = nouveau_drm(dev);
2069 struct nvbios *bios = &drm->vbios;
2070 int ret;
2071
2072 /* only relevant for PCI devices */
2073 if (!dev->pdev)
2074 return 0;
2075
2076 if (!NVInitVBIOS(dev))
2077 return -ENODEV;
2078
2079 ret = parse_dcb_table(dev, bios);
2080 if (ret)
2081 return ret;
2082
2083 if (!bios->major_version) /* we don't run version 0 bios */
2084 return 0;
2085
2086 /* init script execution disabled */
2087 bios->execute = false;
2088
2089 /* ... unless card isn't POSTed already */
2090 if (!nouveau_bios_posted(dev)) {
2091 NV_INFO(drm, "Adaptor not initialised, "
2092 "running VBIOS init tables.\n");
2093 bios->execute = true;
2094 }
2095
2096 ret = nouveau_run_vbios_init(dev);
2097 if (ret)
2098 return ret;
2099
2100 /* feature_byte on BMP is poor, but init always sets CR4B */
2101 if (bios->major_version < 5)
2102 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
2103
2104 /* all BIT systems need p_f_m_t for digital_min_front_porch */
2105 if (bios->is_mobile || bios->major_version >= 5)
2106 ret = parse_fp_mode_table(dev, bios);
2107
2108 /* allow subsequent scripts to execute */
2109 bios->execute = true;
2110
2111 return 0;
2112 }
2113
2114 void
2115 nouveau_bios_takedown(struct drm_device *dev)
2116 {
2117 }
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