drivers/gpu/drm/nouveau/nouveau_channel.c

   1 /*
   2  * Copyright 2005-2006 Stephane Marchesin
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 #include "drmP.h"
  26 #include "drm.h"
  27 #include "nouveau_drv.h"
  28 #include <nouveau_drm.h>
  29 #include "nouveau_dma.h"
  30 #include <engine/fifo.h>
  31 #include <core/ramht.h>
  32 #include "nouveau_fence.h"
  33 #include "nouveau_software.h"
  34
  35 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  36 int nouveau_vram_pushbuf;
  37 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  38
  39 static int
  40 nouveau_channel_pushbuf_init(struct nouveau_channel *chan)
  41 {
  42         u32 mem = nouveau_vram_pushbuf ? TTM_PL_FLAG_VRAM : TTM_PL_FLAG_TT;
  43         struct drm_device *dev = chan->dev;
  44         struct drm_nouveau_private *dev_priv = dev->dev_private;
  45         int ret;
  46
  47         /* allocate buffer object */
  48         ret = nouveau_bo_new(dev, 65536, 0, mem, 0, 0, NULL, &chan->pushbuf_bo);
  49         if (ret)
  50                 goto out;
  51
  52         ret = nouveau_bo_pin(chan->pushbuf_bo, mem);
  53         if (ret)
  54                 goto out;
  55
  56         ret = nouveau_bo_map(chan->pushbuf_bo);
  57         if (ret)
  58                 goto out;
  59
  60         /* create DMA object covering the entire memtype where the push
  61          * buffer resides, userspace can submit its own push buffers from
  62          * anywhere within the same memtype.
  63          */
  64         chan->pushbuf_base = chan->pushbuf_bo->bo.offset;
  65         if (dev_priv->card_type >= NV_50) {
  66                 ret = nouveau_bo_vma_add(chan->pushbuf_bo, chan->vm,
  67                                          &chan->pushbuf_vma);
  68                 if (ret)
  69                         goto out;
  70
  71                 if (dev_priv->card_type < NV_C0) {
  72                         ret = nouveau_gpuobj_dma_new(chan,
  73                                                      NV_CLASS_DMA_IN_MEMORY, 0,
  74                                                      (1ULL << 40),
  75                                                      NV_MEM_ACCESS_RO,
  76                                                      NV_MEM_TARGET_VM,
  77                                                      &chan->pushbuf);
  78                 }
  79                 chan->pushbuf_base = chan->pushbuf_vma.offset;
  80         } else
  81         if (chan->pushbuf_bo->bo.mem.mem_type == TTM_PL_TT) {
  82                 ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
  83                                              dev_priv->gart_info.aper_size,
  84                                              NV_MEM_ACCESS_RO,
  85                                              NV_MEM_TARGET_GART,
  86                                              &chan->pushbuf);
  87         } else
  88         if (dev_priv->card_type != NV_04) {
  89                 ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
  90                                              dev_priv->fb_available_size,
  91                                              NV_MEM_ACCESS_RO,
  92                                              NV_MEM_TARGET_VRAM,
  93                                              &chan->pushbuf);
  94         } else {
  95                 /* NV04 cmdbuf hack, from original ddx.. not sure of it's
  96                  * exact reason for existing :)  PCI access to cmdbuf in
  97                  * VRAM.
  98                  */
  99                 ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
 100                                              pci_resource_start(dev->pdev, 1),
 101                                              dev_priv->fb_available_size,
 102                                              NV_MEM_ACCESS_RO,
 103                                              NV_MEM_TARGET_PCI,
 104                                              &chan->pushbuf);
 105         }
 106
 107 out:
 108         if (ret) {
 109                 NV_ERROR(dev, "error initialising pushbuf: %d\n", ret);
 110                 nouveau_bo_vma_del(chan->pushbuf_bo, &chan->pushbuf_vma);
 111                 nouveau_gpuobj_ref(NULL, &chan->pushbuf);
 112                 if (chan->pushbuf_bo) {
 113                         nouveau_bo_unmap(chan->pushbuf_bo);
 114                         nouveau_bo_ref(NULL, &chan->pushbuf_bo);
 115                 }
 116         }
 117
 118         return 0;
 119 }
 120
 121 /* allocates and initializes a fifo for user space consumption */
 122 int
 123 nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
 124                       struct drm_file *file_priv,
 125                       uint32_t vram_handle, uint32_t gart_handle)
 126 {
 127         struct drm_nouveau_private *dev_priv = dev->dev_private;
 128         struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
 129         struct nouveau_fence_priv *fence = dev_priv->fence.func;
 130         struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv);
 131         struct nouveau_channel *chan;
 132         unsigned long flags;
 133         int ret, i;
 134
 135         /* allocate and lock channel structure */
 136         chan = kzalloc(sizeof(*chan), GFP_KERNEL);
 137         if (!chan)
 138                 return -ENOMEM;
 139         chan->dev = dev;
 140         chan->file_priv = file_priv;
 141         chan->vram_handle = vram_handle;
 142         chan->gart_handle = gart_handle;
 143
 144         kref_init(&chan->ref);
 145         atomic_set(&chan->users, 1);
 146         mutex_init(&chan->mutex);
 147         mutex_lock(&chan->mutex);
 148
 149         /* allocate hw channel id */
 150         spin_lock_irqsave(&dev_priv->channels.lock, flags);
 151         for (chan->id = 0; chan->id < pfifo->channels; chan->id++) {
 152                 if ( dev_priv->card_type == NV_50 && chan->id == 0)
 153                         continue;
 154
 155                 if (!dev_priv->channels.ptr[chan->id]) {
 156                         nouveau_channel_ref(chan, &dev_priv->channels.ptr[chan->id]);
 157                         break;
 158                 }
 159         }
 160         spin_unlock_irqrestore(&dev_priv->channels.lock, flags);
 161
 162         if (chan->id == pfifo->channels) {
 163                 mutex_unlock(&chan->mutex);
 164                 kfree(chan);
 165                 return -ENODEV;
 166         }
 167
 168         NV_DEBUG(dev, "initialising channel %d\n", chan->id);
 169
 170         /* setup channel's memory and vm */
 171         ret = nouveau_gpuobj_channel_init(chan, vram_handle, gart_handle);
 172         if (ret) {
 173                 NV_ERROR(dev, "gpuobj %d\n", ret);
 174                 nouveau_channel_put(&chan);
 175                 return ret;
 176         }
 177
 178         /* Allocate space for per-channel fixed notifier memory */
 179         ret = nouveau_notifier_init_channel(chan);
 180         if (ret) {
 181                 NV_ERROR(dev, "ntfy %d\n", ret);
 182                 nouveau_channel_put(&chan);
 183                 return ret;
 184         }
 185
 186         /* Allocate DMA push buffer */
 187         ret = nouveau_channel_pushbuf_init(chan);
 188         if (ret) {
 189                 NV_ERROR(dev, "pushbuf %d\n", ret);
 190                 nouveau_channel_put(&chan);
 191                 return ret;
 192         }
 193
 194         nouveau_dma_init(chan);
 195         chan->user_put = 0x40;
 196         chan->user_get = 0x44;
 197         if (dev_priv->card_type >= NV_50)
 198                 chan->user_get_hi = 0x60;
 199
 200         /* create fifo context */
 201         ret = pfifo->base.context_new(chan, NVOBJ_ENGINE_FIFO);
 202         if (ret) {
 203                 nouveau_channel_put(&chan);
 204                 return ret;
 205         }
 206
 207         /* Insert NOPs for NOUVEAU_DMA_SKIPS */
 208         ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
 209         if (ret) {
 210                 nouveau_channel_put(&chan);
 211                 return ret;
 212         }
 213
 214         for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
 215                 OUT_RING  (chan, 0x00000000);
 216
 217         ret = nouveau_gpuobj_gr_new(chan, NvSw, nouveau_software_class(dev));
 218         if (ret) {
 219                 nouveau_channel_put(&chan);
 220                 return ret;
 221         }
 222
 223         if (dev_priv->card_type < NV_C0) {
 224                 ret = RING_SPACE(chan, 2);
 225                 if (ret) {
 226                         nouveau_channel_put(&chan);
 227                         return ret;
 228                 }
 229
 230                 BEGIN_NV04(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);
 231                 OUT_RING  (chan, NvSw);
 232                 FIRE_RING (chan);
 233         }
 234
 235         FIRE_RING(chan);
 236
 237         ret = fence->context_new(chan);
 238         if (ret) {
 239                 nouveau_channel_put(&chan);
 240                 return ret;
 241         }
 242
 243         nouveau_debugfs_channel_init(chan);
 244
 245         NV_DEBUG(dev, "channel %d initialised\n", chan->id);
 246         if (fpriv) {
 247                 spin_lock(&fpriv->lock);
 248                 list_add(&chan->list, &fpriv->channels);
 249                 spin_unlock(&fpriv->lock);
 250         }
 251         *chan_ret = chan;
 252         return 0;
 253 }
 254
 255 struct nouveau_channel *
 256 nouveau_channel_get_unlocked(struct nouveau_channel *ref)
 257 {
 258         struct nouveau_channel *chan = NULL;
 259
 260         if (likely(ref && atomic_inc_not_zero(&ref->users)))
 261                 nouveau_channel_ref(ref, &chan);
 262
 263         return chan;
 264 }
 265
 266 struct nouveau_channel *
 267 nouveau_channel_get(struct drm_file *file_priv, int id)
 268 {
 269         struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv);
 270         struct nouveau_channel *chan;
 271
 272         spin_lock(&fpriv->lock);
 273         list_for_each_entry(chan, &fpriv->channels, list) {
 274                 if (chan->id == id) {
 275                         chan = nouveau_channel_get_unlocked(chan);
 276                         spin_unlock(&fpriv->lock);
 277                         mutex_lock(&chan->mutex);
 278                         return chan;
 279                 }
 280         }
 281         spin_unlock(&fpriv->lock);
 282
 283         return ERR_PTR(-EINVAL);
 284 }
 285
 286 void
 287 nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
 288 {
 289         struct nouveau_channel *chan = *pchan;
 290         struct drm_device *dev = chan->dev;
 291         struct drm_nouveau_private *dev_priv = dev->dev_private;
 292         struct nouveau_fence_priv *fence = dev_priv->fence.func;
 293         unsigned long flags;
 294         int i;
 295
 296         /* decrement the refcount, and we're done if there's still refs */
 297         if (likely(!atomic_dec_and_test(&chan->users))) {
 298                 nouveau_channel_ref(NULL, pchan);
 299                 return;
 300         }
 301
 302         /* no one wants the channel anymore */
 303         NV_DEBUG(dev, "freeing channel %d\n", chan->id);
 304         nouveau_debugfs_channel_fini(chan);
 305
 306         /* give it chance to idle */
 307         nouveau_channel_idle(chan);
 308
 309         /* destroy the engine specific contexts */
 310         for (i = NVOBJ_ENGINE_NR - 1; i >= 0; i--) {
 311                 if (chan->engctx[i])
 312                         dev_priv->eng[i]->context_del(chan, i);
 313         }
 314
 315         if (chan->fence)
 316                 fence->context_del(chan);
 317
 318         /* aside from its resources, the channel should now be dead,
 319          * remove it from the channel list
 320          */
 321         spin_lock_irqsave(&dev_priv->channels.lock, flags);
 322         nouveau_channel_ref(NULL, &dev_priv->channels.ptr[chan->id]);
 323         spin_unlock_irqrestore(&dev_priv->channels.lock, flags);
 324
 325         /* destroy any resources the channel owned */
 326         nouveau_gpuobj_ref(NULL, &chan->pushbuf);
 327         if (chan->pushbuf_bo) {
 328                 nouveau_bo_vma_del(chan->pushbuf_bo, &chan->pushbuf_vma);
 329                 nouveau_bo_unmap(chan->pushbuf_bo);
 330                 nouveau_bo_unpin(chan->pushbuf_bo);
 331                 nouveau_bo_ref(NULL, &chan->pushbuf_bo);
 332         }
 333         nouveau_ramht_ref(NULL, &chan->ramht, chan);
 334         nouveau_notifier_takedown_channel(chan);
 335         nouveau_gpuobj_channel_takedown(chan);
 336
 337         nouveau_channel_ref(NULL, pchan);
 338 }
 339
 340 void
 341 nouveau_channel_put(struct nouveau_channel **pchan)
 342 {
 343         mutex_unlock(&(*pchan)->mutex);
 344         nouveau_channel_put_unlocked(pchan);
 345 }
 346
 347 static void
 348 nouveau_channel_del(struct kref *ref)
 349 {
 350         struct nouveau_channel *chan =
 351                 container_of(ref, struct nouveau_channel, ref);
 352
 353         kfree(chan);
 354 }
 355
 356 void
 357 nouveau_channel_ref(struct nouveau_channel *chan,
 358                     struct nouveau_channel **pchan)
 359 {
 360         if (chan)
 361                 kref_get(&chan->ref);
 362
 363         if (*pchan)
 364                 kref_put(&(*pchan)->ref, nouveau_channel_del);
 365
 366         *pchan = chan;
 367 }
 368
 369 int
 370 nouveau_channel_idle(struct nouveau_channel *chan)
 371 {
 372         struct drm_device *dev = chan->dev;
 373         struct nouveau_fence *fence = NULL;
 374         int ret;
 375
 376         ret = nouveau_fence_new(chan, &fence);
 377         if (!ret) {
 378                 ret = nouveau_fence_wait(fence, false, false);
 379                 nouveau_fence_unref(&fence);
 380         }
 381
 382         if (ret)
 383                 NV_ERROR(dev, "Failed to idle channel %d.\n", chan->id);
 384         return ret;
 385 }
 386
 387 /* cleans up all the fifos from file_priv */
 388 void
 389 nouveau_channel_cleanup(struct drm_device *dev, struct drm_file *file_priv)
 390 {
 391         struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
 392         struct nouveau_channel *chan;
 393         int i;
 394
 395         if (!pfifo)
 396                 return;
 397
 398         NV_DEBUG(dev, "clearing FIFO enables from file_priv\n");
 399         for (i = 0; i < pfifo->channels; i++) {
 400                 chan = nouveau_channel_get(file_priv, i);
 401                 if (IS_ERR(chan))
 402                         continue;
 403
 404                 list_del(&chan->list);
 405                 atomic_dec(&chan->users);
 406                 nouveau_channel_put(&chan);
 407         }
 408 }