Merge branch 'for-linus' of git://neil.brown.name/md
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_grctx.h
1 #ifndef __NOUVEAU_GRCTX_H__
2 #define __NOUVEAU_GRCTX_H__
3
4 struct nouveau_grctx {
5 struct drm_device *dev;
6
7 enum {
8 NOUVEAU_GRCTX_PROG,
9 NOUVEAU_GRCTX_VALS
10 } mode;
11 void *data;
12
13 uint32_t ctxprog_max;
14 uint32_t ctxprog_len;
15 uint32_t ctxprog_reg;
16 int ctxprog_label[32];
17 uint32_t ctxvals_pos;
18 uint32_t ctxvals_base;
19 };
20
21 #ifdef CP_CTX
22 static inline void
23 cp_out(struct nouveau_grctx *ctx, uint32_t inst)
24 {
25 uint32_t *ctxprog = ctx->data;
26
27 if (ctx->mode != NOUVEAU_GRCTX_PROG)
28 return;
29
30 BUG_ON(ctx->ctxprog_len == ctx->ctxprog_max);
31 ctxprog[ctx->ctxprog_len++] = inst;
32 }
33
34 static inline void
35 cp_lsr(struct nouveau_grctx *ctx, uint32_t val)
36 {
37 cp_out(ctx, CP_LOAD_SR | val);
38 }
39
40 static inline void
41 cp_ctx(struct nouveau_grctx *ctx, uint32_t reg, uint32_t length)
42 {
43 ctx->ctxprog_reg = (reg - 0x00400000) >> 2;
44
45 ctx->ctxvals_base = ctx->ctxvals_pos;
46 ctx->ctxvals_pos = ctx->ctxvals_base + length;
47
48 if (length > (CP_CTX_COUNT >> CP_CTX_COUNT_SHIFT)) {
49 cp_lsr(ctx, length);
50 length = 0;
51 }
52
53 cp_out(ctx, CP_CTX | (length << CP_CTX_COUNT_SHIFT) | ctx->ctxprog_reg);
54 }
55
56 static inline void
57 cp_name(struct nouveau_grctx *ctx, int name)
58 {
59 uint32_t *ctxprog = ctx->data;
60 int i;
61
62 if (ctx->mode != NOUVEAU_GRCTX_PROG)
63 return;
64
65 ctx->ctxprog_label[name] = ctx->ctxprog_len;
66 for (i = 0; i < ctx->ctxprog_len; i++) {
67 if ((ctxprog[i] & 0xfff00000) != 0xff400000)
68 continue;
69 if ((ctxprog[i] & CP_BRA_IP) != ((name) << CP_BRA_IP_SHIFT))
70 continue;
71 ctxprog[i] = (ctxprog[i] & 0x00ff00ff) |
72 (ctx->ctxprog_len << CP_BRA_IP_SHIFT);
73 }
74 }
75
76 static inline void
77 _cp_bra(struct nouveau_grctx *ctx, u32 mod, int flag, int state, int name)
78 {
79 int ip = 0;
80
81 if (mod != 2) {
82 ip = ctx->ctxprog_label[name] << CP_BRA_IP_SHIFT;
83 if (ip == 0)
84 ip = 0xff000000 | (name << CP_BRA_IP_SHIFT);
85 }
86
87 cp_out(ctx, CP_BRA | (mod << 18) | ip | flag |
88 (state ? 0 : CP_BRA_IF_CLEAR));
89 }
90 #define cp_bra(c,f,s,n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
91 #ifdef CP_BRA_MOD
92 #define cp_cal(c,f,s,n) _cp_bra((c), 1, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
93 #define cp_ret(c,f,s) _cp_bra((c), 2, CP_FLAG_##f, CP_FLAG_##f##_##s, 0)
94 #endif
95
96 static inline void
97 _cp_wait(struct nouveau_grctx *ctx, int flag, int state)
98 {
99 cp_out(ctx, CP_WAIT | flag | (state ? CP_WAIT_SET : 0));
100 }
101 #define cp_wait(c,f,s) _cp_wait((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
102
103 static inline void
104 _cp_set(struct nouveau_grctx *ctx, int flag, int state)
105 {
106 cp_out(ctx, CP_SET | flag | (state ? CP_SET_1 : 0));
107 }
108 #define cp_set(c,f,s) _cp_set((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
109
110 static inline void
111 cp_pos(struct nouveau_grctx *ctx, int offset)
112 {
113 ctx->ctxvals_pos = offset;
114 ctx->ctxvals_base = ctx->ctxvals_pos;
115
116 cp_lsr(ctx, ctx->ctxvals_pos);
117 cp_out(ctx, CP_SET_CONTEXT_POINTER);
118 }
119
120 static inline void
121 gr_def(struct nouveau_grctx *ctx, uint32_t reg, uint32_t val)
122 {
123 if (ctx->mode != NOUVEAU_GRCTX_VALS)
124 return;
125
126 reg = (reg - 0x00400000) / 4;
127 reg = (reg - ctx->ctxprog_reg) + ctx->ctxvals_base;
128
129 nv_wo32(ctx->dev, ctx->data, reg, val);
130 }
131 #endif
132
133 #endif
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