drivers/gpu/drm/omapdrm/dss/hdmi5.c

   1 /*
   2  * HDMI driver for OMAP5
   3  *
   4  * Copyright (C) 2014 Texas Instruments Incorporated
   5  *
   6  * Authors:
   7  *      Yong Zhi
   8  *      Mythri pk
   9  *      Archit Taneja <archit@ti.com>
  10  *      Tomi Valkeinen <tomi.valkeinen@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms of the GNU General Public License version 2 as published by
  14  * the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along with
  22  * this program.  If not, see <http://www.gnu.org/licenses/>.
  23  */
  24
  25 #define DSS_SUBSYS_NAME "HDMI"
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/err.h>
  30 #include <linux/io.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/mutex.h>
  33 #include <linux/delay.h>
  34 #include <linux/string.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/pm_runtime.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39 #include <linux/regulator/consumer.h>
  40 #include <linux/component.h>
  41 #include <linux/of.h>
  42 #include <video/omapdss.h>
  43 #include <sound/omap-hdmi-audio.h>
  44
  45 #include "hdmi5_core.h"
  46 #include "dss.h"
  47 #include "dss_features.h"
  48
  49 static struct omap_hdmi hdmi;
  50
  51 static int hdmi_runtime_get(void)
  52 {
  53         int r;
  54
  55         DSSDBG("hdmi_runtime_get\n");
  56
  57         r = pm_runtime_get_sync(&hdmi.pdev->dev);
  58         WARN_ON(r < 0);
  59         if (r < 0)
  60                 return r;
  61
  62         return 0;
  63 }
  64
  65 static void hdmi_runtime_put(void)
  66 {
  67         int r;
  68
  69         DSSDBG("hdmi_runtime_put\n");
  70
  71         r = pm_runtime_put_sync(&hdmi.pdev->dev);
  72         WARN_ON(r < 0 && r != -ENOSYS);
  73 }
  74
  75 static irqreturn_t hdmi_irq_handler(int irq, void *data)
  76 {
  77         struct hdmi_wp_data *wp = data;
  78         u32 irqstatus;
  79
  80         irqstatus = hdmi_wp_get_irqstatus(wp);
  81         hdmi_wp_set_irqstatus(wp, irqstatus);
  82
  83         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  84                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  85                 u32 v;
  86                 /*
  87                  * If we get both connect and disconnect interrupts at the same
  88                  * time, turn off the PHY, clear interrupts, and restart, which
  89                  * raises connect interrupt if a cable is connected, or nothing
  90                  * if cable is not connected.
  91                  */
  92
  93                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  94
  95                 /*
  96                  * We always get bogus CONNECT & DISCONNECT interrupts when
  97                  * setting the PHY to LDOON. To ignore those, we force the RXDET
  98                  * line to 0 until the PHY power state has been changed.
  99                  */
 100                 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
 101                 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
 102                 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
 103                 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
 104
 105                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
 106                                 HDMI_IRQ_LINK_DISCONNECT);
 107
 108                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 109
 110                 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
 111
 112         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
 113                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
 114         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
 115                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 116         }
 117
 118         return IRQ_HANDLED;
 119 }
 120
 121 static int hdmi_init_regulator(void)
 122 {
 123         int r;
 124         struct regulator *reg;
 125
 126         if (hdmi.vdda_reg != NULL)
 127                 return 0;
 128
 129         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
 130         if (IS_ERR(reg)) {
 131                 DSSERR("can't get VDDA regulator\n");
 132                 return PTR_ERR(reg);
 133         }
 134
 135         hdmi.vdda_reg = reg;
 136
 137         return 0;
 138 }
 139
 140 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
 141 {
 142         int r;
 143
 144         r = regulator_enable(hdmi.vdda_reg);
 145         if (r)
 146                 return r;
 147
 148         r = hdmi_runtime_get();
 149         if (r)
 150                 goto err_runtime_get;
 151
 152         /* Make selection of HDMI in DSS */
 153         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
 154
 155         hdmi.core_enabled = true;
 156
 157         return 0;
 158
 159 err_runtime_get:
 160         regulator_disable(hdmi.vdda_reg);
 161
 162         return r;
 163 }
 164
 165 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
 166 {
 167         hdmi.core_enabled = false;
 168
 169         hdmi_runtime_put();
 170         regulator_disable(hdmi.vdda_reg);
 171 }
 172
 173 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 174 {
 175         int r;
 176         struct omap_video_timings *p;
 177         enum omap_channel channel = dssdev->dispc_channel;
 178         struct dss_pll_clock_info hdmi_cinfo = { 0 };
 179         unsigned pc;
 180
 181         r = hdmi_power_on_core(dssdev);
 182         if (r)
 183                 return r;
 184
 185         p = &hdmi.cfg.timings;
 186
 187         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
 188
 189         pc = p->pixelclock;
 190         if (p->double_pixel)
 191                 pc *= 2;
 192
 193         /* DSS_HDMI_TCLK is bitclk / 10 */
 194         pc *= 10;
 195
 196         dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
 197                 pc, &hdmi_cinfo);
 198
 199         /* disable and clear irqs */
 200         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 201         hdmi_wp_set_irqstatus(&hdmi.wp,
 202                         hdmi_wp_get_irqstatus(&hdmi.wp));
 203
 204         r = dss_pll_enable(&hdmi.pll.pll);
 205         if (r) {
 206                 DSSERR("Failed to enable PLL\n");
 207                 goto err_pll_enable;
 208         }
 209
 210         r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
 211         if (r) {
 212                 DSSERR("Failed to configure PLL\n");
 213                 goto err_pll_cfg;
 214         }
 215
 216         r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
 217                 hdmi_cinfo.clkout[0]);
 218         if (r) {
 219                 DSSDBG("Failed to start PHY\n");
 220                 goto err_phy_cfg;
 221         }
 222
 223         r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
 224         if (r)
 225                 goto err_phy_pwr;
 226
 227         hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
 228
 229         /* bypass TV gamma table */
 230         dispc_enable_gamma_table(0);
 231
 232         /* tv size */
 233         dss_mgr_set_timings(channel, p);
 234
 235         r = dss_mgr_enable(channel);
 236         if (r)
 237                 goto err_mgr_enable;
 238
 239         r = hdmi_wp_video_start(&hdmi.wp);
 240         if (r)
 241                 goto err_vid_enable;
 242
 243         hdmi_wp_set_irqenable(&hdmi.wp,
 244                         HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
 245
 246         return 0;
 247
 248 err_vid_enable:
 249         dss_mgr_disable(channel);
 250 err_mgr_enable:
 251         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 252 err_phy_pwr:
 253 err_phy_cfg:
 254 err_pll_cfg:
 255         dss_pll_disable(&hdmi.pll.pll);
 256 err_pll_enable:
 257         hdmi_power_off_core(dssdev);
 258         return -EIO;
 259 }
 260
 261 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 262 {
 263         enum omap_channel channel = dssdev->dispc_channel;
 264
 265         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 266
 267         hdmi_wp_video_stop(&hdmi.wp);
 268
 269         dss_mgr_disable(channel);
 270
 271         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 272
 273         dss_pll_disable(&hdmi.pll.pll);
 274
 275         hdmi_power_off_core(dssdev);
 276 }
 277
 278 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 279                                         struct omap_video_timings *timings)
 280 {
 281         if (!dispc_mgr_timings_ok(dssdev->dispc_channel, timings))
 282                 return -EINVAL;
 283
 284         return 0;
 285 }
 286
 287 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 288                 struct omap_video_timings *timings)
 289 {
 290         mutex_lock(&hdmi.lock);
 291
 292         hdmi.cfg.timings = *timings;
 293
 294         dispc_set_tv_pclk(timings->pixelclock);
 295
 296         mutex_unlock(&hdmi.lock);
 297 }
 298
 299 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
 300                 struct omap_video_timings *timings)
 301 {
 302         *timings = hdmi.cfg.timings;
 303 }
 304
 305 static void hdmi_dump_regs(struct seq_file *s)
 306 {
 307         mutex_lock(&hdmi.lock);
 308
 309         if (hdmi_runtime_get()) {
 310                 mutex_unlock(&hdmi.lock);
 311                 return;
 312         }
 313
 314         hdmi_wp_dump(&hdmi.wp, s);
 315         hdmi_pll_dump(&hdmi.pll, s);
 316         hdmi_phy_dump(&hdmi.phy, s);
 317         hdmi5_core_dump(&hdmi.core, s);
 318
 319         hdmi_runtime_put();
 320         mutex_unlock(&hdmi.lock);
 321 }
 322
 323 static int read_edid(u8 *buf, int len)
 324 {
 325         int r;
 326         int idlemode;
 327
 328         mutex_lock(&hdmi.lock);
 329
 330         r = hdmi_runtime_get();
 331         BUG_ON(r);
 332
 333         idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 334         /* No-idle mode */
 335         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 336
 337         r = hdmi5_read_edid(&hdmi.core,  buf, len);
 338
 339         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
 340
 341         hdmi_runtime_put();
 342         mutex_unlock(&hdmi.lock);
 343
 344         return r;
 345 }
 346
 347 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
 348 {
 349         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 350         hdmi_wp_audio_enable(&hd->wp, true);
 351         hdmi_wp_audio_core_req_enable(&hd->wp, true);
 352 }
 353
 354 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
 355 {
 356         hdmi_wp_audio_core_req_enable(&hd->wp, false);
 357         hdmi_wp_audio_enable(&hd->wp, false);
 358         REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
 359 }
 360
 361 static int hdmi_display_enable(struct omap_dss_device *dssdev)
 362 {
 363         struct omap_dss_device *out = &hdmi.output;
 364         unsigned long flags;
 365         int r = 0;
 366
 367         DSSDBG("ENTER hdmi_display_enable\n");
 368
 369         mutex_lock(&hdmi.lock);
 370
 371         if (!out->dispc_channel_connected) {
 372                 DSSERR("failed to enable display: no output/manager\n");
 373                 r = -ENODEV;
 374                 goto err0;
 375         }
 376
 377         r = hdmi_power_on_full(dssdev);
 378         if (r) {
 379                 DSSERR("failed to power on device\n");
 380                 goto err0;
 381         }
 382
 383         if (hdmi.audio_configured) {
 384                 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
 385                                        hdmi.cfg.timings.pixelclock);
 386                 if (r) {
 387                         DSSERR("Error restoring audio configuration: %d", r);
 388                         hdmi.audio_abort_cb(&hdmi.pdev->dev);
 389                         hdmi.audio_configured = false;
 390                 }
 391         }
 392
 393         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 394         if (hdmi.audio_configured && hdmi.audio_playing)
 395                 hdmi_start_audio_stream(&hdmi);
 396         hdmi.display_enabled = true;
 397         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 398
 399         mutex_unlock(&hdmi.lock);
 400         return 0;
 401
 402 err0:
 403         mutex_unlock(&hdmi.lock);
 404         return r;
 405 }
 406
 407 static void hdmi_display_disable(struct omap_dss_device *dssdev)
 408 {
 409         unsigned long flags;
 410
 411         DSSDBG("Enter hdmi_display_disable\n");
 412
 413         mutex_lock(&hdmi.lock);
 414
 415         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 416         hdmi_stop_audio_stream(&hdmi);
 417         hdmi.display_enabled = false;
 418         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 419
 420         hdmi_power_off_full(dssdev);
 421
 422         mutex_unlock(&hdmi.lock);
 423 }
 424
 425 static int hdmi_core_enable(struct omap_dss_device *dssdev)
 426 {
 427         int r = 0;
 428
 429         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
 430
 431         mutex_lock(&hdmi.lock);
 432
 433         r = hdmi_power_on_core(dssdev);
 434         if (r) {
 435                 DSSERR("failed to power on device\n");
 436                 goto err0;
 437         }
 438
 439         mutex_unlock(&hdmi.lock);
 440         return 0;
 441
 442 err0:
 443         mutex_unlock(&hdmi.lock);
 444         return r;
 445 }
 446
 447 static void hdmi_core_disable(struct omap_dss_device *dssdev)
 448 {
 449         DSSDBG("Enter omapdss_hdmi_core_disable\n");
 450
 451         mutex_lock(&hdmi.lock);
 452
 453         hdmi_power_off_core(dssdev);
 454
 455         mutex_unlock(&hdmi.lock);
 456 }
 457
 458 static int hdmi_connect(struct omap_dss_device *dssdev,
 459                 struct omap_dss_device *dst)
 460 {
 461         enum omap_channel channel = dssdev->dispc_channel;
 462         int r;
 463
 464         r = hdmi_init_regulator();
 465         if (r)
 466                 return r;
 467
 468         r = dss_mgr_connect(channel, dssdev);
 469         if (r)
 470                 return r;
 471
 472         r = omapdss_output_set_device(dssdev, dst);
 473         if (r) {
 474                 DSSERR("failed to connect output to new device: %s\n",
 475                                 dst->name);
 476                 dss_mgr_disconnect(channel, dssdev);
 477                 return r;
 478         }
 479
 480         return 0;
 481 }
 482
 483 static void hdmi_disconnect(struct omap_dss_device *dssdev,
 484                 struct omap_dss_device *dst)
 485 {
 486         enum omap_channel channel = dssdev->dispc_channel;
 487
 488         WARN_ON(dst != dssdev->dst);
 489
 490         if (dst != dssdev->dst)
 491                 return;
 492
 493         omapdss_output_unset_device(dssdev);
 494
 495         dss_mgr_disconnect(channel, dssdev);
 496 }
 497
 498 static int hdmi_read_edid(struct omap_dss_device *dssdev,
 499                 u8 *edid, int len)
 500 {
 501         bool need_enable;
 502         int r;
 503
 504         need_enable = hdmi.core_enabled == false;
 505
 506         if (need_enable) {
 507                 r = hdmi_core_enable(dssdev);
 508                 if (r)
 509                         return r;
 510         }
 511
 512         r = read_edid(edid, len);
 513
 514         if (need_enable)
 515                 hdmi_core_disable(dssdev);
 516
 517         return r;
 518 }
 519
 520 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
 521                 const struct hdmi_avi_infoframe *avi)
 522 {
 523         hdmi.cfg.infoframe = *avi;
 524         return 0;
 525 }
 526
 527 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
 528                 bool hdmi_mode)
 529 {
 530         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
 531         return 0;
 532 }
 533
 534 static const struct omapdss_hdmi_ops hdmi_ops = {
 535         .connect                = hdmi_connect,
 536         .disconnect             = hdmi_disconnect,
 537
 538         .enable                 = hdmi_display_enable,
 539         .disable                = hdmi_display_disable,
 540
 541         .check_timings          = hdmi_display_check_timing,
 542         .set_timings            = hdmi_display_set_timing,
 543         .get_timings            = hdmi_display_get_timings,
 544
 545         .read_edid              = hdmi_read_edid,
 546         .set_infoframe          = hdmi_set_infoframe,
 547         .set_hdmi_mode          = hdmi_set_hdmi_mode,
 548 };
 549
 550 static void hdmi_init_output(struct platform_device *pdev)
 551 {
 552         struct omap_dss_device *out = &hdmi.output;
 553
 554         out->dev = &pdev->dev;
 555         out->id = OMAP_DSS_OUTPUT_HDMI;
 556         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
 557         out->name = "hdmi.0";
 558         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
 559         out->ops.hdmi = &hdmi_ops;
 560         out->owner = THIS_MODULE;
 561
 562         omapdss_register_output(out);
 563 }
 564
 565 static void hdmi_uninit_output(struct platform_device *pdev)
 566 {
 567         struct omap_dss_device *out = &hdmi.output;
 568
 569         omapdss_unregister_output(out);
 570 }
 571
 572 static int hdmi_probe_of(struct platform_device *pdev)
 573 {
 574         struct device_node *node = pdev->dev.of_node;
 575         struct device_node *ep;
 576         int r;
 577
 578         ep = omapdss_of_get_first_endpoint(node);
 579         if (!ep)
 580                 return 0;
 581
 582         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
 583         if (r)
 584                 goto err;
 585
 586         of_node_put(ep);
 587         return 0;
 588
 589 err:
 590         of_node_put(ep);
 591         return r;
 592 }
 593
 594 /* Audio callbacks */
 595 static int hdmi_audio_startup(struct device *dev,
 596                               void (*abort_cb)(struct device *dev))
 597 {
 598         struct omap_hdmi *hd = dev_get_drvdata(dev);
 599         int ret = 0;
 600
 601         mutex_lock(&hd->lock);
 602
 603         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 604                 ret = -EPERM;
 605                 goto out;
 606         }
 607
 608         hd->audio_abort_cb = abort_cb;
 609
 610 out:
 611         mutex_unlock(&hd->lock);
 612
 613         return ret;
 614 }
 615
 616 static int hdmi_audio_shutdown(struct device *dev)
 617 {
 618         struct omap_hdmi *hd = dev_get_drvdata(dev);
 619
 620         mutex_lock(&hd->lock);
 621         hd->audio_abort_cb = NULL;
 622         hd->audio_configured = false;
 623         hd->audio_playing = false;
 624         mutex_unlock(&hd->lock);
 625
 626         return 0;
 627 }
 628
 629 static int hdmi_audio_start(struct device *dev)
 630 {
 631         struct omap_hdmi *hd = dev_get_drvdata(dev);
 632         unsigned long flags;
 633
 634         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 635
 636         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 637
 638         if (hd->display_enabled)
 639                 hdmi_start_audio_stream(hd);
 640         hd->audio_playing = true;
 641
 642         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 643         return 0;
 644 }
 645
 646 static void hdmi_audio_stop(struct device *dev)
 647 {
 648         struct omap_hdmi *hd = dev_get_drvdata(dev);
 649         unsigned long flags;
 650
 651         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 652
 653         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 654
 655         if (hd->display_enabled)
 656                 hdmi_stop_audio_stream(hd);
 657         hd->audio_playing = false;
 658
 659         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 660 }
 661
 662 static int hdmi_audio_config(struct device *dev,
 663                              struct omap_dss_audio *dss_audio)
 664 {
 665         struct omap_hdmi *hd = dev_get_drvdata(dev);
 666         int ret;
 667
 668         mutex_lock(&hd->lock);
 669
 670         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 671                 ret = -EPERM;
 672                 goto out;
 673         }
 674
 675         ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
 676                                  hd->cfg.timings.pixelclock);
 677
 678         if (!ret) {
 679                 hd->audio_configured = true;
 680                 hd->audio_config = *dss_audio;
 681         }
 682 out:
 683         mutex_unlock(&hd->lock);
 684
 685         return ret;
 686 }
 687
 688 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
 689         .audio_startup = hdmi_audio_startup,
 690         .audio_shutdown = hdmi_audio_shutdown,
 691         .audio_start = hdmi_audio_start,
 692         .audio_stop = hdmi_audio_stop,
 693         .audio_config = hdmi_audio_config,
 694 };
 695
 696 static int hdmi_audio_register(struct device *dev)
 697 {
 698         struct omap_hdmi_audio_pdata pdata = {
 699                 .dev = dev,
 700                 .dss_version = omapdss_get_version(),
 701                 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
 702                 .ops = &hdmi_audio_ops,
 703         };
 704
 705         hdmi.audio_pdev = platform_device_register_data(
 706                 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
 707                 &pdata, sizeof(pdata));
 708
 709         if (IS_ERR(hdmi.audio_pdev))
 710                 return PTR_ERR(hdmi.audio_pdev);
 711
 712         hdmi_runtime_get();
 713         hdmi.wp_idlemode =
 714                 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 715         hdmi_runtime_put();
 716
 717         return 0;
 718 }
 719
 720 /* HDMI HW IP initialisation */
 721 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
 722 {
 723         struct platform_device *pdev = to_platform_device(dev);
 724         int r;
 725         int irq;
 726
 727         hdmi.pdev = pdev;
 728         dev_set_drvdata(&pdev->dev, &hdmi);
 729
 730         mutex_init(&hdmi.lock);
 731         spin_lock_init(&hdmi.audio_playing_lock);
 732
 733         if (pdev->dev.of_node) {
 734                 r = hdmi_probe_of(pdev);
 735                 if (r)
 736                         return r;
 737         }
 738
 739         r = hdmi_wp_init(pdev, &hdmi.wp);
 740         if (r)
 741                 return r;
 742
 743         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
 744         if (r)
 745                 return r;
 746
 747         r = hdmi_phy_init(pdev, &hdmi.phy);
 748         if (r)
 749                 goto err;
 750
 751         r = hdmi5_core_init(pdev, &hdmi.core);
 752         if (r)
 753                 goto err;
 754
 755         irq = platform_get_irq(pdev, 0);
 756         if (irq < 0) {
 757                 DSSERR("platform_get_irq failed\n");
 758                 r = -ENODEV;
 759                 goto err;
 760         }
 761
 762         r = devm_request_threaded_irq(&pdev->dev, irq,
 763                         NULL, hdmi_irq_handler,
 764                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
 765         if (r) {
 766                 DSSERR("HDMI IRQ request failed\n");
 767                 goto err;
 768         }
 769
 770         pm_runtime_enable(&pdev->dev);
 771
 772         hdmi_init_output(pdev);
 773
 774         r = hdmi_audio_register(&pdev->dev);
 775         if (r) {
 776                 DSSERR("Registering HDMI audio failed %d\n", r);
 777                 hdmi_uninit_output(pdev);
 778                 pm_runtime_disable(&pdev->dev);
 779                 return r;
 780         }
 781
 782         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
 783
 784         return 0;
 785 err:
 786         hdmi_pll_uninit(&hdmi.pll);
 787         return r;
 788 }
 789
 790 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
 791 {
 792         struct platform_device *pdev = to_platform_device(dev);
 793
 794         if (hdmi.audio_pdev)
 795                 platform_device_unregister(hdmi.audio_pdev);
 796
 797         hdmi_uninit_output(pdev);
 798
 799         hdmi_pll_uninit(&hdmi.pll);
 800
 801         pm_runtime_disable(&pdev->dev);
 802 }
 803
 804 static const struct component_ops hdmi5_component_ops = {
 805         .bind   = hdmi5_bind,
 806         .unbind = hdmi5_unbind,
 807 };
 808
 809 static int hdmi5_probe(struct platform_device *pdev)
 810 {
 811         return component_add(&pdev->dev, &hdmi5_component_ops);
 812 }
 813
 814 static int hdmi5_remove(struct platform_device *pdev)
 815 {
 816         component_del(&pdev->dev, &hdmi5_component_ops);
 817         return 0;
 818 }
 819
 820 static int hdmi_runtime_suspend(struct device *dev)
 821 {
 822         dispc_runtime_put();
 823
 824         return 0;
 825 }
 826
 827 static int hdmi_runtime_resume(struct device *dev)
 828 {
 829         int r;
 830
 831         r = dispc_runtime_get();
 832         if (r < 0)
 833                 return r;
 834
 835         return 0;
 836 }
 837
 838 static const struct dev_pm_ops hdmi_pm_ops = {
 839         .runtime_suspend = hdmi_runtime_suspend,
 840         .runtime_resume = hdmi_runtime_resume,
 841 };
 842
 843 static const struct of_device_id hdmi_of_match[] = {
 844         { .compatible = "ti,omap5-hdmi", },
 845         { .compatible = "ti,dra7-hdmi", },
 846         {},
 847 };
 848
 849 static struct platform_driver omapdss_hdmihw_driver = {
 850         .probe          = hdmi5_probe,
 851         .remove         = hdmi5_remove,
 852         .driver         = {
 853                 .name   = "omapdss_hdmi5",
 854                 .pm     = &hdmi_pm_ops,
 855                 .of_match_table = hdmi_of_match,
 856                 .suppress_bind_attrs = true,
 857         },
 858 };
 859
 860 int __init hdmi5_init_platform_driver(void)
 861 {
 862         return platform_driver_register(&omapdss_hdmihw_driver);
 863 }
 864
 865 void hdmi5_uninit_platform_driver(void)
 866 {
 867         platform_driver_unregister(&omapdss_hdmihw_driver);
 868 }