2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #include <linux/backlight.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/module.h>
27 #include <linux/of_platform.h>
28 #include <linux/platform_device.h>
29 #include <linux/regulator/consumer.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_mipi_dsi.h>
34 #include <drm/drm_panel.h>
36 #include <video/display_timing.h>
37 #include <video/videomode.h>
40 const struct drm_display_mode
*modes
;
41 unsigned int num_modes
;
42 const struct display_timing
*timings
;
43 unsigned int num_timings
;
48 * @width: width (in millimeters) of the panel's active display area
49 * @height: height (in millimeters) of the panel's active display area
57 * @prepare: the time (in milliseconds) that it takes for the panel to
58 * become ready and start receiving video data
59 * @enable: the time (in milliseconds) that it takes for the panel to
60 * display the first valid frame after starting to receive
62 * @disable: the time (in milliseconds) that it takes for the panel to
63 * turn the display off (no content is visible)
64 * @unprepare: the time (in milliseconds) that it takes for the panel
65 * to power itself down completely
71 unsigned int unprepare
;
79 struct drm_panel base
;
83 const struct panel_desc
*desc
;
85 struct backlight_device
*backlight
;
86 struct regulator
*supply
;
87 struct i2c_adapter
*ddc
;
89 struct gpio_desc
*enable_gpio
;
92 static inline struct panel_simple
*to_panel_simple(struct drm_panel
*panel
)
94 return container_of(panel
, struct panel_simple
, base
);
97 static int panel_simple_get_fixed_modes(struct panel_simple
*panel
)
99 struct drm_connector
*connector
= panel
->base
.connector
;
100 struct drm_device
*drm
= panel
->base
.drm
;
101 struct drm_display_mode
*mode
;
102 unsigned int i
, num
= 0;
107 for (i
= 0; i
< panel
->desc
->num_timings
; i
++) {
108 const struct display_timing
*dt
= &panel
->desc
->timings
[i
];
111 videomode_from_timing(dt
, &vm
);
112 mode
= drm_mode_create(drm
);
114 dev_err(drm
->dev
, "failed to add mode %ux%u\n",
115 dt
->hactive
.typ
, dt
->vactive
.typ
);
119 drm_display_mode_from_videomode(&vm
, mode
);
121 mode
->type
|= DRM_MODE_TYPE_DRIVER
;
123 if (panel
->desc
->num_modes
== 1)
124 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
126 drm_mode_probed_add(connector
, mode
);
130 for (i
= 0; i
< panel
->desc
->num_modes
; i
++) {
131 const struct drm_display_mode
*m
= &panel
->desc
->modes
[i
];
133 mode
= drm_mode_duplicate(drm
, m
);
135 dev_err(drm
->dev
, "failed to add mode %ux%u@%u\n",
136 m
->hdisplay
, m
->vdisplay
, m
->vrefresh
);
140 mode
->type
|= DRM_MODE_TYPE_DRIVER
;
142 if (panel
->desc
->num_modes
== 1)
143 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
145 drm_mode_set_name(mode
);
147 drm_mode_probed_add(connector
, mode
);
151 connector
->display_info
.bpc
= panel
->desc
->bpc
;
152 connector
->display_info
.width_mm
= panel
->desc
->size
.width
;
153 connector
->display_info
.height_mm
= panel
->desc
->size
.height
;
154 if (panel
->desc
->bus_format
)
155 drm_display_info_set_bus_formats(&connector
->display_info
,
156 &panel
->desc
->bus_format
, 1);
157 connector
->display_info
.bus_flags
= panel
->desc
->bus_flags
;
162 static int panel_simple_disable(struct drm_panel
*panel
)
164 struct panel_simple
*p
= to_panel_simple(panel
);
170 p
->backlight
->props
.power
= FB_BLANK_POWERDOWN
;
171 backlight_update_status(p
->backlight
);
174 if (p
->desc
->delay
.disable
)
175 msleep(p
->desc
->delay
.disable
);
182 static int panel_simple_unprepare(struct drm_panel
*panel
)
184 struct panel_simple
*p
= to_panel_simple(panel
);
190 gpiod_set_value_cansleep(p
->enable_gpio
, 0);
192 regulator_disable(p
->supply
);
194 if (p
->desc
->delay
.unprepare
)
195 msleep(p
->desc
->delay
.unprepare
);
202 static int panel_simple_prepare(struct drm_panel
*panel
)
204 struct panel_simple
*p
= to_panel_simple(panel
);
210 err
= regulator_enable(p
->supply
);
212 dev_err(panel
->dev
, "failed to enable supply: %d\n", err
);
217 gpiod_set_value_cansleep(p
->enable_gpio
, 1);
219 if (p
->desc
->delay
.prepare
)
220 msleep(p
->desc
->delay
.prepare
);
227 static int panel_simple_enable(struct drm_panel
*panel
)
229 struct panel_simple
*p
= to_panel_simple(panel
);
234 if (p
->desc
->delay
.enable
)
235 msleep(p
->desc
->delay
.enable
);
238 p
->backlight
->props
.power
= FB_BLANK_UNBLANK
;
239 backlight_update_status(p
->backlight
);
247 static int panel_simple_get_modes(struct drm_panel
*panel
)
249 struct panel_simple
*p
= to_panel_simple(panel
);
252 /* probe EDID if a DDC bus is available */
254 struct edid
*edid
= drm_get_edid(panel
->connector
, p
->ddc
);
255 drm_mode_connector_update_edid_property(panel
->connector
, edid
);
257 num
+= drm_add_edid_modes(panel
->connector
, edid
);
262 /* add hard-coded panel modes */
263 num
+= panel_simple_get_fixed_modes(p
);
268 static int panel_simple_get_timings(struct drm_panel
*panel
,
269 unsigned int num_timings
,
270 struct display_timing
*timings
)
272 struct panel_simple
*p
= to_panel_simple(panel
);
275 if (p
->desc
->num_timings
< num_timings
)
276 num_timings
= p
->desc
->num_timings
;
279 for (i
= 0; i
< num_timings
; i
++)
280 timings
[i
] = p
->desc
->timings
[i
];
282 return p
->desc
->num_timings
;
285 static const struct drm_panel_funcs panel_simple_funcs
= {
286 .disable
= panel_simple_disable
,
287 .unprepare
= panel_simple_unprepare
,
288 .prepare
= panel_simple_prepare
,
289 .enable
= panel_simple_enable
,
290 .get_modes
= panel_simple_get_modes
,
291 .get_timings
= panel_simple_get_timings
,
294 static int panel_simple_probe(struct device
*dev
, const struct panel_desc
*desc
)
296 struct device_node
*backlight
, *ddc
;
297 struct panel_simple
*panel
;
300 panel
= devm_kzalloc(dev
, sizeof(*panel
), GFP_KERNEL
);
304 panel
->enabled
= false;
305 panel
->prepared
= false;
308 panel
->supply
= devm_regulator_get(dev
, "power");
309 if (IS_ERR(panel
->supply
))
310 return PTR_ERR(panel
->supply
);
312 panel
->enable_gpio
= devm_gpiod_get_optional(dev
, "enable",
314 if (IS_ERR(panel
->enable_gpio
)) {
315 err
= PTR_ERR(panel
->enable_gpio
);
316 dev_err(dev
, "failed to request GPIO: %d\n", err
);
320 backlight
= of_parse_phandle(dev
->of_node
, "backlight", 0);
322 panel
->backlight
= of_find_backlight_by_node(backlight
);
323 of_node_put(backlight
);
325 if (!panel
->backlight
)
326 return -EPROBE_DEFER
;
329 ddc
= of_parse_phandle(dev
->of_node
, "ddc-i2c-bus", 0);
331 panel
->ddc
= of_find_i2c_adapter_by_node(ddc
);
340 drm_panel_init(&panel
->base
);
341 panel
->base
.dev
= dev
;
342 panel
->base
.funcs
= &panel_simple_funcs
;
344 err
= drm_panel_add(&panel
->base
);
348 dev_set_drvdata(dev
, panel
);
354 put_device(&panel
->ddc
->dev
);
356 if (panel
->backlight
)
357 put_device(&panel
->backlight
->dev
);
362 static int panel_simple_remove(struct device
*dev
)
364 struct panel_simple
*panel
= dev_get_drvdata(dev
);
366 drm_panel_detach(&panel
->base
);
367 drm_panel_remove(&panel
->base
);
369 panel_simple_disable(&panel
->base
);
372 put_device(&panel
->ddc
->dev
);
374 if (panel
->backlight
)
375 put_device(&panel
->backlight
->dev
);
380 static void panel_simple_shutdown(struct device
*dev
)
382 struct panel_simple
*panel
= dev_get_drvdata(dev
);
384 panel_simple_disable(&panel
->base
);
387 static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode
= {
390 .hsync_start
= 800 + 0,
391 .hsync_end
= 800 + 0 + 255,
392 .htotal
= 800 + 0 + 255 + 0,
394 .vsync_start
= 480 + 2,
395 .vsync_end
= 480 + 2 + 45,
396 .vtotal
= 480 + 2 + 45 + 0,
398 .flags
= DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
,
401 static const struct panel_desc ampire_am800480r3tmqwa1h
= {
402 .modes
= &ire_am800480r3tmqwa1h_mode
,
409 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
412 static const struct drm_display_mode auo_b101aw03_mode
= {
415 .hsync_start
= 1024 + 156,
416 .hsync_end
= 1024 + 156 + 8,
417 .htotal
= 1024 + 156 + 8 + 156,
419 .vsync_start
= 600 + 16,
420 .vsync_end
= 600 + 16 + 6,
421 .vtotal
= 600 + 16 + 6 + 16,
425 static const struct panel_desc auo_b101aw03
= {
426 .modes
= &auo_b101aw03_mode
,
435 static const struct drm_display_mode auo_b101ean01_mode
= {
438 .hsync_start
= 1280 + 119,
439 .hsync_end
= 1280 + 119 + 32,
440 .htotal
= 1280 + 119 + 32 + 21,
442 .vsync_start
= 800 + 4,
443 .vsync_end
= 800 + 4 + 20,
444 .vtotal
= 800 + 4 + 20 + 8,
448 static const struct panel_desc auo_b101ean01
= {
449 .modes
= &auo_b101ean01_mode
,
458 static const struct drm_display_mode auo_b101xtn01_mode
= {
461 .hsync_start
= 1366 + 20,
462 .hsync_end
= 1366 + 20 + 70,
463 .htotal
= 1366 + 20 + 70,
465 .vsync_start
= 768 + 14,
466 .vsync_end
= 768 + 14 + 42,
467 .vtotal
= 768 + 14 + 42,
469 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
472 static const struct panel_desc auo_b101xtn01
= {
473 .modes
= &auo_b101xtn01_mode
,
482 static const struct drm_display_mode auo_b116xw03_mode
= {
485 .hsync_start
= 1366 + 40,
486 .hsync_end
= 1366 + 40 + 40,
487 .htotal
= 1366 + 40 + 40 + 32,
489 .vsync_start
= 768 + 10,
490 .vsync_end
= 768 + 10 + 12,
491 .vtotal
= 768 + 10 + 12 + 6,
495 static const struct panel_desc auo_b116xw03
= {
496 .modes
= &auo_b116xw03_mode
,
505 static const struct drm_display_mode auo_b133xtn01_mode
= {
508 .hsync_start
= 1366 + 48,
509 .hsync_end
= 1366 + 48 + 32,
510 .htotal
= 1366 + 48 + 32 + 20,
512 .vsync_start
= 768 + 3,
513 .vsync_end
= 768 + 3 + 6,
514 .vtotal
= 768 + 3 + 6 + 13,
518 static const struct panel_desc auo_b133xtn01
= {
519 .modes
= &auo_b133xtn01_mode
,
528 static const struct drm_display_mode auo_b133htn01_mode
= {
531 .hsync_start
= 1920 + 172,
532 .hsync_end
= 1920 + 172 + 80,
533 .htotal
= 1920 + 172 + 80 + 60,
535 .vsync_start
= 1080 + 25,
536 .vsync_end
= 1080 + 25 + 10,
537 .vtotal
= 1080 + 25 + 10 + 10,
541 static const struct panel_desc auo_b133htn01
= {
542 .modes
= &auo_b133htn01_mode
,
556 static const struct drm_display_mode avic_tm070ddh03_mode
= {
559 .hsync_start
= 1024 + 160,
560 .hsync_end
= 1024 + 160 + 4,
561 .htotal
= 1024 + 160 + 4 + 156,
563 .vsync_start
= 600 + 17,
564 .vsync_end
= 600 + 17 + 1,
565 .vtotal
= 600 + 17 + 1 + 17,
569 static const struct panel_desc avic_tm070ddh03
= {
570 .modes
= &avic_tm070ddh03_mode
,
584 static const struct drm_display_mode chunghwa_claa101wa01a_mode
= {
587 .hsync_start
= 1366 + 58,
588 .hsync_end
= 1366 + 58 + 58,
589 .htotal
= 1366 + 58 + 58 + 58,
591 .vsync_start
= 768 + 4,
592 .vsync_end
= 768 + 4 + 4,
593 .vtotal
= 768 + 4 + 4 + 4,
597 static const struct panel_desc chunghwa_claa101wa01a
= {
598 .modes
= &chunghwa_claa101wa01a_mode
,
607 static const struct drm_display_mode chunghwa_claa101wb01_mode
= {
610 .hsync_start
= 1366 + 48,
611 .hsync_end
= 1366 + 48 + 32,
612 .htotal
= 1366 + 48 + 32 + 20,
614 .vsync_start
= 768 + 16,
615 .vsync_end
= 768 + 16 + 8,
616 .vtotal
= 768 + 16 + 8 + 16,
620 static const struct panel_desc chunghwa_claa101wb01
= {
621 .modes
= &chunghwa_claa101wb01_mode
,
630 static const struct drm_display_mode edt_et057090dhu_mode
= {
633 .hsync_start
= 640 + 16,
634 .hsync_end
= 640 + 16 + 30,
635 .htotal
= 640 + 16 + 30 + 114,
637 .vsync_start
= 480 + 10,
638 .vsync_end
= 480 + 10 + 3,
639 .vtotal
= 480 + 10 + 3 + 32,
641 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
644 static const struct panel_desc edt_et057090dhu
= {
645 .modes
= &edt_et057090dhu_mode
,
654 static const struct drm_display_mode edt_etm0700g0dh6_mode
= {
657 .hsync_start
= 800 + 40,
658 .hsync_end
= 800 + 40 + 128,
659 .htotal
= 800 + 40 + 128 + 88,
661 .vsync_start
= 480 + 10,
662 .vsync_end
= 480 + 10 + 2,
663 .vtotal
= 480 + 10 + 2 + 33,
665 .flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
,
668 static const struct panel_desc edt_etm0700g0dh6
= {
669 .modes
= &edt_etm0700g0dh6_mode
,
678 static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode
= {
681 .hsync_start
= 800 + 168,
682 .hsync_end
= 800 + 168 + 64,
683 .htotal
= 800 + 168 + 64 + 88,
685 .vsync_start
= 480 + 37,
686 .vsync_end
= 480 + 37 + 2,
687 .vtotal
= 480 + 37 + 2 + 8,
691 static const struct panel_desc foxlink_fl500wvr00_a0t
= {
692 .modes
= &foxlink_fl500wvr00_a0t_mode
,
699 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
702 static const struct drm_display_mode giantplus_gpg482739qs5_mode
= {
705 .hsync_start
= 480 + 5,
706 .hsync_end
= 480 + 5 + 1,
707 .htotal
= 480 + 5 + 1 + 40,
709 .vsync_start
= 272 + 8,
710 .vsync_end
= 272 + 8 + 1,
711 .vtotal
= 272 + 8 + 1 + 8,
715 static const struct panel_desc giantplus_gpg482739qs5
= {
716 .modes
= &giantplus_gpg482739qs5_mode
,
723 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
726 static const struct display_timing hannstar_hsd070pww1_timing
= {
727 .pixelclock
= { 64300000, 71100000, 82000000 },
728 .hactive
= { 1280, 1280, 1280 },
729 .hfront_porch
= { 1, 1, 10 },
730 .hback_porch
= { 1, 1, 10 },
732 * According to the data sheet, the minimum horizontal blanking interval
733 * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
734 * minimum working horizontal blanking interval to be 60 clocks.
736 .hsync_len
= { 58, 158, 661 },
737 .vactive
= { 800, 800, 800 },
738 .vfront_porch
= { 1, 1, 10 },
739 .vback_porch
= { 1, 1, 10 },
740 .vsync_len
= { 1, 21, 203 },
741 .flags
= DISPLAY_FLAGS_DE_HIGH
,
744 static const struct panel_desc hannstar_hsd070pww1
= {
745 .timings
= &hannstar_hsd070pww1_timing
,
752 .bus_format
= MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
,
755 static const struct display_timing hannstar_hsd100pxn1_timing
= {
756 .pixelclock
= { 55000000, 65000000, 75000000 },
757 .hactive
= { 1024, 1024, 1024 },
758 .hfront_porch
= { 40, 40, 40 },
759 .hback_porch
= { 220, 220, 220 },
760 .hsync_len
= { 20, 60, 100 },
761 .vactive
= { 768, 768, 768 },
762 .vfront_porch
= { 7, 7, 7 },
763 .vback_porch
= { 21, 21, 21 },
764 .vsync_len
= { 10, 10, 10 },
765 .flags
= DISPLAY_FLAGS_DE_HIGH
,
768 static const struct panel_desc hannstar_hsd100pxn1
= {
769 .timings
= &hannstar_hsd100pxn1_timing
,
776 .bus_format
= MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
,
779 static const struct drm_display_mode hitachi_tx23d38vm0caa_mode
= {
782 .hsync_start
= 800 + 85,
783 .hsync_end
= 800 + 85 + 86,
784 .htotal
= 800 + 85 + 86 + 85,
786 .vsync_start
= 480 + 16,
787 .vsync_end
= 480 + 16 + 13,
788 .vtotal
= 480 + 16 + 13 + 16,
792 static const struct panel_desc hitachi_tx23d38vm0caa
= {
793 .modes
= &hitachi_tx23d38vm0caa_mode
,
802 static const struct drm_display_mode innolux_at043tn24_mode
= {
805 .hsync_start
= 480 + 2,
806 .hsync_end
= 480 + 2 + 41,
807 .htotal
= 480 + 2 + 41 + 2,
809 .vsync_start
= 272 + 2,
810 .vsync_end
= 272 + 2 + 11,
811 .vtotal
= 272 + 2 + 11 + 2,
813 .flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
,
816 static const struct panel_desc innolux_at043tn24
= {
817 .modes
= &innolux_at043tn24_mode
,
824 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
827 static const struct drm_display_mode innolux_at070tn92_mode
= {
830 .hsync_start
= 800 + 210,
831 .hsync_end
= 800 + 210 + 20,
832 .htotal
= 800 + 210 + 20 + 46,
834 .vsync_start
= 480 + 22,
835 .vsync_end
= 480 + 22 + 10,
836 .vtotal
= 480 + 22 + 23 + 10,
840 static const struct panel_desc innolux_at070tn92
= {
841 .modes
= &innolux_at070tn92_mode
,
847 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
850 static const struct drm_display_mode innolux_g121i1_l01_mode
= {
853 .hsync_start
= 1280 + 64,
854 .hsync_end
= 1280 + 64 + 32,
855 .htotal
= 1280 + 64 + 32 + 64,
857 .vsync_start
= 800 + 9,
858 .vsync_end
= 800 + 9 + 6,
859 .vtotal
= 800 + 9 + 6 + 9,
863 static const struct panel_desc innolux_g121i1_l01
= {
864 .modes
= &innolux_g121i1_l01_mode
,
873 static const struct drm_display_mode innolux_g121x1_l03_mode
= {
876 .hsync_start
= 1024 + 0,
877 .hsync_end
= 1024 + 1,
878 .htotal
= 1024 + 0 + 1 + 320,
880 .vsync_start
= 768 + 38,
881 .vsync_end
= 768 + 38 + 1,
882 .vtotal
= 768 + 38 + 1 + 0,
884 .flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
,
887 static const struct panel_desc innolux_g121x1_l03
= {
888 .modes
= &innolux_g121x1_l03_mode
,
902 static const struct drm_display_mode innolux_n116bge_mode
= {
905 .hsync_start
= 1366 + 136,
906 .hsync_end
= 1366 + 136 + 30,
907 .htotal
= 1366 + 136 + 30 + 60,
909 .vsync_start
= 768 + 8,
910 .vsync_end
= 768 + 8 + 12,
911 .vtotal
= 768 + 8 + 12 + 12,
913 .flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
,
916 static const struct panel_desc innolux_n116bge
= {
917 .modes
= &innolux_n116bge_mode
,
926 static const struct drm_display_mode innolux_n156bge_l21_mode
= {
929 .hsync_start
= 1366 + 16,
930 .hsync_end
= 1366 + 16 + 34,
931 .htotal
= 1366 + 16 + 34 + 50,
933 .vsync_start
= 768 + 2,
934 .vsync_end
= 768 + 2 + 6,
935 .vtotal
= 768 + 2 + 6 + 12,
939 static const struct panel_desc innolux_n156bge_l21
= {
940 .modes
= &innolux_n156bge_l21_mode
,
949 static const struct drm_display_mode innolux_zj070na_01p_mode
= {
952 .hsync_start
= 1024 + 128,
953 .hsync_end
= 1024 + 128 + 64,
954 .htotal
= 1024 + 128 + 64 + 128,
956 .vsync_start
= 600 + 16,
957 .vsync_end
= 600 + 16 + 4,
958 .vtotal
= 600 + 16 + 4 + 16,
962 static const struct panel_desc innolux_zj070na_01p
= {
963 .modes
= &innolux_zj070na_01p_mode
,
972 static const struct display_timing kyo_tcg121xglp_timing
= {
973 .pixelclock
= { 52000000, 65000000, 71000000 },
974 .hactive
= { 1024, 1024, 1024 },
975 .hfront_porch
= { 2, 2, 2 },
976 .hback_porch
= { 2, 2, 2 },
977 .hsync_len
= { 86, 124, 244 },
978 .vactive
= { 768, 768, 768 },
979 .vfront_porch
= { 2, 2, 2 },
980 .vback_porch
= { 2, 2, 2 },
981 .vsync_len
= { 6, 34, 73 },
982 .flags
= DISPLAY_FLAGS_DE_HIGH
,
985 static const struct panel_desc kyo_tcg121xglp
= {
986 .timings
= &kyo_tcg121xglp_timing
,
993 .bus_format
= MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
,
996 static const struct drm_display_mode lg_lb070wv8_mode
= {
999 .hsync_start
= 800 + 88,
1000 .hsync_end
= 800 + 88 + 80,
1001 .htotal
= 800 + 88 + 80 + 88,
1003 .vsync_start
= 480 + 10,
1004 .vsync_end
= 480 + 10 + 25,
1005 .vtotal
= 480 + 10 + 25 + 10,
1009 static const struct panel_desc lg_lb070wv8
= {
1010 .modes
= &lg_lb070wv8_mode
,
1017 .bus_format
= MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
,
1020 static const struct drm_display_mode lg_lp120up1_mode
= {
1023 .hsync_start
= 1920 + 40,
1024 .hsync_end
= 1920 + 40 + 40,
1025 .htotal
= 1920 + 40 + 40+ 80,
1027 .vsync_start
= 1280 + 4,
1028 .vsync_end
= 1280 + 4 + 4,
1029 .vtotal
= 1280 + 4 + 4 + 12,
1033 static const struct panel_desc lg_lp120up1
= {
1034 .modes
= &lg_lp120up1_mode
,
1043 static const struct drm_display_mode lg_lp129qe_mode
= {
1046 .hsync_start
= 2560 + 48,
1047 .hsync_end
= 2560 + 48 + 32,
1048 .htotal
= 2560 + 48 + 32 + 80,
1050 .vsync_start
= 1700 + 3,
1051 .vsync_end
= 1700 + 3 + 10,
1052 .vtotal
= 1700 + 3 + 10 + 36,
1056 static const struct panel_desc lg_lp129qe
= {
1057 .modes
= &lg_lp129qe_mode
,
1066 static const struct drm_display_mode nec_nl4827hc19_05b_mode
= {
1069 .hsync_start
= 480 + 2,
1070 .hsync_end
= 480 + 2 + 41,
1071 .htotal
= 480 + 2 + 41 + 2,
1073 .vsync_start
= 272 + 2,
1074 .vsync_end
= 272 + 2 + 4,
1075 .vtotal
= 272 + 2 + 4 + 2,
1077 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
1080 static const struct panel_desc nec_nl4827hc19_05b
= {
1081 .modes
= &nec_nl4827hc19_05b_mode
,
1088 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
1089 .bus_flags
= DRM_BUS_FLAG_PIXDATA_POSEDGE
,
1092 static const struct display_timing okaya_rs800480t_7x0gp_timing
= {
1093 .pixelclock
= { 30000000, 30000000, 40000000 },
1094 .hactive
= { 800, 800, 800 },
1095 .hfront_porch
= { 40, 40, 40 },
1096 .hback_porch
= { 40, 40, 40 },
1097 .hsync_len
= { 1, 48, 48 },
1098 .vactive
= { 480, 480, 480 },
1099 .vfront_porch
= { 13, 13, 13 },
1100 .vback_porch
= { 29, 29, 29 },
1101 .vsync_len
= { 3, 3, 3 },
1102 .flags
= DISPLAY_FLAGS_DE_HIGH
,
1105 static const struct panel_desc okaya_rs800480t_7x0gp
= {
1106 .timings
= &okaya_rs800480t_7x0gp_timing
,
1119 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
1122 static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode
= {
1125 .hsync_start
= 480 + 5,
1126 .hsync_end
= 480 + 5 + 30,
1127 .htotal
= 480 + 5 + 30 + 10,
1129 .vsync_start
= 272 + 8,
1130 .vsync_end
= 272 + 8 + 5,
1131 .vtotal
= 272 + 8 + 5 + 3,
1135 static const struct panel_desc olimex_lcd_olinuxino_43ts
= {
1136 .modes
= &olimex_lcd_olinuxino_43ts_mode
,
1142 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
1146 * 800x480 CVT. The panel appears to be quite accepting, at least as far as
1147 * pixel clocks, but this is the timing that was being used in the Adafruit
1148 * installation instructions.
1150 static const struct drm_display_mode ontat_yx700wv03_mode
= {
1161 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
1166 * https://www.adafruit.com/images/product-files/2406/c3163.pdf
1168 static const struct panel_desc ontat_yx700wv03
= {
1169 .modes
= &ontat_yx700wv03_mode
,
1176 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
1179 static const struct drm_display_mode ortustech_com43h4m85ulc_mode
= {
1182 .hsync_start
= 480 + 10,
1183 .hsync_end
= 480 + 10 + 10,
1184 .htotal
= 480 + 10 + 10 + 15,
1186 .vsync_start
= 800 + 3,
1187 .vsync_end
= 800 + 3 + 3,
1188 .vtotal
= 800 + 3 + 3 + 3,
1192 static const struct panel_desc ortustech_com43h4m85ulc
= {
1193 .modes
= &ortustech_com43h4m85ulc_mode
,
1200 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
1203 static const struct drm_display_mode qd43003c0_40_mode
= {
1206 .hsync_start
= 480 + 8,
1207 .hsync_end
= 480 + 8 + 4,
1208 .htotal
= 480 + 8 + 4 + 39,
1210 .vsync_start
= 272 + 4,
1211 .vsync_end
= 272 + 4 + 10,
1212 .vtotal
= 272 + 4 + 10 + 2,
1216 static const struct panel_desc qd43003c0_40
= {
1217 .modes
= &qd43003c0_40_mode
,
1224 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
1227 static const struct drm_display_mode samsung_ltn101nt05_mode
= {
1230 .hsync_start
= 1024 + 24,
1231 .hsync_end
= 1024 + 24 + 136,
1232 .htotal
= 1024 + 24 + 136 + 160,
1234 .vsync_start
= 600 + 3,
1235 .vsync_end
= 600 + 3 + 6,
1236 .vtotal
= 600 + 3 + 6 + 61,
1240 static const struct panel_desc samsung_ltn101nt05
= {
1241 .modes
= &samsung_ltn101nt05_mode
,
1250 static const struct drm_display_mode samsung_ltn140at29_301_mode
= {
1253 .hsync_start
= 1366 + 64,
1254 .hsync_end
= 1366 + 64 + 48,
1255 .htotal
= 1366 + 64 + 48 + 128,
1257 .vsync_start
= 768 + 2,
1258 .vsync_end
= 768 + 2 + 5,
1259 .vtotal
= 768 + 2 + 5 + 17,
1263 static const struct panel_desc samsung_ltn140at29_301
= {
1264 .modes
= &samsung_ltn140at29_301_mode
,
1273 static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode
= {
1276 .hsync_start
= 800 + 1,
1277 .hsync_end
= 800 + 1 + 64,
1278 .htotal
= 800 + 1 + 64 + 64,
1280 .vsync_start
= 480 + 1,
1281 .vsync_end
= 480 + 1 + 23,
1282 .vtotal
= 480 + 1 + 23 + 22,
1286 static const struct panel_desc shelly_sca07010_bfn_lnn
= {
1287 .modes
= &shelly_sca07010_bfn_lnn_mode
,
1293 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
1296 static const struct drm_display_mode tpk_f07a_0102_mode
= {
1299 .hsync_start
= 800 + 40,
1300 .hsync_end
= 800 + 40 + 128,
1301 .htotal
= 800 + 40 + 128 + 88,
1303 .vsync_start
= 480 + 10,
1304 .vsync_end
= 480 + 10 + 2,
1305 .vtotal
= 480 + 10 + 2 + 33,
1309 static const struct panel_desc tpk_f07a_0102
= {
1310 .modes
= &tpk_f07a_0102_mode
,
1316 .bus_flags
= DRM_BUS_FLAG_PIXDATA_POSEDGE
,
1319 static const struct drm_display_mode tpk_f10a_0102_mode
= {
1322 .hsync_start
= 1024 + 176,
1323 .hsync_end
= 1024 + 176 + 5,
1324 .htotal
= 1024 + 176 + 5 + 88,
1326 .vsync_start
= 600 + 20,
1327 .vsync_end
= 600 + 20 + 5,
1328 .vtotal
= 600 + 20 + 5 + 25,
1332 static const struct panel_desc tpk_f10a_0102
= {
1333 .modes
= &tpk_f10a_0102_mode
,
1341 static const struct display_timing urt_umsh_8596md_timing
= {
1342 .pixelclock
= { 33260000, 33260000, 33260000 },
1343 .hactive
= { 800, 800, 800 },
1344 .hfront_porch
= { 41, 41, 41 },
1345 .hback_porch
= { 216 - 128, 216 - 128, 216 - 128 },
1346 .hsync_len
= { 71, 128, 128 },
1347 .vactive
= { 480, 480, 480 },
1348 .vfront_porch
= { 10, 10, 10 },
1349 .vback_porch
= { 35 - 2, 35 - 2, 35 - 2 },
1350 .vsync_len
= { 2, 2, 2 },
1351 .flags
= DISPLAY_FLAGS_DE_HIGH
| DISPLAY_FLAGS_PIXDATA_NEGEDGE
|
1352 DISPLAY_FLAGS_HSYNC_LOW
| DISPLAY_FLAGS_VSYNC_LOW
,
1355 static const struct panel_desc urt_umsh_8596md_lvds
= {
1356 .timings
= &urt_umsh_8596md_timing
,
1363 .bus_format
= MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
,
1366 static const struct panel_desc urt_umsh_8596md_parallel
= {
1367 .timings
= &urt_umsh_8596md_timing
,
1374 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
1377 static const struct of_device_id platform_of_match
[] = {
1379 .compatible
= "ampire,am800480r3tmqwa1h",
1380 .data
= &ire_am800480r3tmqwa1h
,
1382 .compatible
= "auo,b101aw03",
1383 .data
= &auo_b101aw03
,
1385 .compatible
= "auo,b101ean01",
1386 .data
= &auo_b101ean01
,
1388 .compatible
= "auo,b101xtn01",
1389 .data
= &auo_b101xtn01
,
1391 .compatible
= "auo,b116xw03",
1392 .data
= &auo_b116xw03
,
1394 .compatible
= "auo,b133htn01",
1395 .data
= &auo_b133htn01
,
1397 .compatible
= "auo,b133xtn01",
1398 .data
= &auo_b133xtn01
,
1400 .compatible
= "avic,tm070ddh03",
1401 .data
= &avic_tm070ddh03
,
1403 .compatible
= "chunghwa,claa101wa01a",
1404 .data
= &chunghwa_claa101wa01a
1406 .compatible
= "chunghwa,claa101wb01",
1407 .data
= &chunghwa_claa101wb01
1409 .compatible
= "edt,et057090dhu",
1410 .data
= &edt_et057090dhu
,
1412 .compatible
= "edt,et070080dh6",
1413 .data
= &edt_etm0700g0dh6
,
1415 .compatible
= "edt,etm0700g0dh6",
1416 .data
= &edt_etm0700g0dh6
,
1418 .compatible
= "foxlink,fl500wvr00-a0t",
1419 .data
= &foxlink_fl500wvr00_a0t
,
1421 .compatible
= "giantplus,gpg482739qs5",
1422 .data
= &giantplus_gpg482739qs5
1424 .compatible
= "hannstar,hsd070pww1",
1425 .data
= &hannstar_hsd070pww1
,
1427 .compatible
= "hannstar,hsd100pxn1",
1428 .data
= &hannstar_hsd100pxn1
,
1430 .compatible
= "hit,tx23d38vm0caa",
1431 .data
= &hitachi_tx23d38vm0caa
1433 .compatible
= "innolux,at043tn24",
1434 .data
= &innolux_at043tn24
,
1436 .compatible
= "innolux,at070tn92",
1437 .data
= &innolux_at070tn92
,
1439 .compatible
="innolux,g121i1-l01",
1440 .data
= &innolux_g121i1_l01
1442 .compatible
= "innolux,g121x1-l03",
1443 .data
= &innolux_g121x1_l03
,
1445 .compatible
= "innolux,n116bge",
1446 .data
= &innolux_n116bge
,
1448 .compatible
= "innolux,n156bge-l21",
1449 .data
= &innolux_n156bge_l21
,
1451 .compatible
= "innolux,zj070na-01p",
1452 .data
= &innolux_zj070na_01p
,
1454 .compatible
= "kyo,tcg121xglp",
1455 .data
= &kyo_tcg121xglp
,
1457 .compatible
= "lg,lb070wv8",
1458 .data
= &lg_lb070wv8
,
1460 .compatible
= "lg,lp120up1",
1461 .data
= &lg_lp120up1
,
1463 .compatible
= "lg,lp129qe",
1464 .data
= &lg_lp129qe
,
1466 .compatible
= "nec,nl4827hc19-05b",
1467 .data
= &nec_nl4827hc19_05b
,
1469 .compatible
= "okaya,rs800480t-7x0gp",
1470 .data
= &okaya_rs800480t_7x0gp
,
1472 .compatible
= "olimex,lcd-olinuxino-43-ts",
1473 .data
= &olimex_lcd_olinuxino_43ts
,
1475 .compatible
= "ontat,yx700wv03",
1476 .data
= &ontat_yx700wv03
,
1478 .compatible
= "ortustech,com43h4m85ulc",
1479 .data
= &ortustech_com43h4m85ulc
,
1481 .compatible
= "qiaodian,qd43003c0-40",
1482 .data
= &qd43003c0_40
,
1484 .compatible
= "samsung,ltn101nt05",
1485 .data
= &samsung_ltn101nt05
,
1487 .compatible
= "samsung,ltn140at29-301",
1488 .data
= &samsung_ltn140at29_301
,
1490 .compatible
= "shelly,sca07010-bfn-lnn",
1491 .data
= &shelly_sca07010_bfn_lnn
,
1493 .compatible
= "tpk,f07a-0102",
1494 .data
= &tpk_f07a_0102
,
1496 .compatible
= "tpk,f10a-0102",
1497 .data
= &tpk_f10a_0102
,
1499 .compatible
= "urt,umsh-8596md-t",
1500 .data
= &urt_umsh_8596md_parallel
,
1502 .compatible
= "urt,umsh-8596md-1t",
1503 .data
= &urt_umsh_8596md_parallel
,
1505 .compatible
= "urt,umsh-8596md-7t",
1506 .data
= &urt_umsh_8596md_parallel
,
1508 .compatible
= "urt,umsh-8596md-11t",
1509 .data
= &urt_umsh_8596md_lvds
,
1511 .compatible
= "urt,umsh-8596md-19t",
1512 .data
= &urt_umsh_8596md_lvds
,
1514 .compatible
= "urt,umsh-8596md-20t",
1515 .data
= &urt_umsh_8596md_parallel
,
1520 MODULE_DEVICE_TABLE(of
, platform_of_match
);
1522 static int panel_simple_platform_probe(struct platform_device
*pdev
)
1524 const struct of_device_id
*id
;
1526 id
= of_match_node(platform_of_match
, pdev
->dev
.of_node
);
1530 return panel_simple_probe(&pdev
->dev
, id
->data
);
1533 static int panel_simple_platform_remove(struct platform_device
*pdev
)
1535 return panel_simple_remove(&pdev
->dev
);
1538 static void panel_simple_platform_shutdown(struct platform_device
*pdev
)
1540 panel_simple_shutdown(&pdev
->dev
);
1543 static struct platform_driver panel_simple_platform_driver
= {
1545 .name
= "panel-simple",
1546 .of_match_table
= platform_of_match
,
1548 .probe
= panel_simple_platform_probe
,
1549 .remove
= panel_simple_platform_remove
,
1550 .shutdown
= panel_simple_platform_shutdown
,
1553 struct panel_desc_dsi
{
1554 struct panel_desc desc
;
1556 unsigned long flags
;
1557 enum mipi_dsi_pixel_format format
;
1561 static const struct drm_display_mode auo_b080uan01_mode
= {
1564 .hsync_start
= 1200 + 62,
1565 .hsync_end
= 1200 + 62 + 4,
1566 .htotal
= 1200 + 62 + 4 + 62,
1568 .vsync_start
= 1920 + 9,
1569 .vsync_end
= 1920 + 9 + 2,
1570 .vtotal
= 1920 + 9 + 2 + 8,
1574 static const struct panel_desc_dsi auo_b080uan01
= {
1576 .modes
= &auo_b080uan01_mode
,
1584 .flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_CLOCK_NON_CONTINUOUS
,
1585 .format
= MIPI_DSI_FMT_RGB888
,
1589 static const struct drm_display_mode boe_tv080wum_nl0_mode
= {
1592 .hsync_start
= 1200 + 120,
1593 .hsync_end
= 1200 + 120 + 20,
1594 .htotal
= 1200 + 120 + 20 + 21,
1596 .vsync_start
= 1920 + 21,
1597 .vsync_end
= 1920 + 21 + 3,
1598 .vtotal
= 1920 + 21 + 3 + 18,
1600 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
1603 static const struct panel_desc_dsi boe_tv080wum_nl0
= {
1605 .modes
= &boe_tv080wum_nl0_mode
,
1612 .flags
= MIPI_DSI_MODE_VIDEO
|
1613 MIPI_DSI_MODE_VIDEO_BURST
|
1614 MIPI_DSI_MODE_VIDEO_SYNC_PULSE
,
1615 .format
= MIPI_DSI_FMT_RGB888
,
1619 static const struct drm_display_mode lg_ld070wx3_sl01_mode
= {
1622 .hsync_start
= 800 + 32,
1623 .hsync_end
= 800 + 32 + 1,
1624 .htotal
= 800 + 32 + 1 + 57,
1626 .vsync_start
= 1280 + 28,
1627 .vsync_end
= 1280 + 28 + 1,
1628 .vtotal
= 1280 + 28 + 1 + 14,
1632 static const struct panel_desc_dsi lg_ld070wx3_sl01
= {
1634 .modes
= &lg_ld070wx3_sl01_mode
,
1642 .flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_CLOCK_NON_CONTINUOUS
,
1643 .format
= MIPI_DSI_FMT_RGB888
,
1647 static const struct drm_display_mode lg_lh500wx1_sd03_mode
= {
1650 .hsync_start
= 720 + 12,
1651 .hsync_end
= 720 + 12 + 4,
1652 .htotal
= 720 + 12 + 4 + 112,
1654 .vsync_start
= 1280 + 8,
1655 .vsync_end
= 1280 + 8 + 4,
1656 .vtotal
= 1280 + 8 + 4 + 12,
1660 static const struct panel_desc_dsi lg_lh500wx1_sd03
= {
1662 .modes
= &lg_lh500wx1_sd03_mode
,
1670 .flags
= MIPI_DSI_MODE_VIDEO
,
1671 .format
= MIPI_DSI_FMT_RGB888
,
1675 static const struct drm_display_mode panasonic_vvx10f004b00_mode
= {
1678 .hsync_start
= 1920 + 154,
1679 .hsync_end
= 1920 + 154 + 16,
1680 .htotal
= 1920 + 154 + 16 + 32,
1682 .vsync_start
= 1200 + 17,
1683 .vsync_end
= 1200 + 17 + 2,
1684 .vtotal
= 1200 + 17 + 2 + 16,
1688 static const struct panel_desc_dsi panasonic_vvx10f004b00
= {
1690 .modes
= &panasonic_vvx10f004b00_mode
,
1698 .flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_MODE_VIDEO_SYNC_PULSE
|
1699 MIPI_DSI_CLOCK_NON_CONTINUOUS
,
1700 .format
= MIPI_DSI_FMT_RGB888
,
1705 static const struct of_device_id dsi_of_match
[] = {
1707 .compatible
= "auo,b080uan01",
1708 .data
= &auo_b080uan01
1710 .compatible
= "boe,tv080wum-nl0",
1711 .data
= &boe_tv080wum_nl0
1713 .compatible
= "lg,ld070wx3-sl01",
1714 .data
= &lg_ld070wx3_sl01
1716 .compatible
= "lg,lh500wx1-sd03",
1717 .data
= &lg_lh500wx1_sd03
1719 .compatible
= "panasonic,vvx10f004b00",
1720 .data
= &panasonic_vvx10f004b00
1725 MODULE_DEVICE_TABLE(of
, dsi_of_match
);
1727 static int panel_simple_dsi_probe(struct mipi_dsi_device
*dsi
)
1729 const struct panel_desc_dsi
*desc
;
1730 const struct of_device_id
*id
;
1733 id
= of_match_node(dsi_of_match
, dsi
->dev
.of_node
);
1739 err
= panel_simple_probe(&dsi
->dev
, &desc
->desc
);
1743 dsi
->mode_flags
= desc
->flags
;
1744 dsi
->format
= desc
->format
;
1745 dsi
->lanes
= desc
->lanes
;
1747 return mipi_dsi_attach(dsi
);
1750 static int panel_simple_dsi_remove(struct mipi_dsi_device
*dsi
)
1754 err
= mipi_dsi_detach(dsi
);
1756 dev_err(&dsi
->dev
, "failed to detach from DSI host: %d\n", err
);
1758 return panel_simple_remove(&dsi
->dev
);
1761 static void panel_simple_dsi_shutdown(struct mipi_dsi_device
*dsi
)
1763 panel_simple_shutdown(&dsi
->dev
);
1766 static struct mipi_dsi_driver panel_simple_dsi_driver
= {
1768 .name
= "panel-simple-dsi",
1769 .of_match_table
= dsi_of_match
,
1771 .probe
= panel_simple_dsi_probe
,
1772 .remove
= panel_simple_dsi_remove
,
1773 .shutdown
= panel_simple_dsi_shutdown
,
1776 static int __init
panel_simple_init(void)
1780 err
= platform_driver_register(&panel_simple_platform_driver
);
1784 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI
)) {
1785 err
= mipi_dsi_driver_register(&panel_simple_dsi_driver
);
1792 module_init(panel_simple_init
);
1794 static void __exit
panel_simple_exit(void)
1796 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI
))
1797 mipi_dsi_driver_unregister(&panel_simple_dsi_driver
);
1799 platform_driver_unregister(&panel_simple_platform_driver
);
1801 module_exit(panel_simple_exit
);
1803 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1804 MODULE_DESCRIPTION("DRM Driver for Simple Panels");
1805 MODULE_LICENSE("GPL and additional rights");