2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #include <linux/backlight.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/module.h>
27 #include <linux/of_platform.h>
28 #include <linux/platform_device.h>
29 #include <linux/regulator/consumer.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_mipi_dsi.h>
34 #include <drm/drm_panel.h>
36 #include <video/display_timing.h>
37 #include <video/videomode.h>
40 const struct drm_display_mode
*modes
;
41 unsigned int num_modes
;
42 const struct display_timing
*timings
;
43 unsigned int num_timings
;
48 * @width: width (in millimeters) of the panel's active display area
49 * @height: height (in millimeters) of the panel's active display area
57 * @prepare: the time (in milliseconds) that it takes for the panel to
58 * become ready and start receiving video data
59 * @enable: the time (in milliseconds) that it takes for the panel to
60 * display the first valid frame after starting to receive
62 * @disable: the time (in milliseconds) that it takes for the panel to
63 * turn the display off (no content is visible)
64 * @unprepare: the time (in milliseconds) that it takes for the panel
65 * to power itself down completely
71 unsigned int unprepare
;
78 struct drm_panel base
;
82 const struct panel_desc
*desc
;
84 struct backlight_device
*backlight
;
85 struct regulator
*supply
;
86 struct i2c_adapter
*ddc
;
88 struct gpio_desc
*enable_gpio
;
91 static inline struct panel_simple
*to_panel_simple(struct drm_panel
*panel
)
93 return container_of(panel
, struct panel_simple
, base
);
96 static int panel_simple_get_fixed_modes(struct panel_simple
*panel
)
98 struct drm_connector
*connector
= panel
->base
.connector
;
99 struct drm_device
*drm
= panel
->base
.drm
;
100 struct drm_display_mode
*mode
;
101 unsigned int i
, num
= 0;
106 for (i
= 0; i
< panel
->desc
->num_timings
; i
++) {
107 const struct display_timing
*dt
= &panel
->desc
->timings
[i
];
110 videomode_from_timing(dt
, &vm
);
111 mode
= drm_mode_create(drm
);
113 dev_err(drm
->dev
, "failed to add mode %ux%u\n",
114 dt
->hactive
.typ
, dt
->vactive
.typ
);
118 drm_display_mode_from_videomode(&vm
, mode
);
119 drm_mode_set_name(mode
);
121 drm_mode_probed_add(connector
, mode
);
125 for (i
= 0; i
< panel
->desc
->num_modes
; i
++) {
126 const struct drm_display_mode
*m
= &panel
->desc
->modes
[i
];
128 mode
= drm_mode_duplicate(drm
, m
);
130 dev_err(drm
->dev
, "failed to add mode %ux%u@%u\n",
131 m
->hdisplay
, m
->vdisplay
, m
->vrefresh
);
135 drm_mode_set_name(mode
);
137 drm_mode_probed_add(connector
, mode
);
141 connector
->display_info
.bpc
= panel
->desc
->bpc
;
142 connector
->display_info
.width_mm
= panel
->desc
->size
.width
;
143 connector
->display_info
.height_mm
= panel
->desc
->size
.height
;
144 if (panel
->desc
->bus_format
)
145 drm_display_info_set_bus_formats(&connector
->display_info
,
146 &panel
->desc
->bus_format
, 1);
151 static int panel_simple_disable(struct drm_panel
*panel
)
153 struct panel_simple
*p
= to_panel_simple(panel
);
159 p
->backlight
->props
.power
= FB_BLANK_POWERDOWN
;
160 backlight_update_status(p
->backlight
);
163 if (p
->desc
->delay
.disable
)
164 msleep(p
->desc
->delay
.disable
);
171 static int panel_simple_unprepare(struct drm_panel
*panel
)
173 struct panel_simple
*p
= to_panel_simple(panel
);
179 gpiod_set_value_cansleep(p
->enable_gpio
, 0);
181 regulator_disable(p
->supply
);
183 if (p
->desc
->delay
.unprepare
)
184 msleep(p
->desc
->delay
.unprepare
);
191 static int panel_simple_prepare(struct drm_panel
*panel
)
193 struct panel_simple
*p
= to_panel_simple(panel
);
199 err
= regulator_enable(p
->supply
);
201 dev_err(panel
->dev
, "failed to enable supply: %d\n", err
);
206 gpiod_set_value_cansleep(p
->enable_gpio
, 1);
208 if (p
->desc
->delay
.prepare
)
209 msleep(p
->desc
->delay
.prepare
);
216 static int panel_simple_enable(struct drm_panel
*panel
)
218 struct panel_simple
*p
= to_panel_simple(panel
);
223 if (p
->desc
->delay
.enable
)
224 msleep(p
->desc
->delay
.enable
);
227 p
->backlight
->props
.power
= FB_BLANK_UNBLANK
;
228 backlight_update_status(p
->backlight
);
236 static int panel_simple_get_modes(struct drm_panel
*panel
)
238 struct panel_simple
*p
= to_panel_simple(panel
);
241 /* probe EDID if a DDC bus is available */
243 struct edid
*edid
= drm_get_edid(panel
->connector
, p
->ddc
);
244 drm_mode_connector_update_edid_property(panel
->connector
, edid
);
246 num
+= drm_add_edid_modes(panel
->connector
, edid
);
251 /* add hard-coded panel modes */
252 num
+= panel_simple_get_fixed_modes(p
);
257 static int panel_simple_get_timings(struct drm_panel
*panel
,
258 unsigned int num_timings
,
259 struct display_timing
*timings
)
261 struct panel_simple
*p
= to_panel_simple(panel
);
264 if (p
->desc
->num_timings
< num_timings
)
265 num_timings
= p
->desc
->num_timings
;
268 for (i
= 0; i
< num_timings
; i
++)
269 timings
[i
] = p
->desc
->timings
[i
];
271 return p
->desc
->num_timings
;
274 static const struct drm_panel_funcs panel_simple_funcs
= {
275 .disable
= panel_simple_disable
,
276 .unprepare
= panel_simple_unprepare
,
277 .prepare
= panel_simple_prepare
,
278 .enable
= panel_simple_enable
,
279 .get_modes
= panel_simple_get_modes
,
280 .get_timings
= panel_simple_get_timings
,
283 static int panel_simple_probe(struct device
*dev
, const struct panel_desc
*desc
)
285 struct device_node
*backlight
, *ddc
;
286 struct panel_simple
*panel
;
289 panel
= devm_kzalloc(dev
, sizeof(*panel
), GFP_KERNEL
);
293 panel
->enabled
= false;
294 panel
->prepared
= false;
297 panel
->supply
= devm_regulator_get(dev
, "power");
298 if (IS_ERR(panel
->supply
))
299 return PTR_ERR(panel
->supply
);
301 panel
->enable_gpio
= devm_gpiod_get_optional(dev
, "enable",
303 if (IS_ERR(panel
->enable_gpio
)) {
304 err
= PTR_ERR(panel
->enable_gpio
);
305 dev_err(dev
, "failed to request GPIO: %d\n", err
);
309 backlight
= of_parse_phandle(dev
->of_node
, "backlight", 0);
311 panel
->backlight
= of_find_backlight_by_node(backlight
);
312 of_node_put(backlight
);
314 if (!panel
->backlight
)
315 return -EPROBE_DEFER
;
318 ddc
= of_parse_phandle(dev
->of_node
, "ddc-i2c-bus", 0);
320 panel
->ddc
= of_find_i2c_adapter_by_node(ddc
);
329 drm_panel_init(&panel
->base
);
330 panel
->base
.dev
= dev
;
331 panel
->base
.funcs
= &panel_simple_funcs
;
333 err
= drm_panel_add(&panel
->base
);
337 dev_set_drvdata(dev
, panel
);
343 put_device(&panel
->ddc
->dev
);
345 if (panel
->backlight
)
346 put_device(&panel
->backlight
->dev
);
351 static int panel_simple_remove(struct device
*dev
)
353 struct panel_simple
*panel
= dev_get_drvdata(dev
);
355 drm_panel_detach(&panel
->base
);
356 drm_panel_remove(&panel
->base
);
358 panel_simple_disable(&panel
->base
);
361 put_device(&panel
->ddc
->dev
);
363 if (panel
->backlight
)
364 put_device(&panel
->backlight
->dev
);
369 static void panel_simple_shutdown(struct device
*dev
)
371 struct panel_simple
*panel
= dev_get_drvdata(dev
);
373 panel_simple_disable(&panel
->base
);
376 static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode
= {
379 .hsync_start
= 800 + 0,
380 .hsync_end
= 800 + 0 + 255,
381 .htotal
= 800 + 0 + 255 + 0,
383 .vsync_start
= 480 + 2,
384 .vsync_end
= 480 + 2 + 45,
385 .vtotal
= 480 + 2 + 45 + 0,
387 .flags
= DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
,
390 static const struct panel_desc ampire_am800480r3tmqwa1h
= {
391 .modes
= &ire_am800480r3tmqwa1h_mode
,
398 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
401 static const struct drm_display_mode auo_b101aw03_mode
= {
404 .hsync_start
= 1024 + 156,
405 .hsync_end
= 1024 + 156 + 8,
406 .htotal
= 1024 + 156 + 8 + 156,
408 .vsync_start
= 600 + 16,
409 .vsync_end
= 600 + 16 + 6,
410 .vtotal
= 600 + 16 + 6 + 16,
414 static const struct panel_desc auo_b101aw03
= {
415 .modes
= &auo_b101aw03_mode
,
424 static const struct drm_display_mode auo_b101ean01_mode
= {
427 .hsync_start
= 1280 + 119,
428 .hsync_end
= 1280 + 119 + 32,
429 .htotal
= 1280 + 119 + 32 + 21,
431 .vsync_start
= 800 + 4,
432 .vsync_end
= 800 + 4 + 20,
433 .vtotal
= 800 + 4 + 20 + 8,
437 static const struct panel_desc auo_b101ean01
= {
438 .modes
= &auo_b101ean01_mode
,
447 static const struct drm_display_mode auo_b101xtn01_mode
= {
450 .hsync_start
= 1366 + 20,
451 .hsync_end
= 1366 + 20 + 70,
452 .htotal
= 1366 + 20 + 70,
454 .vsync_start
= 768 + 14,
455 .vsync_end
= 768 + 14 + 42,
456 .vtotal
= 768 + 14 + 42,
458 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
461 static const struct panel_desc auo_b101xtn01
= {
462 .modes
= &auo_b101xtn01_mode
,
471 static const struct drm_display_mode auo_b116xw03_mode
= {
474 .hsync_start
= 1366 + 40,
475 .hsync_end
= 1366 + 40 + 40,
476 .htotal
= 1366 + 40 + 40 + 32,
478 .vsync_start
= 768 + 10,
479 .vsync_end
= 768 + 10 + 12,
480 .vtotal
= 768 + 10 + 12 + 6,
484 static const struct panel_desc auo_b116xw03
= {
485 .modes
= &auo_b116xw03_mode
,
494 static const struct drm_display_mode auo_b133xtn01_mode
= {
497 .hsync_start
= 1366 + 48,
498 .hsync_end
= 1366 + 48 + 32,
499 .htotal
= 1366 + 48 + 32 + 20,
501 .vsync_start
= 768 + 3,
502 .vsync_end
= 768 + 3 + 6,
503 .vtotal
= 768 + 3 + 6 + 13,
507 static const struct panel_desc auo_b133xtn01
= {
508 .modes
= &auo_b133xtn01_mode
,
517 static const struct drm_display_mode auo_b133htn01_mode
= {
520 .hsync_start
= 1920 + 172,
521 .hsync_end
= 1920 + 172 + 80,
522 .htotal
= 1920 + 172 + 80 + 60,
524 .vsync_start
= 1080 + 25,
525 .vsync_end
= 1080 + 25 + 10,
526 .vtotal
= 1080 + 25 + 10 + 10,
530 static const struct panel_desc auo_b133htn01
= {
531 .modes
= &auo_b133htn01_mode
,
545 static const struct drm_display_mode avic_tm070ddh03_mode
= {
548 .hsync_start
= 1024 + 160,
549 .hsync_end
= 1024 + 160 + 4,
550 .htotal
= 1024 + 160 + 4 + 156,
552 .vsync_start
= 600 + 17,
553 .vsync_end
= 600 + 17 + 1,
554 .vtotal
= 600 + 17 + 1 + 17,
558 static const struct panel_desc avic_tm070ddh03
= {
559 .modes
= &avic_tm070ddh03_mode
,
573 static const struct drm_display_mode chunghwa_claa101wa01a_mode
= {
576 .hsync_start
= 1366 + 58,
577 .hsync_end
= 1366 + 58 + 58,
578 .htotal
= 1366 + 58 + 58 + 58,
580 .vsync_start
= 768 + 4,
581 .vsync_end
= 768 + 4 + 4,
582 .vtotal
= 768 + 4 + 4 + 4,
586 static const struct panel_desc chunghwa_claa101wa01a
= {
587 .modes
= &chunghwa_claa101wa01a_mode
,
596 static const struct drm_display_mode chunghwa_claa101wb01_mode
= {
599 .hsync_start
= 1366 + 48,
600 .hsync_end
= 1366 + 48 + 32,
601 .htotal
= 1366 + 48 + 32 + 20,
603 .vsync_start
= 768 + 16,
604 .vsync_end
= 768 + 16 + 8,
605 .vtotal
= 768 + 16 + 8 + 16,
609 static const struct panel_desc chunghwa_claa101wb01
= {
610 .modes
= &chunghwa_claa101wb01_mode
,
619 static const struct drm_display_mode edt_et057090dhu_mode
= {
622 .hsync_start
= 640 + 16,
623 .hsync_end
= 640 + 16 + 30,
624 .htotal
= 640 + 16 + 30 + 114,
626 .vsync_start
= 480 + 10,
627 .vsync_end
= 480 + 10 + 3,
628 .vtotal
= 480 + 10 + 3 + 32,
630 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
633 static const struct panel_desc edt_et057090dhu
= {
634 .modes
= &edt_et057090dhu_mode
,
643 static const struct drm_display_mode edt_etm0700g0dh6_mode
= {
646 .hsync_start
= 800 + 40,
647 .hsync_end
= 800 + 40 + 128,
648 .htotal
= 800 + 40 + 128 + 88,
650 .vsync_start
= 480 + 10,
651 .vsync_end
= 480 + 10 + 2,
652 .vtotal
= 480 + 10 + 2 + 33,
654 .flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
,
657 static const struct panel_desc edt_etm0700g0dh6
= {
658 .modes
= &edt_etm0700g0dh6_mode
,
667 static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode
= {
670 .hsync_start
= 800 + 168,
671 .hsync_end
= 800 + 168 + 64,
672 .htotal
= 800 + 168 + 64 + 88,
674 .vsync_start
= 480 + 37,
675 .vsync_end
= 480 + 37 + 2,
676 .vtotal
= 480 + 37 + 2 + 8,
680 static const struct panel_desc foxlink_fl500wvr00_a0t
= {
681 .modes
= &foxlink_fl500wvr00_a0t_mode
,
688 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
691 static const struct drm_display_mode giantplus_gpg482739qs5_mode
= {
694 .hsync_start
= 480 + 5,
695 .hsync_end
= 480 + 5 + 1,
696 .htotal
= 480 + 5 + 1 + 40,
698 .vsync_start
= 272 + 8,
699 .vsync_end
= 272 + 8 + 1,
700 .vtotal
= 272 + 8 + 1 + 8,
704 static const struct panel_desc giantplus_gpg482739qs5
= {
705 .modes
= &giantplus_gpg482739qs5_mode
,
712 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
715 static const struct display_timing hannstar_hsd070pww1_timing
= {
716 .pixelclock
= { 64300000, 71100000, 82000000 },
717 .hactive
= { 1280, 1280, 1280 },
718 .hfront_porch
= { 1, 1, 10 },
719 .hback_porch
= { 1, 1, 10 },
721 * According to the data sheet, the minimum horizontal blanking interval
722 * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
723 * minimum working horizontal blanking interval to be 60 clocks.
725 .hsync_len
= { 58, 158, 661 },
726 .vactive
= { 800, 800, 800 },
727 .vfront_porch
= { 1, 1, 10 },
728 .vback_porch
= { 1, 1, 10 },
729 .vsync_len
= { 1, 21, 203 },
730 .flags
= DISPLAY_FLAGS_DE_HIGH
,
733 static const struct panel_desc hannstar_hsd070pww1
= {
734 .timings
= &hannstar_hsd070pww1_timing
,
741 .bus_format
= MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
,
744 static const struct display_timing hannstar_hsd100pxn1_timing
= {
745 .pixelclock
= { 55000000, 65000000, 75000000 },
746 .hactive
= { 1024, 1024, 1024 },
747 .hfront_porch
= { 40, 40, 40 },
748 .hback_porch
= { 220, 220, 220 },
749 .hsync_len
= { 20, 60, 100 },
750 .vactive
= { 768, 768, 768 },
751 .vfront_porch
= { 7, 7, 7 },
752 .vback_porch
= { 21, 21, 21 },
753 .vsync_len
= { 10, 10, 10 },
754 .flags
= DISPLAY_FLAGS_DE_HIGH
,
757 static const struct panel_desc hannstar_hsd100pxn1
= {
758 .timings
= &hannstar_hsd100pxn1_timing
,
765 .bus_format
= MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
,
768 static const struct drm_display_mode hitachi_tx23d38vm0caa_mode
= {
771 .hsync_start
= 800 + 85,
772 .hsync_end
= 800 + 85 + 86,
773 .htotal
= 800 + 85 + 86 + 85,
775 .vsync_start
= 480 + 16,
776 .vsync_end
= 480 + 16 + 13,
777 .vtotal
= 480 + 16 + 13 + 16,
781 static const struct panel_desc hitachi_tx23d38vm0caa
= {
782 .modes
= &hitachi_tx23d38vm0caa_mode
,
791 static const struct drm_display_mode innolux_at043tn24_mode
= {
794 .hsync_start
= 480 + 2,
795 .hsync_end
= 480 + 2 + 41,
796 .htotal
= 480 + 2 + 41 + 2,
798 .vsync_start
= 272 + 2,
799 .vsync_end
= 272 + 2 + 11,
800 .vtotal
= 272 + 2 + 11 + 2,
802 .flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
,
805 static const struct panel_desc innolux_at043tn24
= {
806 .modes
= &innolux_at043tn24_mode
,
813 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
816 static const struct drm_display_mode innolux_g121i1_l01_mode
= {
819 .hsync_start
= 1280 + 64,
820 .hsync_end
= 1280 + 64 + 32,
821 .htotal
= 1280 + 64 + 32 + 64,
823 .vsync_start
= 800 + 9,
824 .vsync_end
= 800 + 9 + 6,
825 .vtotal
= 800 + 9 + 6 + 9,
829 static const struct panel_desc innolux_g121i1_l01
= {
830 .modes
= &innolux_g121i1_l01_mode
,
839 static const struct drm_display_mode innolux_g121x1_l03_mode
= {
842 .hsync_start
= 1024 + 0,
843 .hsync_end
= 1024 + 1,
844 .htotal
= 1024 + 0 + 1 + 320,
846 .vsync_start
= 768 + 38,
847 .vsync_end
= 768 + 38 + 1,
848 .vtotal
= 768 + 38 + 1 + 0,
852 static const struct panel_desc innolux_g121x1_l03
= {
853 .modes
= &innolux_g121x1_l03_mode
,
867 static const struct drm_display_mode innolux_n116bge_mode
= {
870 .hsync_start
= 1366 + 136,
871 .hsync_end
= 1366 + 136 + 30,
872 .htotal
= 1366 + 136 + 30 + 60,
874 .vsync_start
= 768 + 8,
875 .vsync_end
= 768 + 8 + 12,
876 .vtotal
= 768 + 8 + 12 + 12,
878 .flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
,
881 static const struct panel_desc innolux_n116bge
= {
882 .modes
= &innolux_n116bge_mode
,
891 static const struct drm_display_mode innolux_n156bge_l21_mode
= {
894 .hsync_start
= 1366 + 16,
895 .hsync_end
= 1366 + 16 + 34,
896 .htotal
= 1366 + 16 + 34 + 50,
898 .vsync_start
= 768 + 2,
899 .vsync_end
= 768 + 2 + 6,
900 .vtotal
= 768 + 2 + 6 + 12,
904 static const struct panel_desc innolux_n156bge_l21
= {
905 .modes
= &innolux_n156bge_l21_mode
,
914 static const struct drm_display_mode innolux_zj070na_01p_mode
= {
917 .hsync_start
= 1024 + 128,
918 .hsync_end
= 1024 + 128 + 64,
919 .htotal
= 1024 + 128 + 64 + 128,
921 .vsync_start
= 600 + 16,
922 .vsync_end
= 600 + 16 + 4,
923 .vtotal
= 600 + 16 + 4 + 16,
927 static const struct panel_desc innolux_zj070na_01p
= {
928 .modes
= &innolux_zj070na_01p_mode
,
937 static const struct display_timing kyo_tcg121xglp_timing
= {
938 .pixelclock
= { 52000000, 65000000, 71000000 },
939 .hactive
= { 1024, 1024, 1024 },
940 .hfront_porch
= { 2, 2, 2 },
941 .hback_porch
= { 2, 2, 2 },
942 .hsync_len
= { 86, 124, 244 },
943 .vactive
= { 768, 768, 768 },
944 .vfront_porch
= { 2, 2, 2 },
945 .vback_porch
= { 2, 2, 2 },
946 .vsync_len
= { 6, 34, 73 },
947 .flags
= DISPLAY_FLAGS_DE_HIGH
,
950 static const struct panel_desc kyo_tcg121xglp
= {
951 .timings
= &kyo_tcg121xglp_timing
,
958 .bus_format
= MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
,
961 static const struct drm_display_mode lg_lb070wv8_mode
= {
964 .hsync_start
= 800 + 88,
965 .hsync_end
= 800 + 88 + 80,
966 .htotal
= 800 + 88 + 80 + 88,
968 .vsync_start
= 480 + 10,
969 .vsync_end
= 480 + 10 + 25,
970 .vtotal
= 480 + 10 + 25 + 10,
974 static const struct panel_desc lg_lb070wv8
= {
975 .modes
= &lg_lb070wv8_mode
,
982 .bus_format
= MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
,
985 static const struct drm_display_mode lg_lp129qe_mode
= {
988 .hsync_start
= 2560 + 48,
989 .hsync_end
= 2560 + 48 + 32,
990 .htotal
= 2560 + 48 + 32 + 80,
992 .vsync_start
= 1700 + 3,
993 .vsync_end
= 1700 + 3 + 10,
994 .vtotal
= 1700 + 3 + 10 + 36,
998 static const struct panel_desc lg_lp129qe
= {
999 .modes
= &lg_lp129qe_mode
,
1008 static const struct drm_display_mode nec_nl4827hc19_05b_mode
= {
1011 .hsync_start
= 480 + 2,
1012 .hsync_end
= 480 + 2 + 41,
1013 .htotal
= 480 + 2 + 41 + 2,
1015 .vsync_start
= 272 + 2,
1016 .vsync_end
= 272 + 2 + 4,
1017 .vtotal
= 272 + 2 + 4 + 2,
1021 static const struct panel_desc nec_nl4827hc19_05b
= {
1022 .modes
= &nec_nl4827hc19_05b_mode
,
1029 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
1032 static const struct display_timing okaya_rs800480t_7x0gp_timing
= {
1033 .pixelclock
= { 30000000, 30000000, 40000000 },
1034 .hactive
= { 800, 800, 800 },
1035 .hfront_porch
= { 40, 40, 40 },
1036 .hback_porch
= { 40, 40, 40 },
1037 .hsync_len
= { 1, 48, 48 },
1038 .vactive
= { 480, 480, 480 },
1039 .vfront_porch
= { 13, 13, 13 },
1040 .vback_porch
= { 29, 29, 29 },
1041 .vsync_len
= { 3, 3, 3 },
1042 .flags
= DISPLAY_FLAGS_DE_HIGH
,
1045 static const struct panel_desc okaya_rs800480t_7x0gp
= {
1046 .timings
= &okaya_rs800480t_7x0gp_timing
,
1059 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
1062 static const struct drm_display_mode ortustech_com43h4m85ulc_mode
= {
1065 .hsync_start
= 480 + 10,
1066 .hsync_end
= 480 + 10 + 10,
1067 .htotal
= 480 + 10 + 10 + 15,
1069 .vsync_start
= 800 + 3,
1070 .vsync_end
= 800 + 3 + 3,
1071 .vtotal
= 800 + 3 + 3 + 3,
1075 static const struct panel_desc ortustech_com43h4m85ulc
= {
1076 .modes
= &ortustech_com43h4m85ulc_mode
,
1083 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
1086 static const struct drm_display_mode qd43003c0_40_mode
= {
1089 .hsync_start
= 480 + 8,
1090 .hsync_end
= 480 + 8 + 4,
1091 .htotal
= 480 + 8 + 4 + 39,
1093 .vsync_start
= 272 + 4,
1094 .vsync_end
= 272 + 4 + 10,
1095 .vtotal
= 272 + 4 + 10 + 2,
1099 static const struct panel_desc qd43003c0_40
= {
1100 .modes
= &qd43003c0_40_mode
,
1107 .bus_format
= MEDIA_BUS_FMT_RGB888_1X24
,
1110 static const struct drm_display_mode samsung_ltn101nt05_mode
= {
1113 .hsync_start
= 1024 + 24,
1114 .hsync_end
= 1024 + 24 + 136,
1115 .htotal
= 1024 + 24 + 136 + 160,
1117 .vsync_start
= 600 + 3,
1118 .vsync_end
= 600 + 3 + 6,
1119 .vtotal
= 600 + 3 + 6 + 61,
1123 static const struct panel_desc samsung_ltn101nt05
= {
1124 .modes
= &samsung_ltn101nt05_mode
,
1133 static const struct drm_display_mode samsung_ltn140at29_301_mode
= {
1136 .hsync_start
= 1366 + 64,
1137 .hsync_end
= 1366 + 64 + 48,
1138 .htotal
= 1366 + 64 + 48 + 128,
1140 .vsync_start
= 768 + 2,
1141 .vsync_end
= 768 + 2 + 5,
1142 .vtotal
= 768 + 2 + 5 + 17,
1146 static const struct panel_desc samsung_ltn140at29_301
= {
1147 .modes
= &samsung_ltn140at29_301_mode
,
1156 static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode
= {
1159 .hsync_start
= 800 + 1,
1160 .hsync_end
= 800 + 1 + 64,
1161 .htotal
= 800 + 1 + 64 + 64,
1163 .vsync_start
= 480 + 1,
1164 .vsync_end
= 480 + 1 + 23,
1165 .vtotal
= 480 + 1 + 23 + 22,
1169 static const struct panel_desc shelly_sca07010_bfn_lnn
= {
1170 .modes
= &shelly_sca07010_bfn_lnn_mode
,
1176 .bus_format
= MEDIA_BUS_FMT_RGB666_1X18
,
1179 static const struct of_device_id platform_of_match
[] = {
1181 .compatible
= "ampire,am800480r3tmqwa1h",
1182 .data
= &ire_am800480r3tmqwa1h
,
1184 .compatible
= "auo,b101aw03",
1185 .data
= &auo_b101aw03
,
1187 .compatible
= "auo,b101ean01",
1188 .data
= &auo_b101ean01
,
1190 .compatible
= "auo,b101xtn01",
1191 .data
= &auo_b101xtn01
,
1193 .compatible
= "auo,b116xw03",
1194 .data
= &auo_b116xw03
,
1196 .compatible
= "auo,b133htn01",
1197 .data
= &auo_b133htn01
,
1199 .compatible
= "auo,b133xtn01",
1200 .data
= &auo_b133xtn01
,
1202 .compatible
= "avic,tm070ddh03",
1203 .data
= &avic_tm070ddh03
,
1205 .compatible
= "chunghwa,claa101wa01a",
1206 .data
= &chunghwa_claa101wa01a
1208 .compatible
= "chunghwa,claa101wb01",
1209 .data
= &chunghwa_claa101wb01
1211 .compatible
= "edt,et057090dhu",
1212 .data
= &edt_et057090dhu
,
1214 .compatible
= "edt,et070080dh6",
1215 .data
= &edt_etm0700g0dh6
,
1217 .compatible
= "edt,etm0700g0dh6",
1218 .data
= &edt_etm0700g0dh6
,
1220 .compatible
= "foxlink,fl500wvr00-a0t",
1221 .data
= &foxlink_fl500wvr00_a0t
,
1223 .compatible
= "giantplus,gpg482739qs5",
1224 .data
= &giantplus_gpg482739qs5
1226 .compatible
= "hannstar,hsd070pww1",
1227 .data
= &hannstar_hsd070pww1
,
1229 .compatible
= "hannstar,hsd100pxn1",
1230 .data
= &hannstar_hsd100pxn1
,
1232 .compatible
= "hit,tx23d38vm0caa",
1233 .data
= &hitachi_tx23d38vm0caa
1235 .compatible
= "innolux,at043tn24",
1236 .data
= &innolux_at043tn24
,
1238 .compatible
="innolux,g121i1-l01",
1239 .data
= &innolux_g121i1_l01
1241 .compatible
= "innolux,g121x1-l03",
1242 .data
= &innolux_g121x1_l03
,
1244 .compatible
= "innolux,n116bge",
1245 .data
= &innolux_n116bge
,
1247 .compatible
= "innolux,n156bge-l21",
1248 .data
= &innolux_n156bge_l21
,
1250 .compatible
= "innolux,zj070na-01p",
1251 .data
= &innolux_zj070na_01p
,
1253 .compatible
= "kyo,tcg121xglp",
1254 .data
= &kyo_tcg121xglp
,
1256 .compatible
= "lg,lb070wv8",
1257 .data
= &lg_lb070wv8
,
1259 .compatible
= "lg,lp129qe",
1260 .data
= &lg_lp129qe
,
1262 .compatible
= "nec,nl4827hc19-05b",
1263 .data
= &nec_nl4827hc19_05b
,
1265 .compatible
= "okaya,rs800480t-7x0gp",
1266 .data
= &okaya_rs800480t_7x0gp
,
1268 .compatible
= "ortustech,com43h4m85ulc",
1269 .data
= &ortustech_com43h4m85ulc
,
1271 .compatible
= "qiaodian,qd43003c0-40",
1272 .data
= &qd43003c0_40
,
1274 .compatible
= "samsung,ltn101nt05",
1275 .data
= &samsung_ltn101nt05
,
1277 .compatible
= "samsung,ltn140at29-301",
1278 .data
= &samsung_ltn140at29_301
,
1280 .compatible
= "shelly,sca07010-bfn-lnn",
1281 .data
= &shelly_sca07010_bfn_lnn
,
1286 MODULE_DEVICE_TABLE(of
, platform_of_match
);
1288 static int panel_simple_platform_probe(struct platform_device
*pdev
)
1290 const struct of_device_id
*id
;
1292 id
= of_match_node(platform_of_match
, pdev
->dev
.of_node
);
1296 return panel_simple_probe(&pdev
->dev
, id
->data
);
1299 static int panel_simple_platform_remove(struct platform_device
*pdev
)
1301 return panel_simple_remove(&pdev
->dev
);
1304 static void panel_simple_platform_shutdown(struct platform_device
*pdev
)
1306 panel_simple_shutdown(&pdev
->dev
);
1309 static struct platform_driver panel_simple_platform_driver
= {
1311 .name
= "panel-simple",
1312 .of_match_table
= platform_of_match
,
1314 .probe
= panel_simple_platform_probe
,
1315 .remove
= panel_simple_platform_remove
,
1316 .shutdown
= panel_simple_platform_shutdown
,
1319 struct panel_desc_dsi
{
1320 struct panel_desc desc
;
1322 unsigned long flags
;
1323 enum mipi_dsi_pixel_format format
;
1327 static const struct drm_display_mode auo_b080uan01_mode
= {
1330 .hsync_start
= 1200 + 62,
1331 .hsync_end
= 1200 + 62 + 4,
1332 .htotal
= 1200 + 62 + 4 + 62,
1334 .vsync_start
= 1920 + 9,
1335 .vsync_end
= 1920 + 9 + 2,
1336 .vtotal
= 1920 + 9 + 2 + 8,
1340 static const struct panel_desc_dsi auo_b080uan01
= {
1342 .modes
= &auo_b080uan01_mode
,
1350 .flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_CLOCK_NON_CONTINUOUS
,
1351 .format
= MIPI_DSI_FMT_RGB888
,
1355 static const struct drm_display_mode boe_tv080wum_nl0_mode
= {
1358 .hsync_start
= 1200 + 120,
1359 .hsync_end
= 1200 + 120 + 20,
1360 .htotal
= 1200 + 120 + 20 + 21,
1362 .vsync_start
= 1920 + 21,
1363 .vsync_end
= 1920 + 21 + 3,
1364 .vtotal
= 1920 + 21 + 3 + 18,
1366 .flags
= DRM_MODE_FLAG_NVSYNC
| DRM_MODE_FLAG_NHSYNC
,
1369 static const struct panel_desc_dsi boe_tv080wum_nl0
= {
1371 .modes
= &boe_tv080wum_nl0_mode
,
1378 .flags
= MIPI_DSI_MODE_VIDEO
|
1379 MIPI_DSI_MODE_VIDEO_BURST
|
1380 MIPI_DSI_MODE_VIDEO_SYNC_PULSE
,
1381 .format
= MIPI_DSI_FMT_RGB888
,
1385 static const struct drm_display_mode lg_ld070wx3_sl01_mode
= {
1388 .hsync_start
= 800 + 32,
1389 .hsync_end
= 800 + 32 + 1,
1390 .htotal
= 800 + 32 + 1 + 57,
1392 .vsync_start
= 1280 + 28,
1393 .vsync_end
= 1280 + 28 + 1,
1394 .vtotal
= 1280 + 28 + 1 + 14,
1398 static const struct panel_desc_dsi lg_ld070wx3_sl01
= {
1400 .modes
= &lg_ld070wx3_sl01_mode
,
1408 .flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_CLOCK_NON_CONTINUOUS
,
1409 .format
= MIPI_DSI_FMT_RGB888
,
1413 static const struct drm_display_mode lg_lh500wx1_sd03_mode
= {
1416 .hsync_start
= 720 + 12,
1417 .hsync_end
= 720 + 12 + 4,
1418 .htotal
= 720 + 12 + 4 + 112,
1420 .vsync_start
= 1280 + 8,
1421 .vsync_end
= 1280 + 8 + 4,
1422 .vtotal
= 1280 + 8 + 4 + 12,
1426 static const struct panel_desc_dsi lg_lh500wx1_sd03
= {
1428 .modes
= &lg_lh500wx1_sd03_mode
,
1436 .flags
= MIPI_DSI_MODE_VIDEO
,
1437 .format
= MIPI_DSI_FMT_RGB888
,
1441 static const struct drm_display_mode panasonic_vvx10f004b00_mode
= {
1444 .hsync_start
= 1920 + 154,
1445 .hsync_end
= 1920 + 154 + 16,
1446 .htotal
= 1920 + 154 + 16 + 32,
1448 .vsync_start
= 1200 + 17,
1449 .vsync_end
= 1200 + 17 + 2,
1450 .vtotal
= 1200 + 17 + 2 + 16,
1454 static const struct panel_desc_dsi panasonic_vvx10f004b00
= {
1456 .modes
= &panasonic_vvx10f004b00_mode
,
1464 .flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_MODE_VIDEO_SYNC_PULSE
|
1465 MIPI_DSI_CLOCK_NON_CONTINUOUS
,
1466 .format
= MIPI_DSI_FMT_RGB888
,
1471 static const struct of_device_id dsi_of_match
[] = {
1473 .compatible
= "auo,b080uan01",
1474 .data
= &auo_b080uan01
1476 .compatible
= "boe,tv080wum-nl0",
1477 .data
= &boe_tv080wum_nl0
1479 .compatible
= "lg,ld070wx3-sl01",
1480 .data
= &lg_ld070wx3_sl01
1482 .compatible
= "lg,lh500wx1-sd03",
1483 .data
= &lg_lh500wx1_sd03
1485 .compatible
= "panasonic,vvx10f004b00",
1486 .data
= &panasonic_vvx10f004b00
1491 MODULE_DEVICE_TABLE(of
, dsi_of_match
);
1493 static int panel_simple_dsi_probe(struct mipi_dsi_device
*dsi
)
1495 const struct panel_desc_dsi
*desc
;
1496 const struct of_device_id
*id
;
1499 id
= of_match_node(dsi_of_match
, dsi
->dev
.of_node
);
1505 err
= panel_simple_probe(&dsi
->dev
, &desc
->desc
);
1509 dsi
->mode_flags
= desc
->flags
;
1510 dsi
->format
= desc
->format
;
1511 dsi
->lanes
= desc
->lanes
;
1513 return mipi_dsi_attach(dsi
);
1516 static int panel_simple_dsi_remove(struct mipi_dsi_device
*dsi
)
1520 err
= mipi_dsi_detach(dsi
);
1522 dev_err(&dsi
->dev
, "failed to detach from DSI host: %d\n", err
);
1524 return panel_simple_remove(&dsi
->dev
);
1527 static void panel_simple_dsi_shutdown(struct mipi_dsi_device
*dsi
)
1529 panel_simple_shutdown(&dsi
->dev
);
1532 static struct mipi_dsi_driver panel_simple_dsi_driver
= {
1534 .name
= "panel-simple-dsi",
1535 .of_match_table
= dsi_of_match
,
1537 .probe
= panel_simple_dsi_probe
,
1538 .remove
= panel_simple_dsi_remove
,
1539 .shutdown
= panel_simple_dsi_shutdown
,
1542 static int __init
panel_simple_init(void)
1546 err
= platform_driver_register(&panel_simple_platform_driver
);
1550 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI
)) {
1551 err
= mipi_dsi_driver_register(&panel_simple_dsi_driver
);
1558 module_init(panel_simple_init
);
1560 static void __exit
panel_simple_exit(void)
1562 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI
))
1563 mipi_dsi_driver_unregister(&panel_simple_dsi_driver
);
1565 platform_driver_unregister(&panel_simple_platform_driver
);
1567 module_exit(panel_simple_exit
);
1569 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1570 MODULE_DESCRIPTION("DRM Driver for Simple Panels");
1571 MODULE_LICENSE("GPL and additional rights");