drm/radeon/evergreen: add indirect register accessors for CG registers
[deliverable/linux.git] / drivers / gpu / drm / radeon / evergreen_reg.h
1 /*
2 * Copyright 2010 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Alex Deucher
23 */
24 #ifndef __EVERGREEN_REG_H__
25 #define __EVERGREEN_REG_H__
26
27 /* trinity */
28 #define TN_SMC_IND_INDEX_0 0x200
29 #define TN_SMC_IND_DATA_0 0x204
30
31 /* evergreen */
32 #define EVERGREEN_VGA_MEMORY_BASE_ADDRESS 0x310
33 #define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH 0x324
34 #define EVERGREEN_D3VGA_CONTROL 0x3e0
35 #define EVERGREEN_D4VGA_CONTROL 0x3e4
36 #define EVERGREEN_D5VGA_CONTROL 0x3e8
37 #define EVERGREEN_D6VGA_CONTROL 0x3ec
38
39 #define EVERGREEN_P1PLL_SS_CNTL 0x414
40 #define EVERGREEN_P2PLL_SS_CNTL 0x454
41 # define EVERGREEN_PxPLL_SS_EN (1 << 12)
42
43 #define EVERGREEN_AUDIO_PLL1_MUL 0x5b0
44 #define EVERGREEN_AUDIO_PLL1_DIV 0x5b4
45 #define EVERGREEN_AUDIO_PLL1_UNK 0x5bc
46
47 #define EVERGREEN_CG_IND_ADDR 0x8f8
48 #define EVERGREEN_CG_IND_DATA 0x8fc
49
50 #define EVERGREEN_AUDIO_ENABLE 0x5e78
51 #define EVERGREEN_AUDIO_VENDOR_ID 0x5ec0
52
53 /* GRPH blocks at 0x6800, 0x7400, 0x10000, 0x10c00, 0x11800, 0x12400 */
54 #define EVERGREEN_GRPH_ENABLE 0x6800
55 #define EVERGREEN_GRPH_CONTROL 0x6804
56 # define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0)
57 # define EVERGREEN_GRPH_DEPTH_8BPP 0
58 # define EVERGREEN_GRPH_DEPTH_16BPP 1
59 # define EVERGREEN_GRPH_DEPTH_32BPP 2
60 # define EVERGREEN_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2)
61 # define EVERGREEN_ADDR_SURF_2_BANK 0
62 # define EVERGREEN_ADDR_SURF_4_BANK 1
63 # define EVERGREEN_ADDR_SURF_8_BANK 2
64 # define EVERGREEN_ADDR_SURF_16_BANK 3
65 # define EVERGREEN_GRPH_Z(x) (((x) & 0x3) << 4)
66 # define EVERGREEN_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6)
67 # define EVERGREEN_ADDR_SURF_BANK_WIDTH_1 0
68 # define EVERGREEN_ADDR_SURF_BANK_WIDTH_2 1
69 # define EVERGREEN_ADDR_SURF_BANK_WIDTH_4 2
70 # define EVERGREEN_ADDR_SURF_BANK_WIDTH_8 3
71 # define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8)
72 /* 8 BPP */
73 # define EVERGREEN_GRPH_FORMAT_INDEXED 0
74 /* 16 BPP */
75 # define EVERGREEN_GRPH_FORMAT_ARGB1555 0
76 # define EVERGREEN_GRPH_FORMAT_ARGB565 1
77 # define EVERGREEN_GRPH_FORMAT_ARGB4444 2
78 # define EVERGREEN_GRPH_FORMAT_AI88 3
79 # define EVERGREEN_GRPH_FORMAT_MONO16 4
80 # define EVERGREEN_GRPH_FORMAT_BGRA5551 5
81 /* 32 BPP */
82 # define EVERGREEN_GRPH_FORMAT_ARGB8888 0
83 # define EVERGREEN_GRPH_FORMAT_ARGB2101010 1
84 # define EVERGREEN_GRPH_FORMAT_32BPP_DIG 2
85 # define EVERGREEN_GRPH_FORMAT_8B_ARGB2101010 3
86 # define EVERGREEN_GRPH_FORMAT_BGRA1010102 4
87 # define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5
88 # define EVERGREEN_GRPH_FORMAT_RGB111110 6
89 # define EVERGREEN_GRPH_FORMAT_BGR101111 7
90 # define EVERGREEN_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11)
91 # define EVERGREEN_ADDR_SURF_BANK_HEIGHT_1 0
92 # define EVERGREEN_ADDR_SURF_BANK_HEIGHT_2 1
93 # define EVERGREEN_ADDR_SURF_BANK_HEIGHT_4 2
94 # define EVERGREEN_ADDR_SURF_BANK_HEIGHT_8 3
95 # define EVERGREEN_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13)
96 # define EVERGREEN_ADDR_SURF_TILE_SPLIT_64B 0
97 # define EVERGREEN_ADDR_SURF_TILE_SPLIT_128B 1
98 # define EVERGREEN_ADDR_SURF_TILE_SPLIT_256B 2
99 # define EVERGREEN_ADDR_SURF_TILE_SPLIT_512B 3
100 # define EVERGREEN_ADDR_SURF_TILE_SPLIT_1KB 4
101 # define EVERGREEN_ADDR_SURF_TILE_SPLIT_2KB 5
102 # define EVERGREEN_ADDR_SURF_TILE_SPLIT_4KB 6
103 # define EVERGREEN_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18)
104 # define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_1 0
105 # define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_2 1
106 # define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4 2
107 # define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_8 3
108 # define EVERGREEN_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20)
109 # define EVERGREEN_GRPH_ARRAY_LINEAR_GENERAL 0
110 # define EVERGREEN_GRPH_ARRAY_LINEAR_ALIGNED 1
111 # define EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1 2
112 # define EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1 4
113 #define EVERGREEN_GRPH_SWAP_CONTROL 0x680c
114 # define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0)
115 # define EVERGREEN_GRPH_ENDIAN_NONE 0
116 # define EVERGREEN_GRPH_ENDIAN_8IN16 1
117 # define EVERGREEN_GRPH_ENDIAN_8IN32 2
118 # define EVERGREEN_GRPH_ENDIAN_8IN64 3
119 # define EVERGREEN_GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4)
120 # define EVERGREEN_GRPH_RED_SEL_R 0
121 # define EVERGREEN_GRPH_RED_SEL_G 1
122 # define EVERGREEN_GRPH_RED_SEL_B 2
123 # define EVERGREEN_GRPH_RED_SEL_A 3
124 # define EVERGREEN_GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6)
125 # define EVERGREEN_GRPH_GREEN_SEL_G 0
126 # define EVERGREEN_GRPH_GREEN_SEL_B 1
127 # define EVERGREEN_GRPH_GREEN_SEL_A 2
128 # define EVERGREEN_GRPH_GREEN_SEL_R 3
129 # define EVERGREEN_GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8)
130 # define EVERGREEN_GRPH_BLUE_SEL_B 0
131 # define EVERGREEN_GRPH_BLUE_SEL_A 1
132 # define EVERGREEN_GRPH_BLUE_SEL_R 2
133 # define EVERGREEN_GRPH_BLUE_SEL_G 3
134 # define EVERGREEN_GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10)
135 # define EVERGREEN_GRPH_ALPHA_SEL_A 0
136 # define EVERGREEN_GRPH_ALPHA_SEL_R 1
137 # define EVERGREEN_GRPH_ALPHA_SEL_G 2
138 # define EVERGREEN_GRPH_ALPHA_SEL_B 3
139 #define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS 0x6810
140 #define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS 0x6814
141 # define EVERGREEN_GRPH_DFQ_ENABLE (1 << 0)
142 # define EVERGREEN_GRPH_SURFACE_ADDRESS_MASK 0xffffff00
143 #define EVERGREEN_GRPH_PITCH 0x6818
144 #define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x681c
145 #define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x6820
146 #define EVERGREEN_GRPH_SURFACE_OFFSET_X 0x6824
147 #define EVERGREEN_GRPH_SURFACE_OFFSET_Y 0x6828
148 #define EVERGREEN_GRPH_X_START 0x682c
149 #define EVERGREEN_GRPH_Y_START 0x6830
150 #define EVERGREEN_GRPH_X_END 0x6834
151 #define EVERGREEN_GRPH_Y_END 0x6838
152 #define EVERGREEN_GRPH_UPDATE 0x6844
153 # define EVERGREEN_GRPH_SURFACE_UPDATE_PENDING (1 << 2)
154 # define EVERGREEN_GRPH_UPDATE_LOCK (1 << 16)
155 #define EVERGREEN_GRPH_FLIP_CONTROL 0x6848
156 # define EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN (1 << 0)
157
158 /* CUR blocks at 0x6998, 0x7598, 0x10198, 0x10d98, 0x11998, 0x12598 */
159 #define EVERGREEN_CUR_CONTROL 0x6998
160 # define EVERGREEN_CURSOR_EN (1 << 0)
161 # define EVERGREEN_CURSOR_MODE(x) (((x) & 0x3) << 8)
162 # define EVERGREEN_CURSOR_MONO 0
163 # define EVERGREEN_CURSOR_24_1 1
164 # define EVERGREEN_CURSOR_24_8_PRE_MULT 2
165 # define EVERGREEN_CURSOR_24_8_UNPRE_MULT 3
166 # define EVERGREEN_CURSOR_2X_MAGNIFY (1 << 16)
167 # define EVERGREEN_CURSOR_FORCE_MC_ON (1 << 20)
168 # define EVERGREEN_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24)
169 # define EVERGREEN_CURSOR_URGENT_ALWAYS 0
170 # define EVERGREEN_CURSOR_URGENT_1_8 1
171 # define EVERGREEN_CURSOR_URGENT_1_4 2
172 # define EVERGREEN_CURSOR_URGENT_3_8 3
173 # define EVERGREEN_CURSOR_URGENT_1_2 4
174 #define EVERGREEN_CUR_SURFACE_ADDRESS 0x699c
175 # define EVERGREEN_CUR_SURFACE_ADDRESS_MASK 0xfffff000
176 #define EVERGREEN_CUR_SIZE 0x69a0
177 #define EVERGREEN_CUR_SURFACE_ADDRESS_HIGH 0x69a4
178 #define EVERGREEN_CUR_POSITION 0x69a8
179 #define EVERGREEN_CUR_HOT_SPOT 0x69ac
180 #define EVERGREEN_CUR_COLOR1 0x69b0
181 #define EVERGREEN_CUR_COLOR2 0x69b4
182 #define EVERGREEN_CUR_UPDATE 0x69b8
183 # define EVERGREEN_CURSOR_UPDATE_PENDING (1 << 0)
184 # define EVERGREEN_CURSOR_UPDATE_TAKEN (1 << 1)
185 # define EVERGREEN_CURSOR_UPDATE_LOCK (1 << 16)
186 # define EVERGREEN_CURSOR_DISABLE_MULTIPLE_UPDATE (1 << 24)
187
188 /* LUT blocks at 0x69e0, 0x75e0, 0x101e0, 0x10de0, 0x119e0, 0x125e0 */
189 #define EVERGREEN_DC_LUT_RW_MODE 0x69e0
190 #define EVERGREEN_DC_LUT_RW_INDEX 0x69e4
191 #define EVERGREEN_DC_LUT_SEQ_COLOR 0x69e8
192 #define EVERGREEN_DC_LUT_PWL_DATA 0x69ec
193 #define EVERGREEN_DC_LUT_30_COLOR 0x69f0
194 #define EVERGREEN_DC_LUT_VGA_ACCESS_ENABLE 0x69f4
195 #define EVERGREEN_DC_LUT_WRITE_EN_MASK 0x69f8
196 #define EVERGREEN_DC_LUT_AUTOFILL 0x69fc
197 #define EVERGREEN_DC_LUT_CONTROL 0x6a00
198 #define EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE 0x6a04
199 #define EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN 0x6a08
200 #define EVERGREEN_DC_LUT_BLACK_OFFSET_RED 0x6a0c
201 #define EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE 0x6a10
202 #define EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN 0x6a14
203 #define EVERGREEN_DC_LUT_WHITE_OFFSET_RED 0x6a18
204
205 #define EVERGREEN_DATA_FORMAT 0x6b00
206 # define EVERGREEN_INTERLEAVE_EN (1 << 0)
207 #define EVERGREEN_DESKTOP_HEIGHT 0x6b04
208 #define EVERGREEN_VLINE_START_END 0x6b08
209 #define EVERGREEN_VLINE_STATUS 0x6bb8
210 # define EVERGREEN_VLINE_STAT (1 << 12)
211
212 #define EVERGREEN_VIEWPORT_START 0x6d70
213 #define EVERGREEN_VIEWPORT_SIZE 0x6d74
214
215 /* display controller offsets used for crtc/cur/lut/grph/viewport/etc. */
216 #define EVERGREEN_CRTC0_REGISTER_OFFSET (0x6df0 - 0x6df0)
217 #define EVERGREEN_CRTC1_REGISTER_OFFSET (0x79f0 - 0x6df0)
218 #define EVERGREEN_CRTC2_REGISTER_OFFSET (0x105f0 - 0x6df0)
219 #define EVERGREEN_CRTC3_REGISTER_OFFSET (0x111f0 - 0x6df0)
220 #define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0)
221 #define EVERGREEN_CRTC5_REGISTER_OFFSET (0x129f0 - 0x6df0)
222
223 /* CRTC blocks at 0x6df0, 0x79f0, 0x105f0, 0x111f0, 0x11df0, 0x129f0 */
224 #define EVERGREEN_CRTC_V_BLANK_START_END 0x6e34
225 #define EVERGREEN_CRTC_CONTROL 0x6e70
226 # define EVERGREEN_CRTC_MASTER_EN (1 << 0)
227 # define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 << 24)
228 #define EVERGREEN_CRTC_BLANK_CONTROL 0x6e74
229 # define EVERGREEN_CRTC_BLANK_DATA_EN (1 << 8)
230 #define EVERGREEN_CRTC_STATUS 0x6e8c
231 # define EVERGREEN_CRTC_V_BLANK (1 << 0)
232 #define EVERGREEN_CRTC_STATUS_POSITION 0x6e90
233 #define EVERGREEN_CRTC_STATUS_HV_COUNT 0x6ea0
234 #define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
235 #define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
236 #define EVERGREEN_MASTER_UPDATE_LOCK 0x6ef4
237 #define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
238
239 #define EVERGREEN_DC_GPIO_HPD_MASK 0x64b0
240 #define EVERGREEN_DC_GPIO_HPD_A 0x64b4
241 #define EVERGREEN_DC_GPIO_HPD_EN 0x64b8
242 #define EVERGREEN_DC_GPIO_HPD_Y 0x64bc
243
244 /* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */
245 #define EVERGREEN_HDMI_BASE 0x7030
246
247 #endif
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