2 #define R100_TRACK_MAX_TEXTURE 3
3 #define R200_TRACK_MAX_TEXTURE 6
4 #define R300_TRACK_MAX_TEXTURE 16
12 struct r100_cs_track_cb
{
13 struct radeon_object
*robj
;
19 struct r100_cs_track_array
{
20 struct radeon_object
*robj
;
24 struct r100_cs_cube_info
{
25 struct radeon_object
*robj
;
31 struct r100_cs_track_texture
{
32 struct radeon_object
*robj
;
33 struct r100_cs_cube_info cube_info
[5]; /* info for 5 non-primary faces */
39 unsigned tex_coord_type
;
49 struct r100_cs_track_limits
{
55 struct r100_cs_track
{
56 struct radeon_device
*rdev
;
65 struct r100_cs_track_array arrays
[11];
66 struct r100_cs_track_cb cb
[R300_MAX_CB
];
67 struct r100_cs_track_cb zb
;
68 struct r100_cs_track_texture textures
[R300_TRACK_MAX_TEXTURE
];
74 int r100_cs_track_check(struct radeon_device
*rdev
, struct r100_cs_track
*track
);
75 void r100_cs_track_clear(struct radeon_device
*rdev
, struct r100_cs_track
*track
);
76 int r100_cs_packet_next_reloc(struct radeon_cs_parser
*p
,
77 struct radeon_cs_reloc
**cs_reloc
);
78 void r100_cs_dump_packet(struct radeon_cs_parser
*p
,
79 struct radeon_cs_packet
*pkt
);
81 int r100_cs_packet_parse_vline(struct radeon_cs_parser
*p
);
83 int r200_packet0_check(struct radeon_cs_parser
*p
,
84 struct radeon_cs_packet
*pkt
,
85 unsigned idx
, unsigned reg
);
87 static inline int r100_reloc_pitch_offset(struct radeon_cs_parser
*p
,
88 struct radeon_cs_packet
*pkt
,
95 struct radeon_cs_reloc
*reloc
;
96 struct radeon_cs_chunk
*ib_chunk
;
98 ib_chunk
= &p
->chunks
[p
->chunk_ib_idx
];
100 r
= r100_cs_packet_next_reloc(p
, &reloc
);
102 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
104 r100_cs_dump_packet(p
, pkt
);
107 tmp
= ib_chunk
->kdata
[idx
] & 0x003fffff;
108 tmp
+= (((u32
)reloc
->lobj
.gpu_offset
) >> 10);
110 if (reloc
->lobj
.tiling_flags
& RADEON_TILING_MACRO
)
111 tile_flags
|= RADEON_DST_TILE_MACRO
;
112 if (reloc
->lobj
.tiling_flags
& RADEON_TILING_MICRO
) {
113 if (reg
== RADEON_SRC_PITCH_OFFSET
) {
114 DRM_ERROR("Cannot src blit from microtiled surface\n");
115 r100_cs_dump_packet(p
, pkt
);
118 tile_flags
|= RADEON_DST_TILE_MICRO
;
122 p
->ib
->ptr
[idx
] = (ib_chunk
->kdata
[idx
] & 0x3fc00000) | tmp
;