MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_audio.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Slava Grigorev <slava.grigorev@amd.com>
23 */
24
25 #include <linux/gcd.h>
26 #include <drm/drmP.h>
27 #include <drm/drm_crtc.h>
28 #include "radeon.h"
29 #include "atom.h"
30 #include "radeon_audio.h"
31
32 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
33 u8 enable_mask);
34 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
35 u8 enable_mask);
36 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
37 u8 enable_mask);
38 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
39 void dce6_endpoint_wreg(struct radeon_device *rdev,
40 u32 offset, u32 reg, u32 v);
41 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
42 struct cea_sad *sads, int sad_count);
43 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
44 struct cea_sad *sads, int sad_count);
45 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
46 struct cea_sad *sads, int sad_count);
47 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
48 u8 *sadb, int sad_count);
49 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
50 u8 *sadb, int sad_count);
51 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
52 u8 *sadb, int sad_count);
53 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
54 u8 *sadb, int sad_count);
55 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
56 u8 *sadb, int sad_count);
57 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
58 u8 *sadb, int sad_count);
59 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
60 struct drm_connector *connector, struct drm_display_mode *mode);
61 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
62 struct drm_connector *connector, struct drm_display_mode *mode);
63 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
64 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
65 void dce6_afmt_select_pin(struct drm_encoder *encoder);
66 void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
67 struct radeon_crtc *crtc, unsigned int clock);
68 void dce3_2_audio_set_dto(struct radeon_device *rdev,
69 struct radeon_crtc *crtc, unsigned int clock);
70 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
71 struct radeon_crtc *crtc, unsigned int clock);
72 void dce4_dp_audio_set_dto(struct radeon_device *rdev,
73 struct radeon_crtc *crtc, unsigned int clock);
74 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
75 struct radeon_crtc *crtc, unsigned int clock);
76 void dce6_dp_audio_set_dto(struct radeon_device *rdev,
77 struct radeon_crtc *crtc, unsigned int clock);
78 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
79 unsigned char *buffer, size_t size);
80 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
81 unsigned char *buffer, size_t size);
82 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
83 const struct radeon_hdmi_acr *acr);
84 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
85 const struct radeon_hdmi_acr *acr);
86 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
87 const struct radeon_hdmi_acr *acr);
88 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
89 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
90 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
91 u32 offset, int bpc);
92 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
93 void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
94 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
95 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
96 void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
97 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
98 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
99 struct drm_display_mode *mode);
100 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
101 struct drm_display_mode *mode);
102 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
103 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
104 void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable);
105 void dce6_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable);
106
107 static const u32 pin_offsets[7] =
108 {
109 (0x5e00 - 0x5e00),
110 (0x5e18 - 0x5e00),
111 (0x5e30 - 0x5e00),
112 (0x5e48 - 0x5e00),
113 (0x5e60 - 0x5e00),
114 (0x5e78 - 0x5e00),
115 (0x5e90 - 0x5e00),
116 };
117
118 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
119 {
120 return RREG32(reg);
121 }
122
123 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
124 u32 reg, u32 v)
125 {
126 WREG32(reg, v);
127 }
128
129 static struct radeon_audio_basic_funcs r600_funcs = {
130 .endpoint_rreg = radeon_audio_rreg,
131 .endpoint_wreg = radeon_audio_wreg,
132 .enable = r600_audio_enable,
133 };
134
135 static struct radeon_audio_basic_funcs dce32_funcs = {
136 .endpoint_rreg = radeon_audio_rreg,
137 .endpoint_wreg = radeon_audio_wreg,
138 .enable = r600_audio_enable,
139 };
140
141 static struct radeon_audio_basic_funcs dce4_funcs = {
142 .endpoint_rreg = radeon_audio_rreg,
143 .endpoint_wreg = radeon_audio_wreg,
144 .enable = dce4_audio_enable,
145 };
146
147 static struct radeon_audio_basic_funcs dce6_funcs = {
148 .endpoint_rreg = dce6_endpoint_rreg,
149 .endpoint_wreg = dce6_endpoint_wreg,
150 .enable = dce6_audio_enable,
151 };
152
153 static struct radeon_audio_funcs r600_hdmi_funcs = {
154 .get_pin = r600_audio_get_pin,
155 .set_dto = r600_hdmi_audio_set_dto,
156 .update_acr = r600_hdmi_update_acr,
157 .set_vbi_packet = r600_set_vbi_packet,
158 .set_avi_packet = r600_set_avi_packet,
159 .set_audio_packet = r600_set_audio_packet,
160 .set_mute = r600_set_mute,
161 .mode_set = radeon_audio_hdmi_mode_set,
162 .dpms = r600_hdmi_enable,
163 };
164
165 static struct radeon_audio_funcs dce32_hdmi_funcs = {
166 .get_pin = r600_audio_get_pin,
167 .write_sad_regs = dce3_2_afmt_write_sad_regs,
168 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
169 .set_dto = dce3_2_audio_set_dto,
170 .update_acr = dce3_2_hdmi_update_acr,
171 .set_vbi_packet = r600_set_vbi_packet,
172 .set_avi_packet = r600_set_avi_packet,
173 .set_audio_packet = dce3_2_set_audio_packet,
174 .set_mute = dce3_2_set_mute,
175 .mode_set = radeon_audio_hdmi_mode_set,
176 .dpms = r600_hdmi_enable,
177 };
178
179 static struct radeon_audio_funcs dce32_dp_funcs = {
180 .get_pin = r600_audio_get_pin,
181 .write_sad_regs = dce3_2_afmt_write_sad_regs,
182 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
183 .set_dto = dce3_2_audio_set_dto,
184 .set_avi_packet = r600_set_avi_packet,
185 .set_audio_packet = dce3_2_set_audio_packet,
186 };
187
188 static struct radeon_audio_funcs dce4_hdmi_funcs = {
189 .get_pin = r600_audio_get_pin,
190 .write_sad_regs = evergreen_hdmi_write_sad_regs,
191 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
192 .write_latency_fields = dce4_afmt_write_latency_fields,
193 .set_dto = dce4_hdmi_audio_set_dto,
194 .update_acr = evergreen_hdmi_update_acr,
195 .set_vbi_packet = dce4_set_vbi_packet,
196 .set_color_depth = dce4_hdmi_set_color_depth,
197 .set_avi_packet = evergreen_set_avi_packet,
198 .set_audio_packet = dce4_set_audio_packet,
199 .set_mute = dce4_set_mute,
200 .mode_set = radeon_audio_hdmi_mode_set,
201 .dpms = evergreen_hdmi_enable,
202 };
203
204 static struct radeon_audio_funcs dce4_dp_funcs = {
205 .get_pin = r600_audio_get_pin,
206 .write_sad_regs = evergreen_hdmi_write_sad_regs,
207 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
208 .write_latency_fields = dce4_afmt_write_latency_fields,
209 .set_dto = dce4_dp_audio_set_dto,
210 .set_avi_packet = evergreen_set_avi_packet,
211 .set_audio_packet = dce4_set_audio_packet,
212 .mode_set = radeon_audio_dp_mode_set,
213 .dpms = evergreen_enable_dp_audio_packets,
214 };
215
216 static struct radeon_audio_funcs dce6_hdmi_funcs = {
217 .select_pin = dce6_afmt_select_pin,
218 .get_pin = dce6_audio_get_pin,
219 .write_sad_regs = dce6_afmt_write_sad_regs,
220 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
221 .write_latency_fields = dce6_afmt_write_latency_fields,
222 .set_dto = dce6_hdmi_audio_set_dto,
223 .update_acr = evergreen_hdmi_update_acr,
224 .set_vbi_packet = dce4_set_vbi_packet,
225 .set_color_depth = dce4_hdmi_set_color_depth,
226 .set_avi_packet = evergreen_set_avi_packet,
227 .set_audio_packet = dce4_set_audio_packet,
228 .set_mute = dce4_set_mute,
229 .mode_set = radeon_audio_hdmi_mode_set,
230 .dpms = evergreen_hdmi_enable,
231 };
232
233 static struct radeon_audio_funcs dce6_dp_funcs = {
234 .select_pin = dce6_afmt_select_pin,
235 .get_pin = dce6_audio_get_pin,
236 .write_sad_regs = dce6_afmt_write_sad_regs,
237 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
238 .write_latency_fields = dce6_afmt_write_latency_fields,
239 .set_dto = dce6_dp_audio_set_dto,
240 .set_avi_packet = evergreen_set_avi_packet,
241 .set_audio_packet = dce4_set_audio_packet,
242 .mode_set = radeon_audio_dp_mode_set,
243 .dpms = dce6_enable_dp_audio_packets,
244 };
245
246 static void radeon_audio_interface_init(struct radeon_device *rdev)
247 {
248 if (ASIC_IS_DCE6(rdev)) {
249 rdev->audio.funcs = &dce6_funcs;
250 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
251 rdev->audio.dp_funcs = &dce6_dp_funcs;
252 } else if (ASIC_IS_DCE4(rdev)) {
253 rdev->audio.funcs = &dce4_funcs;
254 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
255 rdev->audio.dp_funcs = &dce4_dp_funcs;
256 } else if (ASIC_IS_DCE32(rdev)) {
257 rdev->audio.funcs = &dce32_funcs;
258 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
259 rdev->audio.dp_funcs = &dce32_dp_funcs;
260 } else {
261 rdev->audio.funcs = &r600_funcs;
262 rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
263 rdev->audio.dp_funcs = 0;
264 }
265 }
266
267 static int radeon_audio_chipset_supported(struct radeon_device *rdev)
268 {
269 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
270 }
271
272 int radeon_audio_init(struct radeon_device *rdev)
273 {
274 int i;
275
276 if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
277 return 0;
278
279 rdev->audio.enabled = true;
280
281 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
282 rdev->audio.num_pins = 3;
283 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
284 rdev->audio.num_pins = 7;
285 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
286 rdev->audio.num_pins = 7;
287 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
288 rdev->audio.num_pins = 2;
289 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
290 rdev->audio.num_pins = 6;
291 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
292 rdev->audio.num_pins = 6;
293 else
294 rdev->audio.num_pins = 1;
295
296 for (i = 0; i < rdev->audio.num_pins; i++) {
297 rdev->audio.pin[i].channels = -1;
298 rdev->audio.pin[i].rate = -1;
299 rdev->audio.pin[i].bits_per_sample = -1;
300 rdev->audio.pin[i].status_bits = 0;
301 rdev->audio.pin[i].category_code = 0;
302 rdev->audio.pin[i].connected = false;
303 rdev->audio.pin[i].offset = pin_offsets[i];
304 rdev->audio.pin[i].id = i;
305 }
306
307 radeon_audio_interface_init(rdev);
308
309 /* disable audio. it will be set up later */
310 for (i = 0; i < rdev->audio.num_pins; i++)
311 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
312
313 return 0;
314 }
315
316 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
317 {
318 if (rdev->audio.funcs->endpoint_rreg)
319 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
320
321 return 0;
322 }
323
324 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
325 u32 reg, u32 v)
326 {
327 if (rdev->audio.funcs->endpoint_wreg)
328 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
329 }
330
331 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
332 {
333 struct radeon_encoder *radeon_encoder;
334 struct drm_connector *connector;
335 struct radeon_connector *radeon_connector = NULL;
336 struct cea_sad *sads;
337 int sad_count;
338
339 list_for_each_entry(connector,
340 &encoder->dev->mode_config.connector_list, head) {
341 if (connector->encoder == encoder) {
342 radeon_connector = to_radeon_connector(connector);
343 break;
344 }
345 }
346
347 if (!radeon_connector) {
348 DRM_ERROR("Couldn't find encoder's connector\n");
349 return;
350 }
351
352 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
353 if (sad_count <= 0) {
354 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
355 return;
356 }
357 BUG_ON(!sads);
358
359 radeon_encoder = to_radeon_encoder(encoder);
360
361 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
362 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
363
364 kfree(sads);
365 }
366
367 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
368 {
369 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
370 struct drm_connector *connector;
371 struct radeon_connector *radeon_connector = NULL;
372 u8 *sadb = NULL;
373 int sad_count;
374
375 list_for_each_entry(connector,
376 &encoder->dev->mode_config.connector_list, head) {
377 if (connector->encoder == encoder) {
378 radeon_connector = to_radeon_connector(connector);
379 break;
380 }
381 }
382
383 if (!radeon_connector) {
384 DRM_ERROR("Couldn't find encoder's connector\n");
385 return;
386 }
387
388 sad_count = drm_edid_to_speaker_allocation(
389 radeon_connector_edid(connector), &sadb);
390 if (sad_count < 0) {
391 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
392 sad_count);
393 sad_count = 0;
394 }
395
396 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
397 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
398
399 kfree(sadb);
400 }
401
402 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
403 struct drm_display_mode *mode)
404 {
405 struct radeon_encoder *radeon_encoder;
406 struct drm_connector *connector;
407 struct radeon_connector *radeon_connector = 0;
408
409 list_for_each_entry(connector,
410 &encoder->dev->mode_config.connector_list, head) {
411 if (connector->encoder == encoder) {
412 radeon_connector = to_radeon_connector(connector);
413 break;
414 }
415 }
416
417 if (!radeon_connector) {
418 DRM_ERROR("Couldn't find encoder's connector\n");
419 return;
420 }
421
422 radeon_encoder = to_radeon_encoder(encoder);
423
424 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
425 radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
426 }
427
428 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
429 {
430 struct radeon_device *rdev = encoder->dev->dev_private;
431 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
432
433 if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
434 return radeon_encoder->audio->get_pin(rdev);
435
436 return NULL;
437 }
438
439 static void radeon_audio_select_pin(struct drm_encoder *encoder)
440 {
441 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
442
443 if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
444 radeon_encoder->audio->select_pin(encoder);
445 }
446
447 void radeon_audio_enable(struct radeon_device *rdev,
448 struct r600_audio_pin *pin, u8 enable_mask)
449 {
450 if (rdev->audio.funcs->enable)
451 rdev->audio.funcs->enable(rdev, pin, enable_mask);
452 }
453
454 void radeon_audio_detect(struct drm_connector *connector,
455 enum drm_connector_status status)
456 {
457 struct radeon_device *rdev;
458 struct radeon_encoder *radeon_encoder;
459 struct radeon_encoder_atom_dig *dig;
460
461 if (!connector || !connector->encoder)
462 return;
463
464 rdev = connector->encoder->dev->dev_private;
465 radeon_encoder = to_radeon_encoder(connector->encoder);
466 dig = radeon_encoder->enc_priv;
467
468 if (status == connector_status_connected) {
469 struct radeon_connector *radeon_connector;
470 int sink_type;
471
472 if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
473 radeon_encoder->audio = NULL;
474 return;
475 }
476
477 radeon_connector = to_radeon_connector(connector);
478 sink_type = radeon_dp_getsinktype(radeon_connector);
479
480 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
481 sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
482 radeon_encoder->audio = rdev->audio.dp_funcs;
483 else
484 radeon_encoder->audio = rdev->audio.hdmi_funcs;
485
486 radeon_audio_write_speaker_allocation(connector->encoder);
487 radeon_audio_write_sad_regs(connector->encoder);
488 if (connector->encoder->crtc)
489 radeon_audio_write_latency_fields(connector->encoder,
490 &connector->encoder->crtc->mode);
491 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
492 } else {
493 radeon_audio_enable(rdev, dig->afmt->pin, 0);
494 }
495 }
496
497 void radeon_audio_fini(struct radeon_device *rdev)
498 {
499 int i;
500
501 if (!rdev->audio.enabled)
502 return;
503
504 for (i = 0; i < rdev->audio.num_pins; i++)
505 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
506
507 rdev->audio.enabled = false;
508 }
509
510 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
511 {
512 struct radeon_device *rdev = encoder->dev->dev_private;
513 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
514 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
515
516 if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
517 radeon_encoder->audio->set_dto(rdev, crtc, clock);
518 }
519
520 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
521 struct drm_display_mode *mode)
522 {
523 struct radeon_device *rdev = encoder->dev->dev_private;
524 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
525 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
526 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
527 struct hdmi_avi_infoframe frame;
528 int err;
529
530 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
531 if (err < 0) {
532 DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
533 return err;
534 }
535
536 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
537 if (err < 0) {
538 DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
539 return err;
540 }
541
542 if (dig && dig->afmt &&
543 radeon_encoder->audio && radeon_encoder->audio->set_avi_packet)
544 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
545 buffer, sizeof(buffer));
546
547 return 0;
548 }
549
550 /*
551 * calculate CTS and N values if they are not found in the table
552 */
553 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
554 {
555 int n, cts;
556 unsigned long div, mul;
557
558 /* Safe, but overly large values */
559 n = 128 * freq;
560 cts = clock * 1000;
561
562 /* Smallest valid fraction */
563 div = gcd(n, cts);
564
565 n /= div;
566 cts /= div;
567
568 /*
569 * The optimal N is 128*freq/1000. Calculate the closest larger
570 * value that doesn't truncate any bits.
571 */
572 mul = ((128*freq/1000) + (n-1))/n;
573
574 n *= mul;
575 cts *= mul;
576
577 /* Check that we are in spec (not always possible) */
578 if (n < (128*freq/1500))
579 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
580 if (n > (128*freq/300))
581 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
582
583 *N = n;
584 *CTS = cts;
585
586 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
587 *N, *CTS, freq);
588 }
589
590 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
591 {
592 static struct radeon_hdmi_acr res;
593 u8 i;
594
595 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
596 /* 32kHz 44.1kHz 48kHz */
597 /* Clock N CTS N CTS N CTS */
598 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
599 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
600 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
601 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
602 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
603 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
604 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
605 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
606 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
607 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
608 };
609
610 /* Precalculated values for common clocks */
611 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
612 if (hdmi_predefined_acr[i].clock == clock)
613 return &hdmi_predefined_acr[i];
614
615 /* And odd clocks get manually calculated */
616 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
617 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
618 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
619
620 return &res;
621 }
622
623 /*
624 * update the N and CTS parameters for a given pixel clock rate
625 */
626 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
627 {
628 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
629 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
630 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
631
632 if (!dig || !dig->afmt)
633 return;
634
635 if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
636 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
637 }
638
639 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
640 {
641 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
642 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
643
644 if (!dig || !dig->afmt)
645 return;
646
647 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
648 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
649 }
650
651 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
652 {
653 int bpc = 8;
654 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
655 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
656
657 if (!dig || !dig->afmt)
658 return;
659
660 if (encoder->crtc) {
661 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
662 bpc = radeon_crtc->bpc;
663 }
664
665 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
666 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
667 }
668
669 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
670 {
671 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
672 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
673
674 if (!dig || !dig->afmt)
675 return;
676
677 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
678 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
679 }
680
681 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
682 {
683 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
684 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
685
686 if (!dig || !dig->afmt)
687 return;
688
689 if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
690 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
691 }
692
693 /*
694 * update the info frames with the data from the current display mode
695 */
696 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
697 struct drm_display_mode *mode)
698 {
699 struct radeon_device *rdev = encoder->dev->dev_private;
700 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
701 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
702
703 if (!dig || !dig->afmt)
704 return;
705
706 /* disable audio prior to setting up hw */
707 dig->afmt->pin = radeon_audio_get_pin(encoder);
708 radeon_audio_enable(rdev, dig->afmt->pin, 0);
709
710 radeon_audio_set_dto(encoder, mode->clock);
711 radeon_audio_set_vbi_packet(encoder);
712 radeon_hdmi_set_color_depth(encoder);
713 radeon_audio_set_mute(encoder, false);
714 radeon_audio_update_acr(encoder, mode->clock);
715 radeon_audio_set_audio_packet(encoder);
716 radeon_audio_select_pin(encoder);
717
718 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
719 return;
720
721 /* enable audio after to setting up hw */
722 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
723 }
724
725 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
726 struct drm_display_mode *mode)
727 {
728 struct drm_device *dev = encoder->dev;
729 struct radeon_device *rdev = dev->dev_private;
730 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
731 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
732
733 if (!dig || !dig->afmt)
734 return;
735
736 /* disable audio prior to setting up hw */
737 dig->afmt->pin = radeon_audio_get_pin(encoder);
738 radeon_audio_enable(rdev, dig->afmt->pin, 0);
739
740 radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
741 radeon_audio_set_audio_packet(encoder);
742 radeon_audio_select_pin(encoder);
743
744 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
745 return;
746
747 /* enable audio after to setting up hw */
748 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
749 }
750
751 void radeon_audio_mode_set(struct drm_encoder *encoder,
752 struct drm_display_mode *mode)
753 {
754 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
755
756 if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
757 radeon_encoder->audio->mode_set(encoder, mode);
758 }
759
760 void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
761 {
762 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
763
764 if (radeon_encoder->audio && radeon_encoder->audio->dpms)
765 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
766 }
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