2 * Copyright 2008 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Jerome Glisse <glisse@freedesktop.org>
28 #include "radeon_drm.h"
29 #include "radeon_reg.h"
32 void r100_cs_dump_packet(struct radeon_cs_parser
*p
,
33 struct radeon_cs_packet
*pkt
);
35 int radeon_cs_parser_relocs(struct radeon_cs_parser
*p
)
37 struct drm_device
*ddev
= p
->rdev
->ddev
;
38 struct radeon_cs_chunk
*chunk
;
42 if (p
->chunk_relocs_idx
== -1) {
45 chunk
= &p
->chunks
[p
->chunk_relocs_idx
];
46 /* FIXME: we assume that each relocs use 4 dwords */
47 p
->nrelocs
= chunk
->length_dw
/ 4;
48 p
->relocs_ptr
= kcalloc(p
->nrelocs
, sizeof(void *), GFP_KERNEL
);
49 if (p
->relocs_ptr
== NULL
) {
52 p
->relocs
= kcalloc(p
->nrelocs
, sizeof(struct radeon_cs_reloc
), GFP_KERNEL
);
53 if (p
->relocs
== NULL
) {
56 for (i
= 0; i
< p
->nrelocs
; i
++) {
57 struct drm_radeon_cs_reloc
*r
;
60 r
= (struct drm_radeon_cs_reloc
*)&chunk
->kdata
[i
*4];
61 for (j
= 0; j
< i
; j
++) {
62 if (r
->handle
== p
->relocs
[j
].handle
) {
63 p
->relocs_ptr
[i
] = &p
->relocs
[j
];
69 p
->relocs
[i
].gobj
= drm_gem_object_lookup(ddev
,
72 if (p
->relocs
[i
].gobj
== NULL
) {
73 DRM_ERROR("gem object lookup failed 0x%x\n",
77 p
->relocs_ptr
[i
] = &p
->relocs
[i
];
78 p
->relocs
[i
].robj
= gem_to_radeon_bo(p
->relocs
[i
].gobj
);
79 p
->relocs
[i
].lobj
.bo
= p
->relocs
[i
].robj
;
80 p
->relocs
[i
].lobj
.wdomain
= r
->write_domain
;
81 p
->relocs
[i
].lobj
.rdomain
= r
->read_domains
;
82 p
->relocs
[i
].lobj
.tv
.bo
= &p
->relocs
[i
].robj
->tbo
;
83 p
->relocs
[i
].handle
= r
->handle
;
84 p
->relocs
[i
].flags
= r
->flags
;
85 radeon_bo_list_add_object(&p
->relocs
[i
].lobj
,
89 p
->relocs
[i
].handle
= 0;
91 return radeon_bo_list_validate(&p
->validated
);
94 static int radeon_cs_get_ring(struct radeon_cs_parser
*p
, u32 ring
, s32 priority
)
96 p
->priority
= priority
;
100 DRM_ERROR("unknown ring id: %d\n", ring
);
102 case RADEON_CS_RING_GFX
:
103 p
->ring
= RADEON_RING_TYPE_GFX_INDEX
;
105 case RADEON_CS_RING_COMPUTE
:
107 p
->ring
= RADEON_RING_TYPE_GFX_INDEX
;
113 static int radeon_cs_sync_rings(struct radeon_cs_parser
*p
)
115 bool sync_to_ring
[RADEON_NUM_RINGS
] = { };
118 for (i
= 0; i
< p
->nrelocs
; i
++) {
119 if (!p
->relocs
[i
].robj
|| !p
->relocs
[i
].robj
->tbo
.sync_obj
)
122 if (!(p
->relocs
[i
].flags
& RADEON_RELOC_DONT_SYNC
)) {
123 struct radeon_fence
*fence
= p
->relocs
[i
].robj
->tbo
.sync_obj
;
124 if (!radeon_fence_signaled(fence
)) {
125 sync_to_ring
[fence
->ring
] = true;
130 for (i
= 0; i
< RADEON_NUM_RINGS
; ++i
) {
131 /* no need to sync to our own or unused rings */
132 if (i
== p
->ring
|| !sync_to_ring
[i
] || !p
->rdev
->ring
[i
].ready
)
135 if (!p
->ib
->fence
->semaphore
) {
136 r
= radeon_semaphore_create(p
->rdev
, &p
->ib
->fence
->semaphore
);
141 r
= radeon_ring_lock(p
->rdev
, &p
->rdev
->ring
[i
], 3);
144 radeon_semaphore_emit_signal(p
->rdev
, i
, p
->ib
->fence
->semaphore
);
145 radeon_ring_unlock_commit(p
->rdev
, &p
->rdev
->ring
[i
]);
147 r
= radeon_ring_lock(p
->rdev
, &p
->rdev
->ring
[p
->ring
], 3);
150 radeon_semaphore_emit_wait(p
->rdev
, p
->ring
, p
->ib
->fence
->semaphore
);
151 radeon_ring_unlock_commit(p
->rdev
, &p
->rdev
->ring
[p
->ring
]);
156 int radeon_cs_parser_init(struct radeon_cs_parser
*p
, void *data
)
158 struct drm_radeon_cs
*cs
= data
;
159 uint64_t *chunk_array_ptr
;
161 u32 ring
= RADEON_CS_RING_GFX
;
164 if (!cs
->num_chunks
) {
168 INIT_LIST_HEAD(&p
->validated
);
170 p
->chunk_ib_idx
= -1;
171 p
->chunk_relocs_idx
= -1;
172 p
->chunk_flags_idx
= -1;
173 p
->chunk_const_ib_idx
= -1;
174 p
->chunks_array
= kcalloc(cs
->num_chunks
, sizeof(uint64_t), GFP_KERNEL
);
175 if (p
->chunks_array
== NULL
) {
178 chunk_array_ptr
= (uint64_t *)(unsigned long)(cs
->chunks
);
179 if (DRM_COPY_FROM_USER(p
->chunks_array
, chunk_array_ptr
,
180 sizeof(uint64_t)*cs
->num_chunks
)) {
184 p
->nchunks
= cs
->num_chunks
;
185 p
->chunks
= kcalloc(p
->nchunks
, sizeof(struct radeon_cs_chunk
), GFP_KERNEL
);
186 if (p
->chunks
== NULL
) {
189 for (i
= 0; i
< p
->nchunks
; i
++) {
190 struct drm_radeon_cs_chunk __user
**chunk_ptr
= NULL
;
191 struct drm_radeon_cs_chunk user_chunk
;
192 uint32_t __user
*cdata
;
194 chunk_ptr
= (void __user
*)(unsigned long)p
->chunks_array
[i
];
195 if (DRM_COPY_FROM_USER(&user_chunk
, chunk_ptr
,
196 sizeof(struct drm_radeon_cs_chunk
))) {
199 p
->chunks
[i
].length_dw
= user_chunk
.length_dw
;
200 p
->chunks
[i
].kdata
= NULL
;
201 p
->chunks
[i
].chunk_id
= user_chunk
.chunk_id
;
203 if (p
->chunks
[i
].chunk_id
== RADEON_CHUNK_ID_RELOCS
) {
204 p
->chunk_relocs_idx
= i
;
206 if (p
->chunks
[i
].chunk_id
== RADEON_CHUNK_ID_IB
) {
208 /* zero length IB isn't useful */
209 if (p
->chunks
[i
].length_dw
== 0)
212 if (p
->chunks
[i
].chunk_id
== RADEON_CHUNK_ID_CONST_IB
) {
213 p
->chunk_const_ib_idx
= i
;
214 /* zero length CONST IB isn't useful */
215 if (p
->chunks
[i
].length_dw
== 0)
218 if (p
->chunks
[i
].chunk_id
== RADEON_CHUNK_ID_FLAGS
) {
219 p
->chunk_flags_idx
= i
;
220 /* zero length flags aren't useful */
221 if (p
->chunks
[i
].length_dw
== 0)
225 p
->chunks
[i
].length_dw
= user_chunk
.length_dw
;
226 p
->chunks
[i
].user_ptr
= (void __user
*)(unsigned long)user_chunk
.chunk_data
;
228 cdata
= (uint32_t *)(unsigned long)user_chunk
.chunk_data
;
229 if ((p
->chunks
[i
].chunk_id
== RADEON_CHUNK_ID_RELOCS
) ||
230 (p
->chunks
[i
].chunk_id
== RADEON_CHUNK_ID_FLAGS
)) {
231 size
= p
->chunks
[i
].length_dw
* sizeof(uint32_t);
232 p
->chunks
[i
].kdata
= kmalloc(size
, GFP_KERNEL
);
233 if (p
->chunks
[i
].kdata
== NULL
) {
236 if (DRM_COPY_FROM_USER(p
->chunks
[i
].kdata
,
237 p
->chunks
[i
].user_ptr
, size
)) {
240 if (p
->chunks
[i
].chunk_id
== RADEON_CHUNK_ID_FLAGS
) {
241 p
->cs_flags
= p
->chunks
[i
].kdata
[0];
242 if (p
->chunks
[i
].length_dw
> 1)
243 ring
= p
->chunks
[i
].kdata
[1];
244 if (p
->chunks
[i
].length_dw
> 2)
245 priority
= (s32
)p
->chunks
[i
].kdata
[2];
250 if ((p
->cs_flags
& RADEON_CS_USE_VM
) &&
251 !p
->rdev
->vm_manager
.enabled
) {
252 DRM_ERROR("VM not active on asic!\n");
256 /* we only support VM on SI+ */
257 if ((p
->rdev
->family
>= CHIP_TAHITI
) &&
258 ((p
->cs_flags
& RADEON_CS_USE_VM
) == 0)) {
259 DRM_ERROR("VM required on SI+!\n");
263 if (radeon_cs_get_ring(p
, ring
, priority
))
267 /* deal with non-vm */
268 if ((p
->chunk_ib_idx
!= -1) &&
269 ((p
->cs_flags
& RADEON_CS_USE_VM
) == 0) &&
270 (p
->chunks
[p
->chunk_ib_idx
].chunk_id
== RADEON_CHUNK_ID_IB
)) {
271 if (p
->chunks
[p
->chunk_ib_idx
].length_dw
> (16 * 1024)) {
272 DRM_ERROR("cs IB too big: %d\n",
273 p
->chunks
[p
->chunk_ib_idx
].length_dw
);
276 p
->chunks
[p
->chunk_ib_idx
].kpage
[0] = kmalloc(PAGE_SIZE
, GFP_KERNEL
);
277 p
->chunks
[p
->chunk_ib_idx
].kpage
[1] = kmalloc(PAGE_SIZE
, GFP_KERNEL
);
278 if (p
->chunks
[p
->chunk_ib_idx
].kpage
[0] == NULL
||
279 p
->chunks
[p
->chunk_ib_idx
].kpage
[1] == NULL
)
281 p
->chunks
[p
->chunk_ib_idx
].kpage_idx
[0] = -1;
282 p
->chunks
[p
->chunk_ib_idx
].kpage_idx
[1] = -1;
283 p
->chunks
[p
->chunk_ib_idx
].last_copied_page
= -1;
284 p
->chunks
[p
->chunk_ib_idx
].last_page_index
=
285 ((p
->chunks
[p
->chunk_ib_idx
].length_dw
* 4) - 1) / PAGE_SIZE
;
292 * cs_parser_fini() - clean parser states
293 * @parser: parser structure holding parsing context.
294 * @error: error number
296 * If error is set than unvalidate buffer, otherwise just free memory
297 * used by parsing context.
299 static void radeon_cs_parser_fini(struct radeon_cs_parser
*parser
, int error
)
304 if (!error
&& parser
->ib
)
305 ttm_eu_fence_buffer_objects(&parser
->validated
,
308 ttm_eu_backoff_reservation(&parser
->validated
);
310 if (parser
->relocs
!= NULL
) {
311 for (i
= 0; i
< parser
->nrelocs
; i
++) {
312 if (parser
->relocs
[i
].gobj
)
313 drm_gem_object_unreference_unlocked(parser
->relocs
[i
].gobj
);
316 kfree(parser
->track
);
317 kfree(parser
->relocs
);
318 kfree(parser
->relocs_ptr
);
319 for (i
= 0; i
< parser
->nchunks
; i
++) {
320 kfree(parser
->chunks
[i
].kdata
);
321 kfree(parser
->chunks
[i
].kpage
[0]);
322 kfree(parser
->chunks
[i
].kpage
[1]);
324 kfree(parser
->chunks
);
325 kfree(parser
->chunks_array
);
326 radeon_ib_free(parser
->rdev
, &parser
->ib
);
329 static int radeon_cs_ib_chunk(struct radeon_device
*rdev
,
330 struct radeon_cs_parser
*parser
)
332 struct radeon_cs_chunk
*ib_chunk
;
335 if (parser
->chunk_ib_idx
== -1)
338 if (parser
->cs_flags
& RADEON_CS_USE_VM
)
341 ib_chunk
= &parser
->chunks
[parser
->chunk_ib_idx
];
342 /* Copy the packet into the IB, the parser will read from the
343 * input memory (cached) and write to the IB (which can be
346 r
= radeon_ib_get(rdev
, parser
->ring
, &parser
->ib
,
347 ib_chunk
->length_dw
* 4);
349 DRM_ERROR("Failed to get ib !\n");
352 parser
->ib
->length_dw
= ib_chunk
->length_dw
;
353 r
= radeon_cs_parse(rdev
, parser
->ring
, parser
);
354 if (r
|| parser
->parser_error
) {
355 DRM_ERROR("Invalid command stream !\n");
358 r
= radeon_cs_finish_pages(parser
);
360 DRM_ERROR("Invalid command stream !\n");
363 r
= radeon_cs_sync_rings(parser
);
365 DRM_ERROR("Failed to synchronize rings !\n");
367 parser
->ib
->vm_id
= 0;
368 r
= radeon_ib_schedule(rdev
, parser
->ib
);
370 DRM_ERROR("Failed to schedule IB !\n");
375 static int radeon_bo_vm_update_pte(struct radeon_cs_parser
*parser
,
376 struct radeon_vm
*vm
)
378 struct radeon_bo_list
*lobj
;
379 struct radeon_bo
*bo
;
382 list_for_each_entry(lobj
, &parser
->validated
, tv
.head
) {
384 r
= radeon_vm_bo_update_pte(parser
->rdev
, vm
, bo
, &bo
->tbo
.mem
);
392 static int radeon_cs_ib_vm_chunk(struct radeon_device
*rdev
,
393 struct radeon_cs_parser
*parser
)
395 struct radeon_cs_chunk
*ib_chunk
;
396 struct radeon_fpriv
*fpriv
= parser
->filp
->driver_priv
;
397 struct radeon_vm
*vm
= &fpriv
->vm
;
400 if (parser
->chunk_ib_idx
== -1)
403 if ((parser
->cs_flags
& RADEON_CS_USE_VM
) == 0)
406 if ((rdev
->family
>= CHIP_TAHITI
) &&
407 (parser
->chunk_const_ib_idx
!= -1)) {
408 ib_chunk
= &parser
->chunks
[parser
->chunk_const_ib_idx
];
409 if (ib_chunk
->length_dw
> RADEON_IB_VM_MAX_SIZE
) {
410 DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk
->length_dw
);
413 r
= radeon_ib_get(rdev
, parser
->ring
, &parser
->const_ib
,
414 ib_chunk
->length_dw
* 4);
416 DRM_ERROR("Failed to get const ib !\n");
419 parser
->const_ib
->is_const_ib
= true;
420 parser
->const_ib
->length_dw
= ib_chunk
->length_dw
;
421 /* Copy the packet into the IB */
422 if (DRM_COPY_FROM_USER(parser
->const_ib
->ptr
, ib_chunk
->user_ptr
,
423 ib_chunk
->length_dw
* 4)) {
426 r
= radeon_ring_ib_parse(rdev
, parser
->ring
, parser
->const_ib
);
432 ib_chunk
= &parser
->chunks
[parser
->chunk_ib_idx
];
433 if (ib_chunk
->length_dw
> RADEON_IB_VM_MAX_SIZE
) {
434 DRM_ERROR("cs IB too big: %d\n", ib_chunk
->length_dw
);
437 r
= radeon_ib_get(rdev
, parser
->ring
, &parser
->ib
,
438 ib_chunk
->length_dw
* 4);
440 DRM_ERROR("Failed to get ib !\n");
443 parser
->ib
->length_dw
= ib_chunk
->length_dw
;
444 /* Copy the packet into the IB */
445 if (DRM_COPY_FROM_USER(parser
->ib
->ptr
, ib_chunk
->user_ptr
,
446 ib_chunk
->length_dw
* 4)) {
449 r
= radeon_ring_ib_parse(rdev
, parser
->ring
, parser
->ib
);
454 mutex_lock(&vm
->mutex
);
455 r
= radeon_vm_bind(rdev
, vm
);
459 r
= radeon_bo_vm_update_pte(parser
, vm
);
463 r
= radeon_cs_sync_rings(parser
);
465 DRM_ERROR("Failed to synchronize rings !\n");
468 if ((rdev
->family
>= CHIP_TAHITI
) &&
469 (parser
->chunk_const_ib_idx
!= -1)) {
470 parser
->const_ib
->vm_id
= vm
->id
;
471 /* ib pool is bind at 0 in virtual address space to gpu_addr is the
472 * offset inside the pool bo
474 parser
->const_ib
->gpu_addr
= parser
->const_ib
->sa_bo
.offset
;
475 r
= radeon_ib_schedule(rdev
, parser
->const_ib
);
480 parser
->ib
->vm_id
= vm
->id
;
481 /* ib pool is bind at 0 in virtual address space to gpu_addr is the
482 * offset inside the pool bo
484 parser
->ib
->gpu_addr
= parser
->ib
->sa_bo
.offset
;
485 parser
->ib
->is_const_ib
= false;
486 r
= radeon_ib_schedule(rdev
, parser
->ib
);
490 radeon_fence_unref(&vm
->fence
);
492 vm
->fence
= radeon_fence_ref(parser
->ib
->fence
);
494 mutex_unlock(&fpriv
->vm
.mutex
);
498 int radeon_cs_ioctl(struct drm_device
*dev
, void *data
, struct drm_file
*filp
)
500 struct radeon_device
*rdev
= dev
->dev_private
;
501 struct radeon_cs_parser parser
;
504 radeon_mutex_lock(&rdev
->cs_mutex
);
505 if (!rdev
->accel_working
) {
506 radeon_mutex_unlock(&rdev
->cs_mutex
);
509 /* initialize parser */
510 memset(&parser
, 0, sizeof(struct radeon_cs_parser
));
513 parser
.dev
= rdev
->dev
;
514 parser
.family
= rdev
->family
;
515 r
= radeon_cs_parser_init(&parser
, data
);
517 DRM_ERROR("Failed to initialize parser !\n");
518 radeon_cs_parser_fini(&parser
, r
);
519 radeon_mutex_unlock(&rdev
->cs_mutex
);
522 r
= radeon_cs_parser_relocs(&parser
);
524 if (r
!= -ERESTARTSYS
)
525 DRM_ERROR("Failed to parse relocation %d!\n", r
);
526 radeon_cs_parser_fini(&parser
, r
);
527 radeon_mutex_unlock(&rdev
->cs_mutex
);
530 r
= radeon_cs_ib_chunk(rdev
, &parser
);
534 r
= radeon_cs_ib_vm_chunk(rdev
, &parser
);
539 radeon_cs_parser_fini(&parser
, r
);
540 radeon_mutex_unlock(&rdev
->cs_mutex
);
544 int radeon_cs_finish_pages(struct radeon_cs_parser
*p
)
546 struct radeon_cs_chunk
*ibc
= &p
->chunks
[p
->chunk_ib_idx
];
548 int size
= PAGE_SIZE
;
550 for (i
= ibc
->last_copied_page
+ 1; i
<= ibc
->last_page_index
; i
++) {
551 if (i
== ibc
->last_page_index
) {
552 size
= (ibc
->length_dw
* 4) % PAGE_SIZE
;
557 if (DRM_COPY_FROM_USER(p
->ib
->ptr
+ (i
* (PAGE_SIZE
/4)),
558 ibc
->user_ptr
+ (i
* PAGE_SIZE
),
565 int radeon_cs_update_pages(struct radeon_cs_parser
*p
, int pg_idx
)
568 struct radeon_cs_chunk
*ibc
= &p
->chunks
[p
->chunk_ib_idx
];
570 int size
= PAGE_SIZE
;
572 for (i
= ibc
->last_copied_page
+ 1; i
< pg_idx
; i
++) {
573 if (DRM_COPY_FROM_USER(p
->ib
->ptr
+ (i
* (PAGE_SIZE
/4)),
574 ibc
->user_ptr
+ (i
* PAGE_SIZE
),
576 p
->parser_error
= -EFAULT
;
581 new_page
= ibc
->kpage_idx
[0] < ibc
->kpage_idx
[1] ? 0 : 1;
583 if (pg_idx
== ibc
->last_page_index
) {
584 size
= (ibc
->length_dw
* 4) % PAGE_SIZE
;
589 if (DRM_COPY_FROM_USER(ibc
->kpage
[new_page
],
590 ibc
->user_ptr
+ (pg_idx
* PAGE_SIZE
),
592 p
->parser_error
= -EFAULT
;
596 /* copy to IB here */
597 memcpy((void *)(p
->ib
->ptr
+(pg_idx
*(PAGE_SIZE
/4))), ibc
->kpage
[new_page
], size
);
599 ibc
->last_copied_page
= pg_idx
;
600 ibc
->kpage_idx
[new_page
] = pg_idx
;