drivers/gpu/drm/radeon/radeon_drv.c

   1 /**
   2  * \file radeon_drv.c
   3  * ATI Radeon driver
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  10  * All Rights Reserved.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a
  13  * copy of this software and associated documentation files (the "Software"),
  14  * to deal in the Software without restriction, including without limitation
  15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  16  * and/or sell copies of the Software, and to permit persons to whom the
  17  * Software is furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice (including the next
  20  * paragraph) shall be included in all copies or substantial portions of the
  21  * Software.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  29  * OTHER DEALINGS IN THE SOFTWARE.
  30  */
  31
  32 #include <drm/drmP.h>
  33 #include <drm/radeon_drm.h>
  34 #include "radeon_drv.h"
  35
  36 #include <drm/drm_pciids.h>
  37 #include <linux/console.h>
  38 #include <linux/module.h>
  39 #include <linux/pm_runtime.h>
  40 #include <linux/vga_switcheroo.h>
  41 #include <drm/drm_gem.h>
  42
  43 #include "drm_crtc_helper.h"
  44 /*
  45  * KMS wrapper.
  46  * - 2.0.0 - initial interface
  47  * - 2.1.0 - add square tiling interface
  48  * - 2.2.0 - add r6xx/r7xx const buffer support
  49  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  50  * - 2.4.0 - add crtc id query
  51  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  52  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  53  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  54  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  55  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  56  *   2.10.0 - fusion 2D tiling
  57  *   2.11.0 - backend map, initial compute support for the CS checker
  58  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  59  *   2.13.0 - virtual memory support, streamout
  60  *   2.14.0 - add evergreen tiling informations
  61  *   2.15.0 - add max_pipes query
  62  *   2.16.0 - fix evergreen 2D tiled surface calculation
  63  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  64  *   2.18.0 - r600-eg: allow "invalid" DB formats
  65  *   2.19.0 - r600-eg: MSAA textures
  66  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  67  *   2.21.0 - r600-r700: FMASK and CMASK
  68  *   2.22.0 - r600 only: RESOLVE_BOX allowed
  69  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  70  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  71  *   2.25.0 - eg+: new info request for num SE and num SH
  72  *   2.26.0 - r600-eg: fix htile size computation
  73  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
  74  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
  75  *   2.29.0 - R500 FP16 color clear registers
  76  *   2.30.0 - fix for FMASK texturing
  77  *   2.31.0 - Add fastfb support for rs690
  78  *   2.32.0 - new info request for rings working
  79  *   2.33.0 - Add SI tiling mode array query
  80  *   2.34.0 - Add CIK tiling mode array query
  81  *   2.35.0 - Add CIK macrotile mode array query
  82  *   2.36.0 - Fix CIK DCE tiling setup
  83  *   2.37.0 - allow GS ring setup on r6xx/r7xx
  84  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
  85  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
  86  *   2.39.0 - Add INFO query for number of active CUs
  87  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
  88  *            CS to GPU
  89  */
  90 #define KMS_DRIVER_MAJOR        2
  91 #define KMS_DRIVER_MINOR        40
  92 #define KMS_DRIVER_PATCHLEVEL   0
  93 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
  94 int radeon_driver_unload_kms(struct drm_device *dev);
  95 void radeon_driver_lastclose_kms(struct drm_device *dev);
  96 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
  97 void radeon_driver_postclose_kms(struct drm_device *dev,
  98                                  struct drm_file *file_priv);
  99 void radeon_driver_preclose_kms(struct drm_device *dev,
 100                                 struct drm_file *file_priv);
 101 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
 102 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
 103 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
 104 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
 105 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
 106 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
 107                                     int *max_error,
 108                                     struct timeval *vblank_time,
 109                                     unsigned flags);
 110 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
 111 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
 112 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
 113 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
 114 void radeon_gem_object_free(struct drm_gem_object *obj);
 115 int radeon_gem_object_open(struct drm_gem_object *obj,
 116                                 struct drm_file *file_priv);
 117 void radeon_gem_object_close(struct drm_gem_object *obj,
 118                                 struct drm_file *file_priv);
 119 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
 120                                         struct drm_gem_object *gobj,
 121                                         int flags);
 122 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
 123                                       unsigned int flags,
 124                                       int *vpos, int *hpos, ktime_t *stime,
 125                                       ktime_t *etime);
 126 extern bool radeon_is_px(struct drm_device *dev);
 127 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
 128 extern int radeon_max_kms_ioctl;
 129 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
 130 int radeon_mode_dumb_mmap(struct drm_file *filp,
 131                           struct drm_device *dev,
 132                           uint32_t handle, uint64_t *offset_p);
 133 int radeon_mode_dumb_create(struct drm_file *file_priv,
 134                             struct drm_device *dev,
 135                             struct drm_mode_create_dumb *args);
 136 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
 137 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
 138                                                         size_t size,
 139                                                         struct sg_table *sg);
 140 int radeon_gem_prime_pin(struct drm_gem_object *obj);
 141 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
 142 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
 143 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
 144 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 145 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
 146                                     unsigned long arg);
 147
 148 #if defined(CONFIG_DEBUG_FS)
 149 int radeon_debugfs_init(struct drm_minor *minor);
 150 void radeon_debugfs_cleanup(struct drm_minor *minor);
 151 #endif
 152
 153 /* atpx handler */
 154 #if defined(CONFIG_VGA_SWITCHEROO)
 155 void radeon_register_atpx_handler(void);
 156 void radeon_unregister_atpx_handler(void);
 157 #else
 158 static inline void radeon_register_atpx_handler(void) {}
 159 static inline void radeon_unregister_atpx_handler(void) {}
 160 #endif
 161
 162 int radeon_no_wb;
 163 int radeon_modeset = -1;
 164 int radeon_dynclks = -1;
 165 int radeon_r4xx_atom = 0;
 166 int radeon_agpmode = 0;
 167 int radeon_vram_limit = 0;
 168 int radeon_gart_size = -1; /* auto */
 169 int radeon_benchmarking = 0;
 170 int radeon_testing = 0;
 171 int radeon_connector_table = 0;
 172 int radeon_tv = 1;
 173 int radeon_audio = -1;
 174 int radeon_disp_priority = 0;
 175 int radeon_hw_i2c = 0;
 176 int radeon_pcie_gen2 = -1;
 177 int radeon_msi = -1;
 178 int radeon_lockup_timeout = 10000;
 179 int radeon_fastfb = 0;
 180 int radeon_dpm = -1;
 181 int radeon_aspm = -1;
 182 int radeon_runtime_pm = -1;
 183 int radeon_hard_reset = 0;
 184 int radeon_vm_size = 8;
 185 int radeon_vm_block_size = -1;
 186 int radeon_deep_color = 0;
 187 int radeon_use_pflipirq = 2;
 188 int radeon_bapm = -1;
 189
 190 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 191 module_param_named(no_wb, radeon_no_wb, int, 0444);
 192
 193 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
 194 module_param_named(modeset, radeon_modeset, int, 0400);
 195
 196 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
 197 module_param_named(dynclks, radeon_dynclks, int, 0444);
 198
 199 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
 200 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
 201
 202 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 203 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
 204
 205 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
 206 module_param_named(agpmode, radeon_agpmode, int, 0444);
 207
 208 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
 209 module_param_named(gartsize, radeon_gart_size, int, 0600);
 210
 211 MODULE_PARM_DESC(benchmark, "Run benchmark");
 212 module_param_named(benchmark, radeon_benchmarking, int, 0444);
 213
 214 MODULE_PARM_DESC(test, "Run tests");
 215 module_param_named(test, radeon_testing, int, 0444);
 216
 217 MODULE_PARM_DESC(connector_table, "Force connector table");
 218 module_param_named(connector_table, radeon_connector_table, int, 0444);
 219
 220 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
 221 module_param_named(tv, radeon_tv, int, 0444);
 222
 223 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
 224 module_param_named(audio, radeon_audio, int, 0444);
 225
 226 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
 227 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
 228
 229 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
 230 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
 231
 232 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
 233 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
 234
 235 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
 236 module_param_named(msi, radeon_msi, int, 0444);
 237
 238 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
 239 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
 240
 241 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
 242 module_param_named(fastfb, radeon_fastfb, int, 0444);
 243
 244 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
 245 module_param_named(dpm, radeon_dpm, int, 0444);
 246
 247 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
 248 module_param_named(aspm, radeon_aspm, int, 0444);
 249
 250 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
 251 module_param_named(runpm, radeon_runtime_pm, int, 0444);
 252
 253 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
 254 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
 255
 256 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
 257 module_param_named(vm_size, radeon_vm_size, int, 0444);
 258
 259 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
 260 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
 261
 262 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
 263 module_param_named(deep_color, radeon_deep_color, int, 0444);
 264
 265 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
 266 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
 267
 268 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
 269 module_param_named(bapm, radeon_bapm, int, 0444);
 270
 271 static struct pci_device_id pciidlist[] = {
 272         radeon_PCI_IDS
 273 };
 274
 275 MODULE_DEVICE_TABLE(pci, pciidlist);
 276
 277 #ifdef CONFIG_DRM_RADEON_UMS
 278
 279 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
 280 {
 281         drm_radeon_private_t *dev_priv = dev->dev_private;
 282
 283         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
 284                 return 0;
 285
 286         /* Disable *all* interrupts */
 287         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 288                 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
 289         RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
 290         return 0;
 291 }
 292
 293 static int radeon_resume(struct drm_device *dev)
 294 {
 295         drm_radeon_private_t *dev_priv = dev->dev_private;
 296
 297         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
 298                 return 0;
 299
 300         /* Restore interrupt registers */
 301         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 302                 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
 303         RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
 304         return 0;
 305 }
 306
 307
 308 static const struct file_operations radeon_driver_old_fops = {
 309         .owner = THIS_MODULE,
 310         .open = drm_open,
 311         .release = drm_release,
 312         .unlocked_ioctl = drm_ioctl,
 313         .mmap = drm_legacy_mmap,
 314         .poll = drm_poll,
 315         .read = drm_read,
 316 #ifdef CONFIG_COMPAT
 317         .compat_ioctl = radeon_compat_ioctl,
 318 #endif
 319         .llseek = noop_llseek,
 320 };
 321
 322 static struct drm_driver driver_old = {
 323         .driver_features =
 324             DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
 325             DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
 326         .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
 327         .load = radeon_driver_load,
 328         .firstopen = radeon_driver_firstopen,
 329         .open = radeon_driver_open,
 330         .preclose = radeon_driver_preclose,
 331         .postclose = radeon_driver_postclose,
 332         .lastclose = radeon_driver_lastclose,
 333         .set_busid = drm_pci_set_busid,
 334         .unload = radeon_driver_unload,
 335         .suspend = radeon_suspend,
 336         .resume = radeon_resume,
 337         .get_vblank_counter = radeon_get_vblank_counter,
 338         .enable_vblank = radeon_enable_vblank,
 339         .disable_vblank = radeon_disable_vblank,
 340         .master_create = radeon_master_create,
 341         .master_destroy = radeon_master_destroy,
 342         .irq_preinstall = radeon_driver_irq_preinstall,
 343         .irq_postinstall = radeon_driver_irq_postinstall,
 344         .irq_uninstall = radeon_driver_irq_uninstall,
 345         .irq_handler = radeon_driver_irq_handler,
 346         .ioctls = radeon_ioctls,
 347         .dma_ioctl = radeon_cp_buffers,
 348         .fops = &radeon_driver_old_fops,
 349         .name = DRIVER_NAME,
 350         .desc = DRIVER_DESC,
 351         .date = DRIVER_DATE,
 352         .major = DRIVER_MAJOR,
 353         .minor = DRIVER_MINOR,
 354         .patchlevel = DRIVER_PATCHLEVEL,
 355 };
 356
 357 #endif
 358
 359 static struct drm_driver kms_driver;
 360
 361 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
 362 {
 363         struct apertures_struct *ap;
 364         bool primary = false;
 365
 366         ap = alloc_apertures(1);
 367         if (!ap)
 368                 return -ENOMEM;
 369
 370         ap->ranges[0].base = pci_resource_start(pdev, 0);
 371         ap->ranges[0].size = pci_resource_len(pdev, 0);
 372
 373 #ifdef CONFIG_X86
 374         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
 375 #endif
 376         remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
 377         kfree(ap);
 378
 379         return 0;
 380 }
 381
 382 static int radeon_pci_probe(struct pci_dev *pdev,
 383                             const struct pci_device_id *ent)
 384 {
 385         int ret;
 386
 387         /* Get rid of things like offb */
 388         ret = radeon_kick_out_firmware_fb(pdev);
 389         if (ret)
 390                 return ret;
 391
 392         return drm_get_pci_dev(pdev, ent, &kms_driver);
 393 }
 394
 395 static void
 396 radeon_pci_remove(struct pci_dev *pdev)
 397 {
 398         struct drm_device *dev = pci_get_drvdata(pdev);
 399
 400         drm_put_dev(dev);
 401 }
 402
 403 static int radeon_pmops_suspend(struct device *dev)
 404 {
 405         struct pci_dev *pdev = to_pci_dev(dev);
 406         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 407         return radeon_suspend_kms(drm_dev, true, true);
 408 }
 409
 410 static int radeon_pmops_resume(struct device *dev)
 411 {
 412         struct pci_dev *pdev = to_pci_dev(dev);
 413         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 414         return radeon_resume_kms(drm_dev, true, true);
 415 }
 416
 417 static int radeon_pmops_freeze(struct device *dev)
 418 {
 419         struct pci_dev *pdev = to_pci_dev(dev);
 420         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 421         return radeon_suspend_kms(drm_dev, false, true);
 422 }
 423
 424 static int radeon_pmops_thaw(struct device *dev)
 425 {
 426         struct pci_dev *pdev = to_pci_dev(dev);
 427         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 428         return radeon_resume_kms(drm_dev, false, true);
 429 }
 430
 431 static int radeon_pmops_runtime_suspend(struct device *dev)
 432 {
 433         struct pci_dev *pdev = to_pci_dev(dev);
 434         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 435         int ret;
 436
 437         if (!radeon_is_px(drm_dev)) {
 438                 pm_runtime_forbid(dev);
 439                 return -EBUSY;
 440         }
 441
 442         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 443         drm_kms_helper_poll_disable(drm_dev);
 444         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
 445
 446         ret = radeon_suspend_kms(drm_dev, false, false);
 447         pci_save_state(pdev);
 448         pci_disable_device(pdev);
 449         pci_set_power_state(pdev, PCI_D3cold);
 450         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
 451
 452         return 0;
 453 }
 454
 455 static int radeon_pmops_runtime_resume(struct device *dev)
 456 {
 457         struct pci_dev *pdev = to_pci_dev(dev);
 458         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 459         int ret;
 460
 461         if (!radeon_is_px(drm_dev))
 462                 return -EINVAL;
 463
 464         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 465
 466         pci_set_power_state(pdev, PCI_D0);
 467         pci_restore_state(pdev);
 468         ret = pci_enable_device(pdev);
 469         if (ret)
 470                 return ret;
 471         pci_set_master(pdev);
 472
 473         ret = radeon_resume_kms(drm_dev, false, false);
 474         drm_kms_helper_poll_enable(drm_dev);
 475         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
 476         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
 477         return 0;
 478 }
 479
 480 static int radeon_pmops_runtime_idle(struct device *dev)
 481 {
 482         struct pci_dev *pdev = to_pci_dev(dev);
 483         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 484         struct drm_crtc *crtc;
 485
 486         if (!radeon_is_px(drm_dev)) {
 487                 pm_runtime_forbid(dev);
 488                 return -EBUSY;
 489         }
 490
 491         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
 492                 if (crtc->enabled) {
 493                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
 494                         return -EBUSY;
 495                 }
 496         }
 497
 498         pm_runtime_mark_last_busy(dev);
 499         pm_runtime_autosuspend(dev);
 500         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
 501         return 1;
 502 }
 503
 504 long radeon_drm_ioctl(struct file *filp,
 505                       unsigned int cmd, unsigned long arg)
 506 {
 507         struct drm_file *file_priv = filp->private_data;
 508         struct drm_device *dev;
 509         long ret;
 510         dev = file_priv->minor->dev;
 511         ret = pm_runtime_get_sync(dev->dev);
 512         if (ret < 0)
 513                 return ret;
 514
 515         ret = drm_ioctl(filp, cmd, arg);
 516
 517         pm_runtime_mark_last_busy(dev->dev);
 518         pm_runtime_put_autosuspend(dev->dev);
 519         return ret;
 520 }
 521
 522 static const struct dev_pm_ops radeon_pm_ops = {
 523         .suspend = radeon_pmops_suspend,
 524         .resume = radeon_pmops_resume,
 525         .freeze = radeon_pmops_freeze,
 526         .thaw = radeon_pmops_thaw,
 527         .poweroff = radeon_pmops_freeze,
 528         .restore = radeon_pmops_resume,
 529         .runtime_suspend = radeon_pmops_runtime_suspend,
 530         .runtime_resume = radeon_pmops_runtime_resume,
 531         .runtime_idle = radeon_pmops_runtime_idle,
 532 };
 533
 534 static const struct file_operations radeon_driver_kms_fops = {
 535         .owner = THIS_MODULE,
 536         .open = drm_open,
 537         .release = drm_release,
 538         .unlocked_ioctl = radeon_drm_ioctl,
 539         .mmap = radeon_mmap,
 540         .poll = drm_poll,
 541         .read = drm_read,
 542 #ifdef CONFIG_COMPAT
 543         .compat_ioctl = radeon_kms_compat_ioctl,
 544 #endif
 545 };
 546
 547 static struct drm_driver kms_driver = {
 548         .driver_features =
 549             DRIVER_USE_AGP |
 550             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
 551             DRIVER_PRIME | DRIVER_RENDER,
 552         .load = radeon_driver_load_kms,
 553         .open = radeon_driver_open_kms,
 554         .preclose = radeon_driver_preclose_kms,
 555         .postclose = radeon_driver_postclose_kms,
 556         .lastclose = radeon_driver_lastclose_kms,
 557         .set_busid = drm_pci_set_busid,
 558         .unload = radeon_driver_unload_kms,
 559         .get_vblank_counter = radeon_get_vblank_counter_kms,
 560         .enable_vblank = radeon_enable_vblank_kms,
 561         .disable_vblank = radeon_disable_vblank_kms,
 562         .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
 563         .get_scanout_position = radeon_get_crtc_scanoutpos,
 564 #if defined(CONFIG_DEBUG_FS)
 565         .debugfs_init = radeon_debugfs_init,
 566         .debugfs_cleanup = radeon_debugfs_cleanup,
 567 #endif
 568         .irq_preinstall = radeon_driver_irq_preinstall_kms,
 569         .irq_postinstall = radeon_driver_irq_postinstall_kms,
 570         .irq_uninstall = radeon_driver_irq_uninstall_kms,
 571         .irq_handler = radeon_driver_irq_handler_kms,
 572         .ioctls = radeon_ioctls_kms,
 573         .gem_free_object = radeon_gem_object_free,
 574         .gem_open_object = radeon_gem_object_open,
 575         .gem_close_object = radeon_gem_object_close,
 576         .dumb_create = radeon_mode_dumb_create,
 577         .dumb_map_offset = radeon_mode_dumb_mmap,
 578         .dumb_destroy = drm_gem_dumb_destroy,
 579         .fops = &radeon_driver_kms_fops,
 580
 581         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 582         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 583         .gem_prime_export = radeon_gem_prime_export,
 584         .gem_prime_import = drm_gem_prime_import,
 585         .gem_prime_pin = radeon_gem_prime_pin,
 586         .gem_prime_unpin = radeon_gem_prime_unpin,
 587         .gem_prime_res_obj = radeon_gem_prime_res_obj,
 588         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
 589         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
 590         .gem_prime_vmap = radeon_gem_prime_vmap,
 591         .gem_prime_vunmap = radeon_gem_prime_vunmap,
 592
 593         .name = DRIVER_NAME,
 594         .desc = DRIVER_DESC,
 595         .date = DRIVER_DATE,
 596         .major = KMS_DRIVER_MAJOR,
 597         .minor = KMS_DRIVER_MINOR,
 598         .patchlevel = KMS_DRIVER_PATCHLEVEL,
 599 };
 600
 601 static struct drm_driver *driver;
 602 static struct pci_driver *pdriver;
 603
 604 #ifdef CONFIG_DRM_RADEON_UMS
 605 static struct pci_driver radeon_pci_driver = {
 606         .name = DRIVER_NAME,
 607         .id_table = pciidlist,
 608 };
 609 #endif
 610
 611 static struct pci_driver radeon_kms_pci_driver = {
 612         .name = DRIVER_NAME,
 613         .id_table = pciidlist,
 614         .probe = radeon_pci_probe,
 615         .remove = radeon_pci_remove,
 616         .driver.pm = &radeon_pm_ops,
 617 };
 618
 619 static int __init radeon_init(void)
 620 {
 621 #ifdef CONFIG_VGA_CONSOLE
 622         if (vgacon_text_force() && radeon_modeset == -1) {
 623                 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
 624                 radeon_modeset = 0;
 625         }
 626 #endif
 627         /* set to modesetting by default if not nomodeset */
 628         if (radeon_modeset == -1)
 629                 radeon_modeset = 1;
 630
 631         if (radeon_modeset == 1) {
 632                 DRM_INFO("radeon kernel modesetting enabled.\n");
 633                 driver = &kms_driver;
 634                 pdriver = &radeon_kms_pci_driver;
 635                 driver->driver_features |= DRIVER_MODESET;
 636                 driver->num_ioctls = radeon_max_kms_ioctl;
 637                 radeon_register_atpx_handler();
 638
 639         } else {
 640 #ifdef CONFIG_DRM_RADEON_UMS
 641                 DRM_INFO("radeon userspace modesetting enabled.\n");
 642                 driver = &driver_old;
 643                 pdriver = &radeon_pci_driver;
 644                 driver->driver_features &= ~DRIVER_MODESET;
 645                 driver->num_ioctls = radeon_max_ioctl;
 646 #else
 647                 DRM_ERROR("No UMS support in radeon module!\n");
 648                 return -EINVAL;
 649 #endif
 650         }
 651
 652         /* let modprobe override vga console setting */
 653         return drm_pci_init(driver, pdriver);
 654 }
 655
 656 static void __exit radeon_exit(void)
 657 {
 658         drm_pci_exit(driver, pdriver);
 659         radeon_unregister_atpx_handler();
 660 }
 661
 662 module_init(radeon_init);
 663 module_exit(radeon_exit);
 664
 665 MODULE_AUTHOR(DRIVER_AUTHOR);
 666 MODULE_DESCRIPTION(DRIVER_DESC);
 667 MODULE_LICENSE("GPL and additional rights");