d7bd46bd9067efb8a16caac79d6a9c6cb51dd71b
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include "radeon_drm.h"
31 #include "radeon_reg.h"
35 * The GART (Graphics Aperture Remapping Table) is an aperture
36 * in the GPU's address space. System pages can be mapped into
37 * the aperture and look like contiguous pages from the GPU's
38 * perspective. A page table maps the pages in the aperture
39 * to the actual backing pages in system memory.
41 * Radeon GPUs support both an internal GART, as described above,
42 * and AGP. AGP works similarly, but the GART table is configured
43 * and maintained by the northbridge rather than the driver.
44 * Radeon hw has a separate AGP aperture that is programmed to
45 * point to the AGP aperture provided by the northbridge and the
46 * requests are passed through to the northbridge aperture.
47 * Both AGP and internal GART can be used at the same time, however
48 * that is not currently supported by the driver.
50 * This file handles the common internal GART management.
54 * Common GART table functions.
57 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
59 * @rdev: radeon_device pointer
61 * Allocate system memory for GART page table
62 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
63 * gart table to be in system memory.
64 * Returns 0 for success, -ENOMEM for failure.
66 int radeon_gart_table_ram_alloc(struct radeon_device
*rdev
)
70 ptr
= pci_alloc_consistent(rdev
->pdev
, rdev
->gart
.table_size
,
71 &rdev
->gart
.table_addr
);
76 if (rdev
->family
== CHIP_RS400
|| rdev
->family
== CHIP_RS480
||
77 rdev
->family
== CHIP_RS690
|| rdev
->family
== CHIP_RS740
) {
78 set_memory_uc((unsigned long)ptr
,
79 rdev
->gart
.table_size
>> PAGE_SHIFT
);
83 memset((void *)rdev
->gart
.ptr
, 0, rdev
->gart
.table_size
);
88 * radeon_gart_table_ram_free - free system ram for gart page table
90 * @rdev: radeon_device pointer
92 * Free system memory for GART page table
93 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
94 * gart table to be in system memory.
96 void radeon_gart_table_ram_free(struct radeon_device
*rdev
)
98 if (rdev
->gart
.ptr
== NULL
) {
102 if (rdev
->family
== CHIP_RS400
|| rdev
->family
== CHIP_RS480
||
103 rdev
->family
== CHIP_RS690
|| rdev
->family
== CHIP_RS740
) {
104 set_memory_wb((unsigned long)rdev
->gart
.ptr
,
105 rdev
->gart
.table_size
>> PAGE_SHIFT
);
108 pci_free_consistent(rdev
->pdev
, rdev
->gart
.table_size
,
109 (void *)rdev
->gart
.ptr
,
110 rdev
->gart
.table_addr
);
111 rdev
->gart
.ptr
= NULL
;
112 rdev
->gart
.table_addr
= 0;
116 * radeon_gart_table_vram_alloc - allocate vram for gart page table
118 * @rdev: radeon_device pointer
120 * Allocate video memory for GART page table
121 * (pcie r4xx, r5xx+). These asics require the
122 * gart table to be in video memory.
123 * Returns 0 for success, error for failure.
125 int radeon_gart_table_vram_alloc(struct radeon_device
*rdev
)
129 if (rdev
->gart
.robj
== NULL
) {
130 r
= radeon_bo_create(rdev
, rdev
->gart
.table_size
,
131 PAGE_SIZE
, true, RADEON_GEM_DOMAIN_VRAM
,
132 NULL
, &rdev
->gart
.robj
);
141 * radeon_gart_table_vram_pin - pin gart page table in vram
143 * @rdev: radeon_device pointer
145 * Pin the GART page table in vram so it will not be moved
146 * by the memory manager (pcie r4xx, r5xx+). These asics require the
147 * gart table to be in video memory.
148 * Returns 0 for success, error for failure.
150 int radeon_gart_table_vram_pin(struct radeon_device
*rdev
)
155 r
= radeon_bo_reserve(rdev
->gart
.robj
, false);
156 if (unlikely(r
!= 0))
158 r
= radeon_bo_pin(rdev
->gart
.robj
,
159 RADEON_GEM_DOMAIN_VRAM
, &gpu_addr
);
161 radeon_bo_unreserve(rdev
->gart
.robj
);
164 r
= radeon_bo_kmap(rdev
->gart
.robj
, &rdev
->gart
.ptr
);
166 radeon_bo_unpin(rdev
->gart
.robj
);
167 radeon_bo_unreserve(rdev
->gart
.robj
);
168 rdev
->gart
.table_addr
= gpu_addr
;
173 * radeon_gart_table_vram_unpin - unpin gart page table in vram
175 * @rdev: radeon_device pointer
177 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
178 * These asics require the gart table to be in video memory.
180 void radeon_gart_table_vram_unpin(struct radeon_device
*rdev
)
184 if (rdev
->gart
.robj
== NULL
) {
187 r
= radeon_bo_reserve(rdev
->gart
.robj
, false);
188 if (likely(r
== 0)) {
189 radeon_bo_kunmap(rdev
->gart
.robj
);
190 radeon_bo_unpin(rdev
->gart
.robj
);
191 radeon_bo_unreserve(rdev
->gart
.robj
);
192 rdev
->gart
.ptr
= NULL
;
197 * radeon_gart_table_vram_free - free gart page table vram
199 * @rdev: radeon_device pointer
201 * Free the video memory used for the GART page table
202 * (pcie r4xx, r5xx+). These asics require the gart table to
203 * be in video memory.
205 void radeon_gart_table_vram_free(struct radeon_device
*rdev
)
207 if (rdev
->gart
.robj
== NULL
) {
210 radeon_gart_table_vram_unpin(rdev
);
211 radeon_bo_unref(&rdev
->gart
.robj
);
215 * Common gart functions.
218 * radeon_gart_unbind - unbind pages from the gart page table
220 * @rdev: radeon_device pointer
221 * @offset: offset into the GPU's gart aperture
222 * @pages: number of pages to unbind
224 * Unbinds the requested pages from the gart page table and
225 * replaces them with the dummy page (all asics).
227 void radeon_gart_unbind(struct radeon_device
*rdev
, unsigned offset
,
235 if (!rdev
->gart
.ready
) {
236 WARN(1, "trying to unbind memory from uninitialized GART !\n");
239 t
= offset
/ RADEON_GPU_PAGE_SIZE
;
240 p
= t
/ (PAGE_SIZE
/ RADEON_GPU_PAGE_SIZE
);
241 for (i
= 0; i
< pages
; i
++, p
++) {
242 if (rdev
->gart
.pages
[p
]) {
243 rdev
->gart
.pages
[p
] = NULL
;
244 rdev
->gart
.pages_addr
[p
] = rdev
->dummy_page
.addr
;
245 page_base
= rdev
->gart
.pages_addr
[p
];
246 for (j
= 0; j
< (PAGE_SIZE
/ RADEON_GPU_PAGE_SIZE
); j
++, t
++) {
247 if (rdev
->gart
.ptr
) {
248 radeon_gart_set_page(rdev
, t
, page_base
);
250 page_base
+= RADEON_GPU_PAGE_SIZE
;
255 radeon_gart_tlb_flush(rdev
);
259 * radeon_gart_bind - bind pages into the gart page table
261 * @rdev: radeon_device pointer
262 * @offset: offset into the GPU's gart aperture
263 * @pages: number of pages to bind
264 * @pagelist: pages to bind
265 * @dma_addr: DMA addresses of pages
267 * Binds the requested pages to the gart page table
269 * Returns 0 for success, -EINVAL for failure.
271 int radeon_gart_bind(struct radeon_device
*rdev
, unsigned offset
,
272 int pages
, struct page
**pagelist
, dma_addr_t
*dma_addr
)
279 if (!rdev
->gart
.ready
) {
280 WARN(1, "trying to bind memory to uninitialized GART !\n");
283 t
= offset
/ RADEON_GPU_PAGE_SIZE
;
284 p
= t
/ (PAGE_SIZE
/ RADEON_GPU_PAGE_SIZE
);
286 for (i
= 0; i
< pages
; i
++, p
++) {
287 rdev
->gart
.pages_addr
[p
] = dma_addr
[i
];
288 rdev
->gart
.pages
[p
] = pagelist
[i
];
289 if (rdev
->gart
.ptr
) {
290 page_base
= rdev
->gart
.pages_addr
[p
];
291 for (j
= 0; j
< (PAGE_SIZE
/ RADEON_GPU_PAGE_SIZE
); j
++, t
++) {
292 radeon_gart_set_page(rdev
, t
, page_base
);
293 page_base
+= RADEON_GPU_PAGE_SIZE
;
298 radeon_gart_tlb_flush(rdev
);
303 * radeon_gart_restore - bind all pages in the gart page table
305 * @rdev: radeon_device pointer
307 * Binds all pages in the gart page table (all asics).
308 * Used to rebuild the gart table on device startup or resume.
310 void radeon_gart_restore(struct radeon_device
*rdev
)
315 if (!rdev
->gart
.ptr
) {
318 for (i
= 0, t
= 0; i
< rdev
->gart
.num_cpu_pages
; i
++) {
319 page_base
= rdev
->gart
.pages_addr
[i
];
320 for (j
= 0; j
< (PAGE_SIZE
/ RADEON_GPU_PAGE_SIZE
); j
++, t
++) {
321 radeon_gart_set_page(rdev
, t
, page_base
);
322 page_base
+= RADEON_GPU_PAGE_SIZE
;
326 radeon_gart_tlb_flush(rdev
);
330 * radeon_gart_init - init the driver info for managing the gart
332 * @rdev: radeon_device pointer
334 * Allocate the dummy page and init the gart driver info (all asics).
335 * Returns 0 for success, error for failure.
337 int radeon_gart_init(struct radeon_device
*rdev
)
341 if (rdev
->gart
.pages
) {
344 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
345 if (PAGE_SIZE
< RADEON_GPU_PAGE_SIZE
) {
346 DRM_ERROR("Page size is smaller than GPU page size!\n");
349 r
= radeon_dummy_page_init(rdev
);
352 /* Compute table size */
353 rdev
->gart
.num_cpu_pages
= rdev
->mc
.gtt_size
/ PAGE_SIZE
;
354 rdev
->gart
.num_gpu_pages
= rdev
->mc
.gtt_size
/ RADEON_GPU_PAGE_SIZE
;
355 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
356 rdev
->gart
.num_cpu_pages
, rdev
->gart
.num_gpu_pages
);
357 /* Allocate pages table */
358 rdev
->gart
.pages
= kzalloc(sizeof(void *) * rdev
->gart
.num_cpu_pages
,
360 if (rdev
->gart
.pages
== NULL
) {
361 radeon_gart_fini(rdev
);
364 rdev
->gart
.pages_addr
= kzalloc(sizeof(dma_addr_t
) *
365 rdev
->gart
.num_cpu_pages
, GFP_KERNEL
);
366 if (rdev
->gart
.pages_addr
== NULL
) {
367 radeon_gart_fini(rdev
);
370 /* set GART entry to point to the dummy page by default */
371 for (i
= 0; i
< rdev
->gart
.num_cpu_pages
; i
++) {
372 rdev
->gart
.pages_addr
[i
] = rdev
->dummy_page
.addr
;
378 * radeon_gart_fini - tear down the driver info for managing the gart
380 * @rdev: radeon_device pointer
382 * Tear down the gart driver info and free the dummy page (all asics).
384 void radeon_gart_fini(struct radeon_device
*rdev
)
386 if (rdev
->gart
.pages
&& rdev
->gart
.pages_addr
&& rdev
->gart
.ready
) {
388 radeon_gart_unbind(rdev
, 0, rdev
->gart
.num_cpu_pages
);
390 rdev
->gart
.ready
= false;
391 kfree(rdev
->gart
.pages
);
392 kfree(rdev
->gart
.pages_addr
);
393 rdev
->gart
.pages
= NULL
;
394 rdev
->gart
.pages_addr
= NULL
;
396 radeon_dummy_page_fini(rdev
);
401 * GPUVM is similar to the legacy gart on older asics, however
402 * rather than there being a single global gart table
403 * for the entire GPU, there are multiple VM page tables active
404 * at any given time. The VM page tables can contain a mix
405 * vram pages and system memory pages and system memory pages
406 * can be mapped as snooped (cached system pages) or unsnooped
407 * (uncached system pages).
408 * Each VM has an ID associated with it and there is a page table
409 * associated with each VMID. When execting a command buffer,
410 * the kernel tells the the ring what VMID to use for that command
411 * buffer. VMIDs are allocated dynamically as commands are submitted.
412 * The userspace drivers maintain their own address space and the kernel
413 * sets up their pages tables accordingly when they submit their
414 * command buffers and a VMID is assigned.
415 * Cayman/Trinity support up to 8 active VMs at any given time;
422 * TODO bind a default page at vm initialization for default address
426 * radeon_vm_manager_init - init the vm manager
428 * @rdev: radeon_device pointer
430 * Init the vm manager (cayman+).
431 * Returns 0 for success, error for failure.
433 int radeon_vm_manager_init(struct radeon_device
*rdev
)
435 struct radeon_vm
*vm
;
436 struct radeon_bo_va
*bo_va
;
439 if (!rdev
->vm_manager
.enabled
) {
440 /* allocate enough for 2 full VM pts */
441 r
= radeon_sa_bo_manager_init(rdev
, &rdev
->vm_manager
.sa_manager
,
442 rdev
->vm_manager
.max_pfn
* 8 * 2,
443 RADEON_GEM_DOMAIN_VRAM
);
445 dev_err(rdev
->dev
, "failed to allocate vm bo (%dKB)\n",
446 (rdev
->vm_manager
.max_pfn
* 8) >> 10);
450 r
= radeon_asic_vm_init(rdev
);
454 rdev
->vm_manager
.enabled
= true;
456 r
= radeon_sa_bo_manager_start(rdev
, &rdev
->vm_manager
.sa_manager
);
461 /* restore page table */
462 list_for_each_entry(vm
, &rdev
->vm_manager
.lru_vm
, list
) {
463 if (vm
->sa_bo
== NULL
)
466 list_for_each_entry(bo_va
, &vm
->va
, vm_list
) {
467 bo_va
->valid
= false;
474 * radeon_vm_free_pt - free the page table for a specific vm
476 * @rdev: radeon_device pointer
479 * Free the page table of a specific vm (cayman+).
481 * Global and local mutex must be lock!
483 static void radeon_vm_free_pt(struct radeon_device
*rdev
,
484 struct radeon_vm
*vm
)
486 struct radeon_bo_va
*bo_va
;
491 list_del_init(&vm
->list
);
492 radeon_sa_bo_free(rdev
, &vm
->sa_bo
, vm
->fence
);
495 list_for_each_entry(bo_va
, &vm
->va
, vm_list
) {
496 bo_va
->valid
= false;
501 * radeon_vm_manager_fini - tear down the vm manager
503 * @rdev: radeon_device pointer
505 * Tear down the VM manager (cayman+).
507 void radeon_vm_manager_fini(struct radeon_device
*rdev
)
509 struct radeon_vm
*vm
, *tmp
;
512 if (!rdev
->vm_manager
.enabled
)
515 mutex_lock(&rdev
->vm_manager
.lock
);
516 /* free all allocated page tables */
517 list_for_each_entry_safe(vm
, tmp
, &rdev
->vm_manager
.lru_vm
, list
) {
518 mutex_lock(&vm
->mutex
);
519 radeon_vm_free_pt(rdev
, vm
);
520 mutex_unlock(&vm
->mutex
);
522 for (i
= 0; i
< RADEON_NUM_VM
; ++i
) {
523 radeon_fence_unref(&rdev
->vm_manager
.active
[i
]);
525 radeon_asic_vm_fini(rdev
);
526 mutex_unlock(&rdev
->vm_manager
.lock
);
528 radeon_sa_bo_manager_suspend(rdev
, &rdev
->vm_manager
.sa_manager
);
529 radeon_sa_bo_manager_fini(rdev
, &rdev
->vm_manager
.sa_manager
);
530 rdev
->vm_manager
.enabled
= false;
534 * radeon_vm_alloc_pt - allocates a page table for a VM
536 * @rdev: radeon_device pointer
539 * Allocate a page table for the requested vm (cayman+).
540 * Also starts to populate the page table.
541 * Returns 0 for success, error for failure.
543 * Global and local mutex must be locked!
545 int radeon_vm_alloc_pt(struct radeon_device
*rdev
, struct radeon_vm
*vm
)
547 struct radeon_vm
*vm_evict
;
554 if (vm
->sa_bo
!= NULL
) {
556 list_del_init(&vm
->list
);
557 list_add_tail(&vm
->list
, &rdev
->vm_manager
.lru_vm
);
562 r
= radeon_sa_bo_new(rdev
, &rdev
->vm_manager
.sa_manager
, &vm
->sa_bo
,
563 RADEON_GPU_PAGE_ALIGN(vm
->last_pfn
* 8),
564 RADEON_GPU_PAGE_SIZE
, false);
566 if (list_empty(&rdev
->vm_manager
.lru_vm
)) {
569 vm_evict
= list_first_entry(&rdev
->vm_manager
.lru_vm
, struct radeon_vm
, list
);
570 mutex_lock(&vm_evict
->mutex
);
571 radeon_vm_free_pt(rdev
, vm_evict
);
572 mutex_unlock(&vm_evict
->mutex
);
579 vm
->pt
= radeon_sa_bo_cpu_addr(vm
->sa_bo
);
580 vm
->pt_gpu_addr
= radeon_sa_bo_gpu_addr(vm
->sa_bo
);
581 memset(vm
->pt
, 0, RADEON_GPU_PAGE_ALIGN(vm
->last_pfn
* 8));
583 list_add_tail(&vm
->list
, &rdev
->vm_manager
.lru_vm
);
584 return radeon_vm_bo_update_pte(rdev
, vm
, rdev
->ring_tmp_bo
.bo
,
585 &rdev
->ring_tmp_bo
.bo
->tbo
.mem
);
589 * radeon_vm_grab_id - allocate the next free VMID
591 * @rdev: radeon_device pointer
592 * @vm: vm to allocate id for
593 * @ring: ring we want to submit job to
595 * Allocate an id for the vm (cayman+).
596 * Returns the fence we need to sync to (if any).
598 * Global and local mutex must be locked!
600 struct radeon_fence
*radeon_vm_grab_id(struct radeon_device
*rdev
,
601 struct radeon_vm
*vm
, int ring
)
603 struct radeon_fence
*best
[RADEON_NUM_RINGS
] = {};
604 unsigned choices
[2] = {};
607 /* check if the id is still valid */
608 if (vm
->fence
&& vm
->fence
== rdev
->vm_manager
.active
[vm
->id
])
611 /* we definately need to flush */
612 radeon_fence_unref(&vm
->last_flush
);
614 /* skip over VMID 0, since it is the system VM */
615 for (i
= 1; i
< rdev
->vm_manager
.nvm
; ++i
) {
616 struct radeon_fence
*fence
= rdev
->vm_manager
.active
[i
];
619 /* found a free one */
624 if (radeon_fence_is_earlier(fence
, best
[fence
->ring
])) {
625 best
[fence
->ring
] = fence
;
626 choices
[fence
->ring
== ring
? 0 : 1] = i
;
630 for (i
= 0; i
< 2; ++i
) {
633 return rdev
->vm_manager
.active
[choices
[i
]];
637 /* should never happen */
643 * radeon_vm_fence - remember fence for vm
645 * @rdev: radeon_device pointer
646 * @vm: vm we want to fence
647 * @fence: fence to remember
649 * Fence the vm (cayman+).
650 * Set the fence used to protect page table and id.
652 * Global and local mutex must be locked!
654 void radeon_vm_fence(struct radeon_device
*rdev
,
655 struct radeon_vm
*vm
,
656 struct radeon_fence
*fence
)
658 radeon_fence_unref(&rdev
->vm_manager
.active
[vm
->id
]);
659 rdev
->vm_manager
.active
[vm
->id
] = radeon_fence_ref(fence
);
661 radeon_fence_unref(&vm
->fence
);
662 vm
->fence
= radeon_fence_ref(fence
);
665 /* object have to be reserved */
667 * radeon_vm_bo_add - add a bo to a specific vm
669 * @rdev: radeon_device pointer
671 * @bo: radeon buffer object
672 * @offset: requested offset of the buffer in the VM address space
673 * @flags: attributes of pages (read/write/valid/etc.)
675 * Add @bo into the requested vm (cayman+).
676 * Add @bo to the list of bos associated with the vm and validate
677 * the offset requested within the vm address space.
678 * Returns 0 for success, error for failure.
680 int radeon_vm_bo_add(struct radeon_device
*rdev
,
681 struct radeon_vm
*vm
,
682 struct radeon_bo
*bo
,
686 struct radeon_bo_va
*bo_va
, *tmp
;
687 struct list_head
*head
;
688 uint64_t size
= radeon_bo_size(bo
), last_offset
= 0;
691 bo_va
= kzalloc(sizeof(struct radeon_bo_va
), GFP_KERNEL
);
697 bo_va
->soffset
= offset
;
698 bo_va
->eoffset
= offset
+ size
;
699 bo_va
->flags
= flags
;
700 bo_va
->valid
= false;
701 INIT_LIST_HEAD(&bo_va
->bo_list
);
702 INIT_LIST_HEAD(&bo_va
->vm_list
);
703 /* make sure object fit at this offset */
704 if (bo_va
->soffset
>= bo_va
->eoffset
) {
709 last_pfn
= bo_va
->eoffset
/ RADEON_GPU_PAGE_SIZE
;
710 if (last_pfn
> rdev
->vm_manager
.max_pfn
) {
712 dev_err(rdev
->dev
, "va above limit (0x%08X > 0x%08X)\n",
713 last_pfn
, rdev
->vm_manager
.max_pfn
);
717 mutex_lock(&vm
->mutex
);
718 if (last_pfn
> vm
->last_pfn
) {
719 /* release mutex and lock in right order */
720 mutex_unlock(&vm
->mutex
);
721 mutex_lock(&rdev
->vm_manager
.lock
);
722 mutex_lock(&vm
->mutex
);
723 /* and check again */
724 if (last_pfn
> vm
->last_pfn
) {
725 /* grow va space 32M by 32M */
726 unsigned align
= ((32 << 20) >> 12) - 1;
727 radeon_vm_free_pt(rdev
, vm
);
728 vm
->last_pfn
= (last_pfn
+ align
) & ~align
;
730 mutex_unlock(&rdev
->vm_manager
.lock
);
734 list_for_each_entry(tmp
, &vm
->va
, vm_list
) {
735 if (bo_va
->soffset
>= last_offset
&& bo_va
->eoffset
< tmp
->soffset
) {
736 /* bo can be added before this one */
739 if (bo_va
->soffset
>= tmp
->soffset
&& bo_va
->soffset
< tmp
->eoffset
) {
740 /* bo and tmp overlap, invalid offset */
741 dev_err(rdev
->dev
, "bo %p va 0x%08X conflict with (bo %p 0x%08X 0x%08X)\n",
742 bo
, (unsigned)bo_va
->soffset
, tmp
->bo
,
743 (unsigned)tmp
->soffset
, (unsigned)tmp
->eoffset
);
745 mutex_unlock(&vm
->mutex
);
748 last_offset
= tmp
->eoffset
;
749 head
= &tmp
->vm_list
;
751 list_add(&bo_va
->vm_list
, head
);
752 list_add_tail(&bo_va
->bo_list
, &bo
->va
);
753 mutex_unlock(&vm
->mutex
);
758 * radeon_vm_get_addr - get the physical address of the page
760 * @rdev: radeon_device pointer
764 * Look up the physical address of the page that the pte resolves
766 * Returns the physical address of the page.
768 u64
radeon_vm_get_addr(struct radeon_device
*rdev
,
769 struct ttm_mem_reg
*mem
,
774 switch (mem
->mem_type
) {
776 addr
= (mem
->start
<< PAGE_SHIFT
);
777 addr
+= pfn
* RADEON_GPU_PAGE_SIZE
;
778 addr
+= rdev
->vm_manager
.vram_base_offset
;
781 /* offset inside page table */
782 addr
= mem
->start
<< PAGE_SHIFT
;
783 addr
+= pfn
* RADEON_GPU_PAGE_SIZE
;
784 addr
= addr
>> PAGE_SHIFT
;
785 /* page table offset */
786 addr
= rdev
->gart
.pages_addr
[addr
];
787 /* in case cpu page size != gpu page size*/
788 addr
+= (pfn
* RADEON_GPU_PAGE_SIZE
) & (~PAGE_MASK
);
797 * radeon_vm_bo_update_pte - map a bo into the vm page table
799 * @rdev: radeon_device pointer
801 * @bo: radeon buffer object
804 * Fill in the page table entries for @bo (cayman+).
805 * Returns 0 for success, -EINVAL for failure.
807 * Object have to be reserved & global and local mutex must be locked!
809 int radeon_vm_bo_update_pte(struct radeon_device
*rdev
,
810 struct radeon_vm
*vm
,
811 struct radeon_bo
*bo
,
812 struct ttm_mem_reg
*mem
)
814 unsigned ridx
= rdev
->asic
->vm
.pt_ring_index
;
815 struct radeon_ring
*ring
= &rdev
->ring
[ridx
];
816 struct radeon_semaphore
*sem
= NULL
;
817 struct radeon_bo_va
*bo_va
;
818 unsigned ngpu_pages
, ndw
;
822 /* nothing to do if vm isn't bound */
823 if (vm
->sa_bo
== NULL
)
826 bo_va
= radeon_bo_va(bo
, vm
);
828 dev_err(rdev
->dev
, "bo %p not in vm %p\n", bo
, vm
);
832 if ((bo_va
->valid
&& mem
) || (!bo_va
->valid
&& mem
== NULL
))
835 ngpu_pages
= radeon_bo_ngpu_pages(bo
);
836 bo_va
->flags
&= ~RADEON_VM_PAGE_VALID
;
837 bo_va
->flags
&= ~RADEON_VM_PAGE_SYSTEM
;
839 if (mem
->mem_type
!= TTM_PL_SYSTEM
) {
840 bo_va
->flags
|= RADEON_VM_PAGE_VALID
;
843 if (mem
->mem_type
== TTM_PL_TT
) {
844 bo_va
->flags
|= RADEON_VM_PAGE_SYSTEM
;
850 bo_va
->valid
= false;
852 pfn
= bo_va
->soffset
/ RADEON_GPU_PAGE_SIZE
;
854 if (vm
->fence
&& radeon_fence_signaled(vm
->fence
)) {
855 radeon_fence_unref(&vm
->fence
);
858 if (vm
->fence
&& vm
->fence
->ring
!= ridx
) {
859 r
= radeon_semaphore_create(rdev
, &sem
);
865 /* estimate number of dw needed */
867 ndw
+= (ngpu_pages
>> 12) * 3;
868 ndw
+= ngpu_pages
* 2;
870 r
= radeon_ring_lock(rdev
, ring
, ndw
);
875 if (sem
&& radeon_fence_need_sync(vm
->fence
, ridx
)) {
876 radeon_semaphore_sync_rings(rdev
, sem
, vm
->fence
->ring
, ridx
);
877 radeon_fence_note_sync(vm
->fence
, ridx
);
880 radeon_asic_vm_set_page(rdev
, vm
, pfn
, mem
, ngpu_pages
, bo_va
->flags
);
882 radeon_fence_unref(&vm
->fence
);
883 r
= radeon_fence_emit(rdev
, &vm
->fence
, ridx
);
885 radeon_ring_unlock_undo(rdev
, ring
);
888 radeon_ring_unlock_commit(rdev
, ring
);
889 radeon_semaphore_free(rdev
, &sem
, vm
->fence
);
890 radeon_fence_unref(&vm
->last_flush
);
895 * radeon_vm_bo_rmv - remove a bo to a specific vm
897 * @rdev: radeon_device pointer
899 * @bo: radeon buffer object
901 * Remove @bo from the requested vm (cayman+).
902 * Remove @bo from the list of bos associated with the vm and
903 * remove the ptes for @bo in the page table.
904 * Returns 0 for success.
906 * Object have to be reserved!
908 int radeon_vm_bo_rmv(struct radeon_device
*rdev
,
909 struct radeon_vm
*vm
,
910 struct radeon_bo
*bo
)
912 struct radeon_bo_va
*bo_va
;
915 bo_va
= radeon_bo_va(bo
, vm
);
919 mutex_lock(&rdev
->vm_manager
.lock
);
920 mutex_lock(&vm
->mutex
);
921 r
= radeon_vm_bo_update_pte(rdev
, vm
, bo
, NULL
);
922 mutex_unlock(&rdev
->vm_manager
.lock
);
923 list_del(&bo_va
->vm_list
);
924 mutex_unlock(&vm
->mutex
);
925 list_del(&bo_va
->bo_list
);
932 * radeon_vm_bo_invalidate - mark the bo as invalid
934 * @rdev: radeon_device pointer
936 * @bo: radeon buffer object
938 * Mark @bo as invalid (cayman+).
940 void radeon_vm_bo_invalidate(struct radeon_device
*rdev
,
941 struct radeon_bo
*bo
)
943 struct radeon_bo_va
*bo_va
;
945 BUG_ON(!atomic_read(&bo
->tbo
.reserved
));
946 list_for_each_entry(bo_va
, &bo
->va
, bo_list
) {
947 bo_va
->valid
= false;
952 * radeon_vm_init - initialize a vm instance
954 * @rdev: radeon_device pointer
957 * Init @vm (cayman+).
958 * Map the IB pool and any other shared objects into the VM
959 * by default as it's used by all VMs.
960 * Returns 0 for success, error for failure.
962 int radeon_vm_init(struct radeon_device
*rdev
, struct radeon_vm
*vm
)
968 mutex_init(&vm
->mutex
);
969 INIT_LIST_HEAD(&vm
->list
);
970 INIT_LIST_HEAD(&vm
->va
);
971 /* SI requires equal sized PTs for all VMs, so always set
972 * last_pfn to max_pfn. cayman allows variable sized
973 * pts so we can grow then as needed. Once we switch
974 * to two level pts we can unify this again.
976 if (rdev
->family
>= CHIP_TAHITI
)
977 vm
->last_pfn
= rdev
->vm_manager
.max_pfn
;
980 /* map the ib pool buffer at 0 in virtual address space, set
983 r
= radeon_vm_bo_add(rdev
, vm
, rdev
->ring_tmp_bo
.bo
, 0,
984 RADEON_VM_PAGE_READABLE
| RADEON_VM_PAGE_SNOOPED
);
989 * radeon_vm_fini - tear down a vm instance
991 * @rdev: radeon_device pointer
994 * Tear down @vm (cayman+).
995 * Unbind the VM and remove all bos from the vm bo list
997 void radeon_vm_fini(struct radeon_device
*rdev
, struct radeon_vm
*vm
)
999 struct radeon_bo_va
*bo_va
, *tmp
;
1002 mutex_lock(&rdev
->vm_manager
.lock
);
1003 mutex_lock(&vm
->mutex
);
1004 radeon_vm_free_pt(rdev
, vm
);
1005 mutex_unlock(&rdev
->vm_manager
.lock
);
1007 /* remove all bo at this point non are busy any more because unbind
1008 * waited for the last vm fence to signal
1010 r
= radeon_bo_reserve(rdev
->ring_tmp_bo
.bo
, false);
1012 bo_va
= radeon_bo_va(rdev
->ring_tmp_bo
.bo
, vm
);
1013 list_del_init(&bo_va
->bo_list
);
1014 list_del_init(&bo_va
->vm_list
);
1015 radeon_bo_unreserve(rdev
->ring_tmp_bo
.bo
);
1018 if (!list_empty(&vm
->va
)) {
1019 dev_err(rdev
->dev
, "still active bo inside vm\n");
1021 list_for_each_entry_safe(bo_va
, tmp
, &vm
->va
, vm_list
) {
1022 list_del_init(&bo_va
->vm_list
);
1023 r
= radeon_bo_reserve(bo_va
->bo
, false);
1025 list_del_init(&bo_va
->bo_list
);
1026 radeon_bo_unreserve(bo_va
->bo
);
1030 radeon_fence_unref(&vm
->fence
);
1031 radeon_fence_unref(&vm
->last_flush
);
1032 mutex_unlock(&vm
->mutex
);
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