drm/radeon: use rcu waits in some ioctls
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_gem.c
1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28 #include <drm/drmP.h>
29 #include <drm/radeon_drm.h>
30 #include "radeon.h"
31
32 void radeon_gem_object_free(struct drm_gem_object *gobj)
33 {
34 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
35
36 if (robj) {
37 if (robj->gem_base.import_attach)
38 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
39 radeon_bo_unref(&robj);
40 }
41 }
42
43 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
44 int alignment, int initial_domain,
45 u32 flags, bool kernel,
46 struct drm_gem_object **obj)
47 {
48 struct radeon_bo *robj;
49 unsigned long max_size;
50 int r;
51
52 *obj = NULL;
53 /* At least align on page size */
54 if (alignment < PAGE_SIZE) {
55 alignment = PAGE_SIZE;
56 }
57
58 /* Maximum bo size is the unpinned gtt size since we use the gtt to
59 * handle vram to system pool migrations.
60 */
61 max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
62 if (size > max_size) {
63 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
64 size >> 20, max_size >> 20);
65 return -ENOMEM;
66 }
67
68 retry:
69 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
70 flags, NULL, &robj);
71 if (r) {
72 if (r != -ERESTARTSYS) {
73 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
74 initial_domain |= RADEON_GEM_DOMAIN_GTT;
75 goto retry;
76 }
77 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
78 size, initial_domain, alignment, r);
79 }
80 return r;
81 }
82 *obj = &robj->gem_base;
83 robj->pid = task_pid_nr(current);
84
85 mutex_lock(&rdev->gem.mutex);
86 list_add_tail(&robj->list, &rdev->gem.objects);
87 mutex_unlock(&rdev->gem.mutex);
88
89 return 0;
90 }
91
92 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
93 uint32_t rdomain, uint32_t wdomain)
94 {
95 struct radeon_bo *robj;
96 uint32_t domain;
97 long r;
98
99 /* FIXME: reeimplement */
100 robj = gem_to_radeon_bo(gobj);
101 /* work out where to validate the buffer to */
102 domain = wdomain;
103 if (!domain) {
104 domain = rdomain;
105 }
106 if (!domain) {
107 /* Do nothings */
108 printk(KERN_WARNING "Set domain without domain !\n");
109 return 0;
110 }
111 if (domain == RADEON_GEM_DOMAIN_CPU) {
112 /* Asking for cpu access wait for object idle */
113 r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
114 if (!r)
115 r = -EBUSY;
116
117 if (r < 0 && r != -EINTR) {
118 printk(KERN_ERR "Failed to wait for object: %li\n", r);
119 return r;
120 }
121 }
122 return 0;
123 }
124
125 int radeon_gem_init(struct radeon_device *rdev)
126 {
127 INIT_LIST_HEAD(&rdev->gem.objects);
128 return 0;
129 }
130
131 void radeon_gem_fini(struct radeon_device *rdev)
132 {
133 radeon_bo_force_delete(rdev);
134 }
135
136 /*
137 * Call from drm_gem_handle_create which appear in both new and open ioctl
138 * case.
139 */
140 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
141 {
142 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
143 struct radeon_device *rdev = rbo->rdev;
144 struct radeon_fpriv *fpriv = file_priv->driver_priv;
145 struct radeon_vm *vm = &fpriv->vm;
146 struct radeon_bo_va *bo_va;
147 int r;
148
149 if (rdev->family < CHIP_CAYMAN) {
150 return 0;
151 }
152
153 r = radeon_bo_reserve(rbo, false);
154 if (r) {
155 return r;
156 }
157
158 bo_va = radeon_vm_bo_find(vm, rbo);
159 if (!bo_va) {
160 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
161 } else {
162 ++bo_va->ref_count;
163 }
164 radeon_bo_unreserve(rbo);
165
166 return 0;
167 }
168
169 void radeon_gem_object_close(struct drm_gem_object *obj,
170 struct drm_file *file_priv)
171 {
172 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
173 struct radeon_device *rdev = rbo->rdev;
174 struct radeon_fpriv *fpriv = file_priv->driver_priv;
175 struct radeon_vm *vm = &fpriv->vm;
176 struct radeon_bo_va *bo_va;
177 int r;
178
179 if (rdev->family < CHIP_CAYMAN) {
180 return;
181 }
182
183 r = radeon_bo_reserve(rbo, true);
184 if (r) {
185 dev_err(rdev->dev, "leaking bo va because "
186 "we fail to reserve bo (%d)\n", r);
187 return;
188 }
189 bo_va = radeon_vm_bo_find(vm, rbo);
190 if (bo_va) {
191 if (--bo_va->ref_count == 0) {
192 radeon_vm_bo_rmv(rdev, bo_va);
193 }
194 }
195 radeon_bo_unreserve(rbo);
196 }
197
198 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
199 {
200 if (r == -EDEADLK) {
201 r = radeon_gpu_reset(rdev);
202 if (!r)
203 r = -EAGAIN;
204 }
205 return r;
206 }
207
208 /*
209 * GEM ioctls.
210 */
211 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
212 struct drm_file *filp)
213 {
214 struct radeon_device *rdev = dev->dev_private;
215 struct drm_radeon_gem_info *args = data;
216 struct ttm_mem_type_manager *man;
217
218 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
219
220 args->vram_size = rdev->mc.real_vram_size;
221 args->vram_visible = (u64)man->size << PAGE_SHIFT;
222 args->vram_visible -= rdev->vram_pin_size;
223 args->gart_size = rdev->mc.gtt_size;
224 args->gart_size -= rdev->gart_pin_size;
225
226 return 0;
227 }
228
229 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
230 struct drm_file *filp)
231 {
232 /* TODO: implement */
233 DRM_ERROR("unimplemented %s\n", __func__);
234 return -ENOSYS;
235 }
236
237 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
238 struct drm_file *filp)
239 {
240 /* TODO: implement */
241 DRM_ERROR("unimplemented %s\n", __func__);
242 return -ENOSYS;
243 }
244
245 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
246 struct drm_file *filp)
247 {
248 struct radeon_device *rdev = dev->dev_private;
249 struct drm_radeon_gem_create *args = data;
250 struct drm_gem_object *gobj;
251 uint32_t handle;
252 int r;
253
254 down_read(&rdev->exclusive_lock);
255 /* create a gem object to contain this object in */
256 args->size = roundup(args->size, PAGE_SIZE);
257 r = radeon_gem_object_create(rdev, args->size, args->alignment,
258 args->initial_domain, args->flags,
259 false, &gobj);
260 if (r) {
261 up_read(&rdev->exclusive_lock);
262 r = radeon_gem_handle_lockup(rdev, r);
263 return r;
264 }
265 r = drm_gem_handle_create(filp, gobj, &handle);
266 /* drop reference from allocate - handle holds it now */
267 drm_gem_object_unreference_unlocked(gobj);
268 if (r) {
269 up_read(&rdev->exclusive_lock);
270 r = radeon_gem_handle_lockup(rdev, r);
271 return r;
272 }
273 args->handle = handle;
274 up_read(&rdev->exclusive_lock);
275 return 0;
276 }
277
278 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
279 struct drm_file *filp)
280 {
281 struct radeon_device *rdev = dev->dev_private;
282 struct drm_radeon_gem_userptr *args = data;
283 struct drm_gem_object *gobj;
284 struct radeon_bo *bo;
285 uint32_t handle;
286 int r;
287
288 if (offset_in_page(args->addr | args->size))
289 return -EINVAL;
290
291 /* reject unknown flag values */
292 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
293 RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
294 RADEON_GEM_USERPTR_REGISTER))
295 return -EINVAL;
296
297 if (args->flags & RADEON_GEM_USERPTR_READONLY) {
298 /* readonly pages not tested on older hardware */
299 if (rdev->family < CHIP_R600)
300 return -EINVAL;
301
302 } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
303 !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
304
305 /* if we want to write to it we must require anonymous
306 memory and install a MMU notifier */
307 return -EACCES;
308 }
309
310 down_read(&rdev->exclusive_lock);
311
312 /* create a gem object to contain this object in */
313 r = radeon_gem_object_create(rdev, args->size, 0,
314 RADEON_GEM_DOMAIN_CPU, 0,
315 false, &gobj);
316 if (r)
317 goto handle_lockup;
318
319 bo = gem_to_radeon_bo(gobj);
320 r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
321 if (r)
322 goto release_object;
323
324 if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
325 r = radeon_mn_register(bo, args->addr);
326 if (r)
327 goto release_object;
328 }
329
330 if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
331 down_read(&current->mm->mmap_sem);
332 r = radeon_bo_reserve(bo, true);
333 if (r) {
334 up_read(&current->mm->mmap_sem);
335 goto release_object;
336 }
337
338 radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
339 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
340 radeon_bo_unreserve(bo);
341 up_read(&current->mm->mmap_sem);
342 if (r)
343 goto release_object;
344 }
345
346 r = drm_gem_handle_create(filp, gobj, &handle);
347 /* drop reference from allocate - handle holds it now */
348 drm_gem_object_unreference_unlocked(gobj);
349 if (r)
350 goto handle_lockup;
351
352 args->handle = handle;
353 up_read(&rdev->exclusive_lock);
354 return 0;
355
356 release_object:
357 drm_gem_object_unreference_unlocked(gobj);
358
359 handle_lockup:
360 up_read(&rdev->exclusive_lock);
361 r = radeon_gem_handle_lockup(rdev, r);
362
363 return r;
364 }
365
366 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
367 struct drm_file *filp)
368 {
369 /* transition the BO to a domain -
370 * just validate the BO into a certain domain */
371 struct radeon_device *rdev = dev->dev_private;
372 struct drm_radeon_gem_set_domain *args = data;
373 struct drm_gem_object *gobj;
374 struct radeon_bo *robj;
375 int r;
376
377 /* for now if someone requests domain CPU -
378 * just make sure the buffer is finished with */
379 down_read(&rdev->exclusive_lock);
380
381 /* just do a BO wait for now */
382 gobj = drm_gem_object_lookup(dev, filp, args->handle);
383 if (gobj == NULL) {
384 up_read(&rdev->exclusive_lock);
385 return -ENOENT;
386 }
387 robj = gem_to_radeon_bo(gobj);
388
389 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
390
391 drm_gem_object_unreference_unlocked(gobj);
392 up_read(&rdev->exclusive_lock);
393 r = radeon_gem_handle_lockup(robj->rdev, r);
394 return r;
395 }
396
397 int radeon_mode_dumb_mmap(struct drm_file *filp,
398 struct drm_device *dev,
399 uint32_t handle, uint64_t *offset_p)
400 {
401 struct drm_gem_object *gobj;
402 struct radeon_bo *robj;
403
404 gobj = drm_gem_object_lookup(dev, filp, handle);
405 if (gobj == NULL) {
406 return -ENOENT;
407 }
408 robj = gem_to_radeon_bo(gobj);
409 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
410 drm_gem_object_unreference_unlocked(gobj);
411 return -EPERM;
412 }
413 *offset_p = radeon_bo_mmap_offset(robj);
414 drm_gem_object_unreference_unlocked(gobj);
415 return 0;
416 }
417
418 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
419 struct drm_file *filp)
420 {
421 struct drm_radeon_gem_mmap *args = data;
422
423 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
424 }
425
426 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
427 struct drm_file *filp)
428 {
429 struct radeon_device *rdev = dev->dev_private;
430 struct drm_radeon_gem_busy *args = data;
431 struct drm_gem_object *gobj;
432 struct radeon_bo *robj;
433 int r;
434 uint32_t cur_placement = 0;
435
436 gobj = drm_gem_object_lookup(dev, filp, args->handle);
437 if (gobj == NULL) {
438 return -ENOENT;
439 }
440 robj = gem_to_radeon_bo(gobj);
441 r = radeon_bo_wait(robj, &cur_placement, true);
442 args->domain = radeon_mem_type_to_domain(cur_placement);
443 drm_gem_object_unreference_unlocked(gobj);
444 r = radeon_gem_handle_lockup(rdev, r);
445 return r;
446 }
447
448 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
449 struct drm_file *filp)
450 {
451 struct radeon_device *rdev = dev->dev_private;
452 struct drm_radeon_gem_wait_idle *args = data;
453 struct drm_gem_object *gobj;
454 struct radeon_bo *robj;
455 int r = 0;
456 uint32_t cur_placement = 0;
457 long ret;
458
459 gobj = drm_gem_object_lookup(dev, filp, args->handle);
460 if (gobj == NULL) {
461 return -ENOENT;
462 }
463 robj = gem_to_radeon_bo(gobj);
464
465 ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
466 if (ret == 0)
467 r = -EBUSY;
468 else if (ret < 0)
469 r = ret;
470
471 /* Flush HDP cache via MMIO if necessary */
472 if (rdev->asic->mmio_hdp_flush &&
473 radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
474 robj->rdev->asic->mmio_hdp_flush(rdev);
475 drm_gem_object_unreference_unlocked(gobj);
476 r = radeon_gem_handle_lockup(rdev, r);
477 return r;
478 }
479
480 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
481 struct drm_file *filp)
482 {
483 struct drm_radeon_gem_set_tiling *args = data;
484 struct drm_gem_object *gobj;
485 struct radeon_bo *robj;
486 int r = 0;
487
488 DRM_DEBUG("%d \n", args->handle);
489 gobj = drm_gem_object_lookup(dev, filp, args->handle);
490 if (gobj == NULL)
491 return -ENOENT;
492 robj = gem_to_radeon_bo(gobj);
493 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
494 drm_gem_object_unreference_unlocked(gobj);
495 return r;
496 }
497
498 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
499 struct drm_file *filp)
500 {
501 struct drm_radeon_gem_get_tiling *args = data;
502 struct drm_gem_object *gobj;
503 struct radeon_bo *rbo;
504 int r = 0;
505
506 DRM_DEBUG("\n");
507 gobj = drm_gem_object_lookup(dev, filp, args->handle);
508 if (gobj == NULL)
509 return -ENOENT;
510 rbo = gem_to_radeon_bo(gobj);
511 r = radeon_bo_reserve(rbo, false);
512 if (unlikely(r != 0))
513 goto out;
514 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
515 radeon_bo_unreserve(rbo);
516 out:
517 drm_gem_object_unreference_unlocked(gobj);
518 return r;
519 }
520
521 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
522 struct drm_file *filp)
523 {
524 struct drm_radeon_gem_va *args = data;
525 struct drm_gem_object *gobj;
526 struct radeon_device *rdev = dev->dev_private;
527 struct radeon_fpriv *fpriv = filp->driver_priv;
528 struct radeon_bo *rbo;
529 struct radeon_bo_va *bo_va;
530 u32 invalid_flags;
531 int r = 0;
532
533 if (!rdev->vm_manager.enabled) {
534 args->operation = RADEON_VA_RESULT_ERROR;
535 return -ENOTTY;
536 }
537
538 /* !! DONT REMOVE !!
539 * We don't support vm_id yet, to be sure we don't have have broken
540 * userspace, reject anyone trying to use non 0 value thus moving
541 * forward we can use those fields without breaking existant userspace
542 */
543 if (args->vm_id) {
544 args->operation = RADEON_VA_RESULT_ERROR;
545 return -EINVAL;
546 }
547
548 if (args->offset < RADEON_VA_RESERVED_SIZE) {
549 dev_err(&dev->pdev->dev,
550 "offset 0x%lX is in reserved area 0x%X\n",
551 (unsigned long)args->offset,
552 RADEON_VA_RESERVED_SIZE);
553 args->operation = RADEON_VA_RESULT_ERROR;
554 return -EINVAL;
555 }
556
557 /* don't remove, we need to enforce userspace to set the snooped flag
558 * otherwise we will endup with broken userspace and we won't be able
559 * to enable this feature without adding new interface
560 */
561 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
562 if ((args->flags & invalid_flags)) {
563 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
564 args->flags, invalid_flags);
565 args->operation = RADEON_VA_RESULT_ERROR;
566 return -EINVAL;
567 }
568
569 switch (args->operation) {
570 case RADEON_VA_MAP:
571 case RADEON_VA_UNMAP:
572 break;
573 default:
574 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
575 args->operation);
576 args->operation = RADEON_VA_RESULT_ERROR;
577 return -EINVAL;
578 }
579
580 gobj = drm_gem_object_lookup(dev, filp, args->handle);
581 if (gobj == NULL) {
582 args->operation = RADEON_VA_RESULT_ERROR;
583 return -ENOENT;
584 }
585 rbo = gem_to_radeon_bo(gobj);
586 r = radeon_bo_reserve(rbo, false);
587 if (r) {
588 args->operation = RADEON_VA_RESULT_ERROR;
589 drm_gem_object_unreference_unlocked(gobj);
590 return r;
591 }
592 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
593 if (!bo_va) {
594 args->operation = RADEON_VA_RESULT_ERROR;
595 drm_gem_object_unreference_unlocked(gobj);
596 return -ENOENT;
597 }
598
599 switch (args->operation) {
600 case RADEON_VA_MAP:
601 if (bo_va->it.start) {
602 args->operation = RADEON_VA_RESULT_VA_EXIST;
603 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
604 goto out;
605 }
606 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
607 break;
608 case RADEON_VA_UNMAP:
609 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
610 break;
611 default:
612 break;
613 }
614 args->operation = RADEON_VA_RESULT_OK;
615 if (r) {
616 args->operation = RADEON_VA_RESULT_ERROR;
617 }
618 out:
619 radeon_bo_unreserve(rbo);
620 drm_gem_object_unreference_unlocked(gobj);
621 return r;
622 }
623
624 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
625 struct drm_file *filp)
626 {
627 struct drm_radeon_gem_op *args = data;
628 struct drm_gem_object *gobj;
629 struct radeon_bo *robj;
630 int r;
631
632 gobj = drm_gem_object_lookup(dev, filp, args->handle);
633 if (gobj == NULL) {
634 return -ENOENT;
635 }
636 robj = gem_to_radeon_bo(gobj);
637
638 r = -EPERM;
639 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
640 goto out;
641
642 r = radeon_bo_reserve(robj, false);
643 if (unlikely(r))
644 goto out;
645
646 switch (args->op) {
647 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
648 args->value = robj->initial_domain;
649 break;
650 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
651 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
652 RADEON_GEM_DOMAIN_GTT |
653 RADEON_GEM_DOMAIN_CPU);
654 break;
655 default:
656 r = -EINVAL;
657 }
658
659 radeon_bo_unreserve(robj);
660 out:
661 drm_gem_object_unreference_unlocked(gobj);
662 return r;
663 }
664
665 int radeon_mode_dumb_create(struct drm_file *file_priv,
666 struct drm_device *dev,
667 struct drm_mode_create_dumb *args)
668 {
669 struct radeon_device *rdev = dev->dev_private;
670 struct drm_gem_object *gobj;
671 uint32_t handle;
672 int r;
673
674 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
675 args->size = args->pitch * args->height;
676 args->size = ALIGN(args->size, PAGE_SIZE);
677
678 r = radeon_gem_object_create(rdev, args->size, 0,
679 RADEON_GEM_DOMAIN_VRAM, 0,
680 false, &gobj);
681 if (r)
682 return -ENOMEM;
683
684 r = drm_gem_handle_create(file_priv, gobj, &handle);
685 /* drop reference from allocate - handle holds it now */
686 drm_gem_object_unreference_unlocked(gobj);
687 if (r) {
688 return r;
689 }
690 args->handle = handle;
691 return 0;
692 }
693
694 #if defined(CONFIG_DEBUG_FS)
695 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
696 {
697 struct drm_info_node *node = (struct drm_info_node *)m->private;
698 struct drm_device *dev = node->minor->dev;
699 struct radeon_device *rdev = dev->dev_private;
700 struct radeon_bo *rbo;
701 unsigned i = 0;
702
703 mutex_lock(&rdev->gem.mutex);
704 list_for_each_entry(rbo, &rdev->gem.objects, list) {
705 unsigned domain;
706 const char *placement;
707
708 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
709 switch (domain) {
710 case RADEON_GEM_DOMAIN_VRAM:
711 placement = "VRAM";
712 break;
713 case RADEON_GEM_DOMAIN_GTT:
714 placement = " GTT";
715 break;
716 case RADEON_GEM_DOMAIN_CPU:
717 default:
718 placement = " CPU";
719 break;
720 }
721 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
722 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
723 placement, (unsigned long)rbo->pid);
724 i++;
725 }
726 mutex_unlock(&rdev->gem.mutex);
727 return 0;
728 }
729
730 static struct drm_info_list radeon_debugfs_gem_list[] = {
731 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
732 };
733 #endif
734
735 int radeon_gem_debugfs_init(struct radeon_device *rdev)
736 {
737 #if defined(CONFIG_DEBUG_FS)
738 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
739 #endif
740 return 0;
741 }
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