ab9abfa1ba015f6be2c5262e30c15fb0bda6acaa
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_gem.c
1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28 #include <drm/drmP.h>
29 #include <drm/radeon_drm.h>
30 #include "radeon.h"
31
32 void radeon_gem_object_free(struct drm_gem_object *gobj)
33 {
34 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
35
36 if (robj) {
37 if (robj->gem_base.import_attach)
38 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
39 radeon_bo_unref(&robj);
40 }
41 }
42
43 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
44 int alignment, int initial_domain,
45 u32 flags, bool kernel,
46 struct drm_gem_object **obj)
47 {
48 struct radeon_bo *robj;
49 unsigned long max_size;
50 int r;
51
52 *obj = NULL;
53 /* At least align on page size */
54 if (alignment < PAGE_SIZE) {
55 alignment = PAGE_SIZE;
56 }
57
58 /* Maximum bo size is the unpinned gtt size since we use the gtt to
59 * handle vram to system pool migrations.
60 */
61 max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
62 if (size > max_size) {
63 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
64 size >> 20, max_size >> 20);
65 return -ENOMEM;
66 }
67
68 retry:
69 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
70 flags, NULL, &robj);
71 if (r) {
72 if (r != -ERESTARTSYS) {
73 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
74 initial_domain |= RADEON_GEM_DOMAIN_GTT;
75 goto retry;
76 }
77 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
78 size, initial_domain, alignment, r);
79 }
80 return r;
81 }
82 *obj = &robj->gem_base;
83 robj->pid = task_pid_nr(current);
84
85 mutex_lock(&rdev->gem.mutex);
86 list_add_tail(&robj->list, &rdev->gem.objects);
87 mutex_unlock(&rdev->gem.mutex);
88
89 return 0;
90 }
91
92 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
93 uint32_t rdomain, uint32_t wdomain)
94 {
95 struct radeon_bo *robj;
96 uint32_t domain;
97 int r;
98
99 /* FIXME: reeimplement */
100 robj = gem_to_radeon_bo(gobj);
101 /* work out where to validate the buffer to */
102 domain = wdomain;
103 if (!domain) {
104 domain = rdomain;
105 }
106 if (!domain) {
107 /* Do nothings */
108 printk(KERN_WARNING "Set domain without domain !\n");
109 return 0;
110 }
111 if (domain == RADEON_GEM_DOMAIN_CPU) {
112 /* Asking for cpu access wait for object idle */
113 r = radeon_bo_wait(robj, NULL, false);
114 if (r) {
115 printk(KERN_ERR "Failed to wait for object !\n");
116 return r;
117 }
118 }
119 return 0;
120 }
121
122 int radeon_gem_init(struct radeon_device *rdev)
123 {
124 INIT_LIST_HEAD(&rdev->gem.objects);
125 return 0;
126 }
127
128 void radeon_gem_fini(struct radeon_device *rdev)
129 {
130 radeon_bo_force_delete(rdev);
131 }
132
133 /*
134 * Call from drm_gem_handle_create which appear in both new and open ioctl
135 * case.
136 */
137 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
138 {
139 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
140 struct radeon_device *rdev = rbo->rdev;
141 struct radeon_fpriv *fpriv = file_priv->driver_priv;
142 struct radeon_vm *vm = &fpriv->vm;
143 struct radeon_bo_va *bo_va;
144 int r;
145
146 if (rdev->family < CHIP_CAYMAN) {
147 return 0;
148 }
149
150 r = radeon_bo_reserve(rbo, false);
151 if (r) {
152 return r;
153 }
154
155 bo_va = radeon_vm_bo_find(vm, rbo);
156 if (!bo_va) {
157 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
158 } else {
159 ++bo_va->ref_count;
160 }
161 radeon_bo_unreserve(rbo);
162
163 return 0;
164 }
165
166 void radeon_gem_object_close(struct drm_gem_object *obj,
167 struct drm_file *file_priv)
168 {
169 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
170 struct radeon_device *rdev = rbo->rdev;
171 struct radeon_fpriv *fpriv = file_priv->driver_priv;
172 struct radeon_vm *vm = &fpriv->vm;
173 struct radeon_bo_va *bo_va;
174 int r;
175
176 if (rdev->family < CHIP_CAYMAN) {
177 return;
178 }
179
180 r = radeon_bo_reserve(rbo, true);
181 if (r) {
182 dev_err(rdev->dev, "leaking bo va because "
183 "we fail to reserve bo (%d)\n", r);
184 return;
185 }
186 bo_va = radeon_vm_bo_find(vm, rbo);
187 if (bo_va) {
188 if (--bo_va->ref_count == 0) {
189 radeon_vm_bo_rmv(rdev, bo_va);
190 }
191 }
192 radeon_bo_unreserve(rbo);
193 }
194
195 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
196 {
197 if (r == -EDEADLK) {
198 r = radeon_gpu_reset(rdev);
199 if (!r)
200 r = -EAGAIN;
201 }
202 return r;
203 }
204
205 /*
206 * GEM ioctls.
207 */
208 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
209 struct drm_file *filp)
210 {
211 struct radeon_device *rdev = dev->dev_private;
212 struct drm_radeon_gem_info *args = data;
213 struct ttm_mem_type_manager *man;
214
215 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
216
217 args->vram_size = rdev->mc.real_vram_size;
218 args->vram_visible = (u64)man->size << PAGE_SHIFT;
219 args->vram_visible -= rdev->vram_pin_size;
220 args->gart_size = rdev->mc.gtt_size;
221 args->gart_size -= rdev->gart_pin_size;
222
223 return 0;
224 }
225
226 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
227 struct drm_file *filp)
228 {
229 /* TODO: implement */
230 DRM_ERROR("unimplemented %s\n", __func__);
231 return -ENOSYS;
232 }
233
234 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
235 struct drm_file *filp)
236 {
237 /* TODO: implement */
238 DRM_ERROR("unimplemented %s\n", __func__);
239 return -ENOSYS;
240 }
241
242 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
243 struct drm_file *filp)
244 {
245 struct radeon_device *rdev = dev->dev_private;
246 struct drm_radeon_gem_create *args = data;
247 struct drm_gem_object *gobj;
248 uint32_t handle;
249 int r;
250
251 down_read(&rdev->exclusive_lock);
252 /* create a gem object to contain this object in */
253 args->size = roundup(args->size, PAGE_SIZE);
254 r = radeon_gem_object_create(rdev, args->size, args->alignment,
255 args->initial_domain, args->flags,
256 false, &gobj);
257 if (r) {
258 up_read(&rdev->exclusive_lock);
259 r = radeon_gem_handle_lockup(rdev, r);
260 return r;
261 }
262 r = drm_gem_handle_create(filp, gobj, &handle);
263 /* drop reference from allocate - handle holds it now */
264 drm_gem_object_unreference_unlocked(gobj);
265 if (r) {
266 up_read(&rdev->exclusive_lock);
267 r = radeon_gem_handle_lockup(rdev, r);
268 return r;
269 }
270 args->handle = handle;
271 up_read(&rdev->exclusive_lock);
272 return 0;
273 }
274
275 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
276 struct drm_file *filp)
277 {
278 /* transition the BO to a domain -
279 * just validate the BO into a certain domain */
280 struct radeon_device *rdev = dev->dev_private;
281 struct drm_radeon_gem_set_domain *args = data;
282 struct drm_gem_object *gobj;
283 struct radeon_bo *robj;
284 int r;
285
286 /* for now if someone requests domain CPU -
287 * just make sure the buffer is finished with */
288 down_read(&rdev->exclusive_lock);
289
290 /* just do a BO wait for now */
291 gobj = drm_gem_object_lookup(dev, filp, args->handle);
292 if (gobj == NULL) {
293 up_read(&rdev->exclusive_lock);
294 return -ENOENT;
295 }
296 robj = gem_to_radeon_bo(gobj);
297
298 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
299
300 drm_gem_object_unreference_unlocked(gobj);
301 up_read(&rdev->exclusive_lock);
302 r = radeon_gem_handle_lockup(robj->rdev, r);
303 return r;
304 }
305
306 int radeon_mode_dumb_mmap(struct drm_file *filp,
307 struct drm_device *dev,
308 uint32_t handle, uint64_t *offset_p)
309 {
310 struct drm_gem_object *gobj;
311 struct radeon_bo *robj;
312
313 gobj = drm_gem_object_lookup(dev, filp, handle);
314 if (gobj == NULL) {
315 return -ENOENT;
316 }
317 robj = gem_to_radeon_bo(gobj);
318 *offset_p = radeon_bo_mmap_offset(robj);
319 drm_gem_object_unreference_unlocked(gobj);
320 return 0;
321 }
322
323 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
324 struct drm_file *filp)
325 {
326 struct drm_radeon_gem_mmap *args = data;
327
328 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
329 }
330
331 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
332 struct drm_file *filp)
333 {
334 struct radeon_device *rdev = dev->dev_private;
335 struct drm_radeon_gem_busy *args = data;
336 struct drm_gem_object *gobj;
337 struct radeon_bo *robj;
338 int r;
339 uint32_t cur_placement = 0;
340
341 gobj = drm_gem_object_lookup(dev, filp, args->handle);
342 if (gobj == NULL) {
343 return -ENOENT;
344 }
345 robj = gem_to_radeon_bo(gobj);
346 r = radeon_bo_wait(robj, &cur_placement, true);
347 args->domain = radeon_mem_type_to_domain(cur_placement);
348 drm_gem_object_unreference_unlocked(gobj);
349 r = radeon_gem_handle_lockup(rdev, r);
350 return r;
351 }
352
353 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
354 struct drm_file *filp)
355 {
356 struct radeon_device *rdev = dev->dev_private;
357 struct drm_radeon_gem_wait_idle *args = data;
358 struct drm_gem_object *gobj;
359 struct radeon_bo *robj;
360 int r;
361
362 gobj = drm_gem_object_lookup(dev, filp, args->handle);
363 if (gobj == NULL) {
364 return -ENOENT;
365 }
366 robj = gem_to_radeon_bo(gobj);
367 r = radeon_bo_wait(robj, NULL, false);
368 /* Flush HDP cache via MMIO if necessary */
369 if (rdev->asic->mmio_hdp_flush)
370 robj->rdev->asic->mmio_hdp_flush(rdev);
371 drm_gem_object_unreference_unlocked(gobj);
372 r = radeon_gem_handle_lockup(rdev, r);
373 return r;
374 }
375
376 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
377 struct drm_file *filp)
378 {
379 struct drm_radeon_gem_set_tiling *args = data;
380 struct drm_gem_object *gobj;
381 struct radeon_bo *robj;
382 int r = 0;
383
384 DRM_DEBUG("%d \n", args->handle);
385 gobj = drm_gem_object_lookup(dev, filp, args->handle);
386 if (gobj == NULL)
387 return -ENOENT;
388 robj = gem_to_radeon_bo(gobj);
389 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
390 drm_gem_object_unreference_unlocked(gobj);
391 return r;
392 }
393
394 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
395 struct drm_file *filp)
396 {
397 struct drm_radeon_gem_get_tiling *args = data;
398 struct drm_gem_object *gobj;
399 struct radeon_bo *rbo;
400 int r = 0;
401
402 DRM_DEBUG("\n");
403 gobj = drm_gem_object_lookup(dev, filp, args->handle);
404 if (gobj == NULL)
405 return -ENOENT;
406 rbo = gem_to_radeon_bo(gobj);
407 r = radeon_bo_reserve(rbo, false);
408 if (unlikely(r != 0))
409 goto out;
410 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
411 radeon_bo_unreserve(rbo);
412 out:
413 drm_gem_object_unreference_unlocked(gobj);
414 return r;
415 }
416
417 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
418 struct drm_file *filp)
419 {
420 struct drm_radeon_gem_va *args = data;
421 struct drm_gem_object *gobj;
422 struct radeon_device *rdev = dev->dev_private;
423 struct radeon_fpriv *fpriv = filp->driver_priv;
424 struct radeon_bo *rbo;
425 struct radeon_bo_va *bo_va;
426 u32 invalid_flags;
427 int r = 0;
428
429 if (!rdev->vm_manager.enabled) {
430 args->operation = RADEON_VA_RESULT_ERROR;
431 return -ENOTTY;
432 }
433
434 /* !! DONT REMOVE !!
435 * We don't support vm_id yet, to be sure we don't have have broken
436 * userspace, reject anyone trying to use non 0 value thus moving
437 * forward we can use those fields without breaking existant userspace
438 */
439 if (args->vm_id) {
440 args->operation = RADEON_VA_RESULT_ERROR;
441 return -EINVAL;
442 }
443
444 if (args->offset < RADEON_VA_RESERVED_SIZE) {
445 dev_err(&dev->pdev->dev,
446 "offset 0x%lX is in reserved area 0x%X\n",
447 (unsigned long)args->offset,
448 RADEON_VA_RESERVED_SIZE);
449 args->operation = RADEON_VA_RESULT_ERROR;
450 return -EINVAL;
451 }
452
453 /* don't remove, we need to enforce userspace to set the snooped flag
454 * otherwise we will endup with broken userspace and we won't be able
455 * to enable this feature without adding new interface
456 */
457 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
458 if ((args->flags & invalid_flags)) {
459 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
460 args->flags, invalid_flags);
461 args->operation = RADEON_VA_RESULT_ERROR;
462 return -EINVAL;
463 }
464
465 switch (args->operation) {
466 case RADEON_VA_MAP:
467 case RADEON_VA_UNMAP:
468 break;
469 default:
470 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
471 args->operation);
472 args->operation = RADEON_VA_RESULT_ERROR;
473 return -EINVAL;
474 }
475
476 gobj = drm_gem_object_lookup(dev, filp, args->handle);
477 if (gobj == NULL) {
478 args->operation = RADEON_VA_RESULT_ERROR;
479 return -ENOENT;
480 }
481 rbo = gem_to_radeon_bo(gobj);
482 r = radeon_bo_reserve(rbo, false);
483 if (r) {
484 args->operation = RADEON_VA_RESULT_ERROR;
485 drm_gem_object_unreference_unlocked(gobj);
486 return r;
487 }
488 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
489 if (!bo_va) {
490 args->operation = RADEON_VA_RESULT_ERROR;
491 drm_gem_object_unreference_unlocked(gobj);
492 return -ENOENT;
493 }
494
495 switch (args->operation) {
496 case RADEON_VA_MAP:
497 if (bo_va->soffset) {
498 args->operation = RADEON_VA_RESULT_VA_EXIST;
499 args->offset = bo_va->soffset;
500 goto out;
501 }
502 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
503 break;
504 case RADEON_VA_UNMAP:
505 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
506 break;
507 default:
508 break;
509 }
510 args->operation = RADEON_VA_RESULT_OK;
511 if (r) {
512 args->operation = RADEON_VA_RESULT_ERROR;
513 }
514 out:
515 radeon_bo_unreserve(rbo);
516 drm_gem_object_unreference_unlocked(gobj);
517 return r;
518 }
519
520 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
521 struct drm_file *filp)
522 {
523 struct drm_radeon_gem_op *args = data;
524 struct drm_gem_object *gobj;
525 struct radeon_bo *robj;
526 int r;
527
528 gobj = drm_gem_object_lookup(dev, filp, args->handle);
529 if (gobj == NULL) {
530 return -ENOENT;
531 }
532 robj = gem_to_radeon_bo(gobj);
533 r = radeon_bo_reserve(robj, false);
534 if (unlikely(r))
535 goto out;
536
537 switch (args->op) {
538 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
539 args->value = robj->initial_domain;
540 break;
541 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
542 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
543 RADEON_GEM_DOMAIN_GTT |
544 RADEON_GEM_DOMAIN_CPU);
545 break;
546 default:
547 r = -EINVAL;
548 }
549
550 radeon_bo_unreserve(robj);
551 out:
552 drm_gem_object_unreference_unlocked(gobj);
553 return r;
554 }
555
556 int radeon_mode_dumb_create(struct drm_file *file_priv,
557 struct drm_device *dev,
558 struct drm_mode_create_dumb *args)
559 {
560 struct radeon_device *rdev = dev->dev_private;
561 struct drm_gem_object *gobj;
562 uint32_t handle;
563 int r;
564
565 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
566 args->size = args->pitch * args->height;
567 args->size = ALIGN(args->size, PAGE_SIZE);
568
569 r = radeon_gem_object_create(rdev, args->size, 0,
570 RADEON_GEM_DOMAIN_VRAM, 0,
571 false, &gobj);
572 if (r)
573 return -ENOMEM;
574
575 r = drm_gem_handle_create(file_priv, gobj, &handle);
576 /* drop reference from allocate - handle holds it now */
577 drm_gem_object_unreference_unlocked(gobj);
578 if (r) {
579 return r;
580 }
581 args->handle = handle;
582 return 0;
583 }
584
585 #if defined(CONFIG_DEBUG_FS)
586 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
587 {
588 struct drm_info_node *node = (struct drm_info_node *)m->private;
589 struct drm_device *dev = node->minor->dev;
590 struct radeon_device *rdev = dev->dev_private;
591 struct radeon_bo *rbo;
592 unsigned i = 0;
593
594 mutex_lock(&rdev->gem.mutex);
595 list_for_each_entry(rbo, &rdev->gem.objects, list) {
596 unsigned domain;
597 const char *placement;
598
599 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
600 switch (domain) {
601 case RADEON_GEM_DOMAIN_VRAM:
602 placement = "VRAM";
603 break;
604 case RADEON_GEM_DOMAIN_GTT:
605 placement = " GTT";
606 break;
607 case RADEON_GEM_DOMAIN_CPU:
608 default:
609 placement = " CPU";
610 break;
611 }
612 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
613 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
614 placement, (unsigned long)rbo->pid);
615 i++;
616 }
617 mutex_unlock(&rdev->gem.mutex);
618 return 0;
619 }
620
621 static struct drm_info_list radeon_debugfs_gem_list[] = {
622 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
623 };
624 #endif
625
626 int radeon_gem_debugfs_init(struct radeon_device *rdev)
627 {
628 #if defined(CONFIG_DEBUG_FS)
629 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
630 #endif
631 return 0;
632 }
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