drivers/gpu/drm/radeon/radeon_mode.h

   1 /*
   2  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
   3  *                VA Linux Systems Inc., Fremont, California.
   4  * Copyright 2008 Red Hat Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Original Authors:
  25  *   Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26  *
  27  * Kernel port Author: Dave Airlie
  28  */
  29
  30 #ifndef RADEON_MODE_H
  31 #define RADEON_MODE_H
  32
  33 #include <drm_crtc.h>
  34 #include <drm_mode.h>
  35 #include <drm_edid.h>
  36 #include <drm_dp_helper.h>
  37 #include <linux/i2c.h>
  38 #include <linux/i2c-id.h>
  39 #include <linux/i2c-algo-bit.h>
  40 #include "radeon_fixed.h"
  41
  42 struct radeon_device;
  43
  44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  48
  49 enum radeon_rmx_type {
  50         RMX_OFF,
  51         RMX_FULL,
  52         RMX_CENTER,
  53         RMX_ASPECT
  54 };
  55
  56 enum radeon_tv_std {
  57         TV_STD_NTSC,
  58         TV_STD_PAL,
  59         TV_STD_PAL_M,
  60         TV_STD_PAL_60,
  61         TV_STD_NTSC_J,
  62         TV_STD_SCART_PAL,
  63         TV_STD_SECAM,
  64         TV_STD_PAL_CN,
  65         TV_STD_PAL_N,
  66 };
  67
  68 /* radeon gpio-based i2c
  69  * 1. "mask" reg and bits
  70  *    grabs the gpio pins for software use
  71  *    0=not held  1=held
  72  * 2. "a" reg and bits
  73  *    output pin value
  74  *    0=low 1=high
  75  * 3. "en" reg and bits
  76  *    sets the pin direction
  77  *    0=input 1=output
  78  * 4. "y" reg and bits
  79  *    input pin value
  80  *    0=low 1=high
  81  */
  82 struct radeon_i2c_bus_rec {
  83         bool valid;
  84         /* id used by atom */
  85         uint8_t i2c_id;
  86         /* id used by atom */
  87         uint8_t hpd_id;
  88         /* can be used with hw i2c engine */
  89         bool hw_capable;
  90         /* uses multi-media i2c engine */
  91         bool mm_i2c;
  92         /* regs and bits */
  93         uint32_t mask_clk_reg;
  94         uint32_t mask_data_reg;
  95         uint32_t a_clk_reg;
  96         uint32_t a_data_reg;
  97         uint32_t en_clk_reg;
  98         uint32_t en_data_reg;
  99         uint32_t y_clk_reg;
 100         uint32_t y_data_reg;
 101         uint32_t mask_clk_mask;
 102         uint32_t mask_data_mask;
 103         uint32_t a_clk_mask;
 104         uint32_t a_data_mask;
 105         uint32_t en_clk_mask;
 106         uint32_t en_data_mask;
 107         uint32_t y_clk_mask;
 108         uint32_t y_data_mask;
 109 };
 110
 111 struct radeon_tmds_pll {
 112     uint32_t freq;
 113     uint32_t value;
 114 };
 115
 116 #define RADEON_MAX_BIOS_CONNECTOR 16
 117
 118 /* pll flags */
 119 #define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
 120 #define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
 121 #define RADEON_PLL_USE_REF_DIV          (1 << 2)
 122 #define RADEON_PLL_LEGACY               (1 << 3)
 123 #define RADEON_PLL_PREFER_LOW_REF_DIV   (1 << 4)
 124 #define RADEON_PLL_PREFER_HIGH_REF_DIV  (1 << 5)
 125 #define RADEON_PLL_PREFER_LOW_FB_DIV    (1 << 6)
 126 #define RADEON_PLL_PREFER_HIGH_FB_DIV   (1 << 7)
 127 #define RADEON_PLL_PREFER_LOW_POST_DIV  (1 << 8)
 128 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
 129 #define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
 130 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
 131 #define RADEON_PLL_USE_POST_DIV         (1 << 12)
 132 #define RADEON_PLL_IS_LCD               (1 << 13)
 133
 134 /* pll algo */
 135 enum radeon_pll_algo {
 136         PLL_ALGO_LEGACY,
 137         PLL_ALGO_NEW
 138 };
 139
 140 struct radeon_pll {
 141         /* reference frequency */
 142         uint32_t reference_freq;
 143
 144         /* fixed dividers */
 145         uint32_t reference_div;
 146         uint32_t post_div;
 147
 148         /* pll in/out limits */
 149         uint32_t pll_in_min;
 150         uint32_t pll_in_max;
 151         uint32_t pll_out_min;
 152         uint32_t pll_out_max;
 153         uint32_t lcd_pll_out_min;
 154         uint32_t lcd_pll_out_max;
 155         uint32_t best_vco;
 156
 157         /* divider limits */
 158         uint32_t min_ref_div;
 159         uint32_t max_ref_div;
 160         uint32_t min_post_div;
 161         uint32_t max_post_div;
 162         uint32_t min_feedback_div;
 163         uint32_t max_feedback_div;
 164         uint32_t min_frac_feedback_div;
 165         uint32_t max_frac_feedback_div;
 166
 167         /* flags for the current clock */
 168         uint32_t flags;
 169
 170         /* pll id */
 171         uint32_t id;
 172         /* pll algo */
 173         enum radeon_pll_algo algo;
 174 };
 175
 176 struct i2c_algo_radeon_data {
 177         struct i2c_adapter bit_adapter;
 178         struct i2c_algo_bit_data bit_data;
 179 };
 180
 181 struct radeon_i2c_chan {
 182         struct i2c_adapter adapter;
 183         struct drm_device *dev;
 184         union {
 185                 struct i2c_algo_dp_aux_data dp;
 186                 struct i2c_algo_radeon_data radeon;
 187         } algo;
 188         struct radeon_i2c_bus_rec rec;
 189 };
 190
 191 /* mostly for macs, but really any system without connector tables */
 192 enum radeon_connector_table {
 193         CT_NONE,
 194         CT_GENERIC,
 195         CT_IBOOK,
 196         CT_POWERBOOK_EXTERNAL,
 197         CT_POWERBOOK_INTERNAL,
 198         CT_POWERBOOK_VGA,
 199         CT_MINI_EXTERNAL,
 200         CT_MINI_INTERNAL,
 201         CT_IMAC_G5_ISIGHT,
 202         CT_EMAC,
 203 };
 204
 205 enum radeon_dvo_chip {
 206         DVO_SIL164,
 207         DVO_SIL1178,
 208 };
 209
 210 struct radeon_mode_info {
 211         struct atom_context *atom_context;
 212         struct card_info *atom_card_info;
 213         enum radeon_connector_table connector_table;
 214         bool mode_config_initialized;
 215         struct radeon_crtc *crtcs[6];
 216         /* DVI-I properties */
 217         struct drm_property *coherent_mode_property;
 218         /* DAC enable load detect */
 219         struct drm_property *load_detect_property;
 220         /* TV standard load detect */
 221         struct drm_property *tv_std_property;
 222         /* legacy TMDS PLL detect */
 223         struct drm_property *tmds_pll_property;
 224         /* hardcoded DFP edid from BIOS */
 225         struct edid *bios_hardcoded_edid;
 226 };
 227
 228 #define MAX_H_CODE_TIMING_LEN 32
 229 #define MAX_V_CODE_TIMING_LEN 32
 230
 231 /* need to store these as reading
 232    back code tables is excessive */
 233 struct radeon_tv_regs {
 234         uint32_t tv_uv_adr;
 235         uint32_t timing_cntl;
 236         uint32_t hrestart;
 237         uint32_t vrestart;
 238         uint32_t frestart;
 239         uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
 240         uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
 241 };
 242
 243 struct radeon_crtc {
 244         struct drm_crtc base;
 245         int crtc_id;
 246         u16 lut_r[256], lut_g[256], lut_b[256];
 247         bool enabled;
 248         bool can_tile;
 249         uint32_t crtc_offset;
 250         struct drm_gem_object *cursor_bo;
 251         uint64_t cursor_addr;
 252         int cursor_width;
 253         int cursor_height;
 254         uint32_t legacy_display_base_addr;
 255         uint32_t legacy_cursor_offset;
 256         enum radeon_rmx_type rmx_type;
 257         fixed20_12 vsc;
 258         fixed20_12 hsc;
 259         struct drm_display_mode native_mode;
 260         int pll_id;
 261 };
 262
 263 struct radeon_encoder_primary_dac {
 264         /* legacy primary dac */
 265         uint32_t ps2_pdac_adj;
 266 };
 267
 268 struct radeon_encoder_lvds {
 269         /* legacy lvds */
 270         uint16_t panel_vcc_delay;
 271         uint8_t  panel_pwr_delay;
 272         uint8_t  panel_digon_delay;
 273         uint8_t  panel_blon_delay;
 274         uint16_t panel_ref_divider;
 275         uint8_t  panel_post_divider;
 276         uint16_t panel_fb_divider;
 277         bool     use_bios_dividers;
 278         uint32_t lvds_gen_cntl;
 279         /* panel mode */
 280         struct drm_display_mode native_mode;
 281 };
 282
 283 struct radeon_encoder_tv_dac {
 284         /* legacy tv dac */
 285         uint32_t ps2_tvdac_adj;
 286         uint32_t ntsc_tvdac_adj;
 287         uint32_t pal_tvdac_adj;
 288
 289         int               h_pos;
 290         int               v_pos;
 291         int               h_size;
 292         int               supported_tv_stds;
 293         bool              tv_on;
 294         enum radeon_tv_std tv_std;
 295         struct radeon_tv_regs tv;
 296 };
 297
 298 struct radeon_encoder_int_tmds {
 299         /* legacy int tmds */
 300         struct radeon_tmds_pll tmds_pll[4];
 301 };
 302
 303 struct radeon_encoder_ext_tmds {
 304         /* tmds over dvo */
 305         struct radeon_i2c_chan *i2c_bus;
 306         uint8_t slave_addr;
 307         enum radeon_dvo_chip dvo_chip;
 308 };
 309
 310 /* spread spectrum */
 311 struct radeon_atom_ss {
 312         uint16_t percentage;
 313         uint8_t type;
 314         uint8_t step;
 315         uint8_t delay;
 316         uint8_t range;
 317         uint8_t refdiv;
 318 };
 319
 320 struct radeon_encoder_atom_dig {
 321         /* atom dig */
 322         bool coherent_mode;
 323         int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
 324         /* atom lvds */
 325         uint32_t lvds_misc;
 326         uint16_t panel_pwr_delay;
 327         enum radeon_pll_algo pll_algo;
 328         struct radeon_atom_ss *ss;
 329         /* panel mode */
 330         struct drm_display_mode native_mode;
 331 };
 332
 333 struct radeon_encoder_atom_dac {
 334         enum radeon_tv_std tv_std;
 335 };
 336
 337 struct radeon_encoder {
 338         struct drm_encoder base;
 339         uint32_t encoder_id;
 340         uint32_t devices;
 341         uint32_t active_device;
 342         uint32_t flags;
 343         uint32_t pixel_clock;
 344         enum radeon_rmx_type rmx_type;
 345         struct drm_display_mode native_mode;
 346         void *enc_priv;
 347         int hdmi_offset;
 348         int hdmi_config_offset;
 349         int hdmi_audio_workaround;
 350         int hdmi_buffer_status;
 351 };
 352
 353 struct radeon_connector_atom_dig {
 354         uint32_t igp_lane_info;
 355         bool linkb;
 356         /* displayport */
 357         struct radeon_i2c_chan *dp_i2c_bus;
 358         u8 dpcd[8];
 359         u8 dp_sink_type;
 360         int dp_clock;
 361         int dp_lane_count;
 362 };
 363
 364 struct radeon_gpio_rec {
 365         bool valid;
 366         u8 id;
 367         u32 reg;
 368         u32 mask;
 369 };
 370
 371 enum radeon_hpd_id {
 372         RADEON_HPD_NONE = 0,
 373         RADEON_HPD_1,
 374         RADEON_HPD_2,
 375         RADEON_HPD_3,
 376         RADEON_HPD_4,
 377         RADEON_HPD_5,
 378         RADEON_HPD_6,
 379 };
 380
 381 struct radeon_hpd {
 382         enum radeon_hpd_id hpd;
 383         u8 plugged_state;
 384         struct radeon_gpio_rec gpio;
 385 };
 386
 387 struct radeon_connector {
 388         struct drm_connector base;
 389         uint32_t connector_id;
 390         uint32_t devices;
 391         struct radeon_i2c_chan *ddc_bus;
 392         /* some systems have a an hdmi and vga port with a shared ddc line */
 393         bool shared_ddc;
 394         bool use_digital;
 395         /* we need to mind the EDID between detect
 396            and get modes due to analog/digital/tvencoder */
 397         struct edid *edid;
 398         void *con_priv;
 399         bool dac_load_detect;
 400         uint16_t connector_object_id;
 401         struct radeon_hpd hpd;
 402 };
 403
 404 struct radeon_framebuffer {
 405         struct drm_framebuffer base;
 406         struct drm_gem_object *obj;
 407 };
 408
 409 extern enum radeon_tv_std
 410 radeon_combios_get_tv_info(struct radeon_device *rdev);
 411 extern enum radeon_tv_std
 412 radeon_atombios_get_tv_info(struct radeon_device *rdev);
 413
 414 extern void radeon_connector_hotplug(struct drm_connector *connector);
 415 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
 416 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
 417                                        struct drm_display_mode *mode);
 418 extern void radeon_dp_set_link_config(struct drm_connector *connector,
 419                                       struct drm_display_mode *mode);
 420 extern void dp_link_train(struct drm_encoder *encoder,
 421                           struct drm_connector *connector);
 422 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
 423 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
 424 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
 425 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
 426                                            int action, uint8_t lane_num,
 427                                            uint8_t lane_set);
 428 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
 429                                 uint8_t write_byte, uint8_t *read_byte);
 430
 431 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
 432                                                     struct radeon_i2c_bus_rec *rec,
 433                                                     const char *name);
 434 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
 435                                                  struct radeon_i2c_bus_rec *rec,
 436                                                  const char *name);
 437 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
 438 extern void radeon_i2c_destroy_dp(struct radeon_i2c_chan *i2c);
 439 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
 440                                 u8 slave_addr,
 441                                 u8 addr,
 442                                 u8 *val);
 443 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
 444                                 u8 slave_addr,
 445                                 u8 addr,
 446                                 u8 val);
 447 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
 448 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
 449
 450 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
 451
 452 extern void radeon_compute_pll(struct radeon_pll *pll,
 453                                uint64_t freq,
 454                                uint32_t *dot_clock_p,
 455                                uint32_t *fb_div_p,
 456                                uint32_t *frac_fb_div_p,
 457                                uint32_t *ref_div_p,
 458                                uint32_t *post_div_p);
 459
 460 extern void radeon_setup_encoder_clones(struct drm_device *dev);
 461
 462 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
 463 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 464 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 465 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
 466 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
 467 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
 468 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
 469 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
 470 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
 471
 472 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
 473 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 474                                    struct drm_framebuffer *old_fb);
 475 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
 476                                    struct drm_display_mode *mode,
 477                                    struct drm_display_mode *adjusted_mode,
 478                                    int x, int y,
 479                                    struct drm_framebuffer *old_fb);
 480 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
 481
 482 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 483                                  struct drm_framebuffer *old_fb);
 484
 485 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
 486                                   struct drm_file *file_priv,
 487                                   uint32_t handle,
 488                                   uint32_t width,
 489                                   uint32_t height);
 490 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
 491                                    int x, int y);
 492
 493 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
 494 extern struct edid *
 495 radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
 496 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
 497 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
 498 extern struct radeon_encoder_atom_dig *
 499 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
 500 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
 501                                           struct radeon_encoder_int_tmds *tmds);
 502 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
 503                                                      struct radeon_encoder_int_tmds *tmds);
 504 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
 505                                                    struct radeon_encoder_int_tmds *tmds);
 506 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
 507                                                          struct radeon_encoder_ext_tmds *tmds);
 508 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
 509                                                        struct radeon_encoder_ext_tmds *tmds);
 510 extern struct radeon_encoder_primary_dac *
 511 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
 512 extern struct radeon_encoder_tv_dac *
 513 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
 514 extern struct radeon_encoder_lvds *
 515 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
 516 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
 517 extern struct radeon_encoder_tv_dac *
 518 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
 519 extern struct radeon_encoder_primary_dac *
 520 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
 521 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
 522 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
 523 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
 524 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
 525 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
 526 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
 527 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
 528 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
 529 extern void
 530 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 531 extern void
 532 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 533 extern void
 534 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 535 extern void
 536 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 537 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 538                                      u16 blue, int regno);
 539 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 540                                      u16 *blue, int regno);
 541 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
 542                                                   struct drm_mode_fb_cmd *mode_cmd,
 543                                                   struct drm_gem_object *obj);
 544
 545 int radeonfb_probe(struct drm_device *dev);
 546
 547 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
 548 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
 549 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
 550 void radeon_atombios_init_crtc(struct drm_device *dev,
 551                                struct radeon_crtc *radeon_crtc);
 552 void radeon_legacy_init_crtc(struct drm_device *dev,
 553                              struct radeon_crtc *radeon_crtc);
 554
 555 void radeon_get_clock_info(struct drm_device *dev);
 556
 557 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
 558 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
 559
 560 void radeon_enc_destroy(struct drm_encoder *encoder);
 561 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
 562 void radeon_combios_asic_init(struct drm_device *dev);
 563 extern int radeon_static_clocks_init(struct drm_device *dev);
 564 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
 565                                         struct drm_display_mode *mode,
 566                                         struct drm_display_mode *adjusted_mode);
 567 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
 568
 569 /* legacy tv */
 570 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
 571                                       uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
 572                                       uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
 573 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
 574                                   uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
 575                                   uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
 576 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
 577                                   uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
 578                                   uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
 579 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
 580                                struct drm_display_mode *mode,
 581                                struct drm_display_mode *adjusted_mode);
 582 #endif