2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
32 #include <linux/list.h>
34 #include "radeon_drm.h"
38 int radeon_ttm_init(struct radeon_device
*rdev
);
39 void radeon_ttm_fini(struct radeon_device
*rdev
);
40 static void radeon_bo_clear_surface_reg(struct radeon_bo
*bo
);
43 * To exclude mutual BO access we rely on bo_reserve exclusion, as all
44 * function are calling it.
47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object
*tbo
)
51 bo
= container_of(tbo
, struct radeon_bo
, tbo
);
52 mutex_lock(&bo
->rdev
->gem
.mutex
);
53 list_del_init(&bo
->list
);
54 mutex_unlock(&bo
->rdev
->gem
.mutex
);
55 radeon_bo_clear_surface_reg(bo
);
59 static inline u32
radeon_ttm_flags_from_domain(u32 domain
)
63 if (domain
& RADEON_GEM_DOMAIN_VRAM
) {
64 flags
|= TTM_PL_FLAG_VRAM
| TTM_PL_FLAG_WC
| TTM_PL_FLAG_UNCACHED
;
66 if (domain
& RADEON_GEM_DOMAIN_GTT
) {
67 flags
|= TTM_PL_FLAG_TT
| TTM_PL_MASK_CACHING
;
69 if (domain
& RADEON_GEM_DOMAIN_CPU
) {
70 flags
|= TTM_PL_FLAG_SYSTEM
| TTM_PL_MASK_CACHING
;
73 flags
|= TTM_PL_FLAG_SYSTEM
| TTM_PL_MASK_CACHING
;
78 int radeon_bo_create(struct radeon_device
*rdev
, struct drm_gem_object
*gobj
,
79 unsigned long size
, bool kernel
, u32 domain
,
80 struct radeon_bo
**bo_ptr
)
83 enum ttm_bo_type type
;
87 if (unlikely(rdev
->mman
.bdev
.dev_mapping
== NULL
)) {
88 rdev
->mman
.bdev
.dev_mapping
= rdev
->ddev
->dev_mapping
;
91 type
= ttm_bo_type_kernel
;
93 type
= ttm_bo_type_device
;
96 bo
= kzalloc(sizeof(struct radeon_bo
), GFP_KERNEL
);
101 bo
->surface_reg
= -1;
102 INIT_LIST_HEAD(&bo
->list
);
104 flags
= radeon_ttm_flags_from_domain(domain
);
106 r
= ttm_buffer_object_init(&rdev
->mman
.bdev
, &bo
->tbo
, size
, type
,
107 flags
, 0, 0, true, NULL
, size
,
108 &radeon_ttm_bo_destroy
);
109 if (unlikely(r
!= 0)) {
112 /* ttm call radeon_ttm_object_object_destroy if error happen */
113 dev_err(rdev
->dev
, "object_init failed for (%ld, 0x%08X)\n",
119 mutex_lock(&bo
->rdev
->gem
.mutex
);
120 list_add_tail(&bo
->list
, &rdev
->gem
.objects
);
121 mutex_unlock(&bo
->rdev
->gem
.mutex
);
126 int radeon_bo_kmap(struct radeon_bo
*bo
, void **ptr
)
137 r
= ttm_bo_kmap(&bo
->tbo
, 0, bo
->tbo
.num_pages
, &bo
->kmap
);
141 bo
->kptr
= ttm_kmap_obj_virtual(&bo
->kmap
, &is_iomem
);
145 radeon_bo_check_tiling(bo
, 0, 0);
149 void radeon_bo_kunmap(struct radeon_bo
*bo
)
151 if (bo
->kptr
== NULL
)
154 radeon_bo_check_tiling(bo
, 0, 0);
155 ttm_bo_kunmap(&bo
->kmap
);
158 void radeon_bo_unref(struct radeon_bo
**bo
)
160 struct ttm_buffer_object
*tbo
;
170 int radeon_bo_pin(struct radeon_bo
*bo
, u32 domain
, u64
*gpu_addr
)
176 flags
= radeon_ttm_flags_from_domain(domain
);
180 *gpu_addr
= radeon_bo_gpu_offset(bo
);
183 tmp
= bo
->tbo
.mem
.placement
;
184 ttm_flag_masked(&tmp
, flags
, TTM_PL_MASK_MEM
);
185 bo
->tbo
.proposed_placement
= tmp
| TTM_PL_FLAG_NO_EVICT
|
188 r
= ttm_buffer_object_validate(&bo
->tbo
, bo
->tbo
.proposed_placement
,
190 if (likely(r
== 0)) {
192 if (gpu_addr
!= NULL
)
193 *gpu_addr
= radeon_bo_gpu_offset(bo
);
195 if (unlikely(r
!= 0)) {
198 dev_err(bo
->rdev
->dev
, "%p pin failed\n", bo
);
203 int radeon_bo_unpin(struct radeon_bo
*bo
)
207 if (!bo
->pin_count
) {
208 dev_warn(bo
->rdev
->dev
, "%p unpin not necessary\n", bo
);
214 bo
->tbo
.proposed_placement
= bo
->tbo
.mem
.placement
&
215 ~TTM_PL_FLAG_NO_EVICT
;
217 r
= ttm_buffer_object_validate(&bo
->tbo
, bo
->tbo
.proposed_placement
,
219 if (unlikely(r
!= 0)) {
222 dev_err(bo
->rdev
->dev
, "%p validate failed for unpin\n", bo
);
228 int radeon_bo_evict_vram(struct radeon_device
*rdev
)
230 if (rdev
->flags
& RADEON_IS_IGP
) {
231 /* Useless to evict on IGP chips */
234 return ttm_bo_evict_mm(&rdev
->mman
.bdev
, TTM_PL_VRAM
);
237 void radeon_bo_force_delete(struct radeon_device
*rdev
)
239 struct radeon_bo
*bo
, *n
;
240 struct drm_gem_object
*gobj
;
242 if (list_empty(&rdev
->gem
.objects
)) {
245 dev_err(rdev
->dev
, "Userspace still has active objects !\n");
246 list_for_each_entry_safe(bo
, n
, &rdev
->gem
.objects
, list
) {
247 mutex_lock(&rdev
->ddev
->struct_mutex
);
249 dev_err(rdev
->dev
, "%p %p %lu %lu force free\n",
250 gobj
, bo
, (unsigned long)gobj
->size
,
251 *((unsigned long *)&gobj
->refcount
));
252 mutex_lock(&bo
->rdev
->gem
.mutex
);
253 list_del_init(&bo
->list
);
254 mutex_unlock(&bo
->rdev
->gem
.mutex
);
255 radeon_bo_unref(&bo
);
256 gobj
->driver_private
= NULL
;
257 drm_gem_object_unreference(gobj
);
258 mutex_unlock(&rdev
->ddev
->struct_mutex
);
262 int radeon_bo_init(struct radeon_device
*rdev
)
264 /* Add an MTRR for the VRAM */
265 rdev
->mc
.vram_mtrr
= mtrr_add(rdev
->mc
.aper_base
, rdev
->mc
.aper_size
,
266 MTRR_TYPE_WRCOMB
, 1);
267 DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
268 rdev
->mc
.mc_vram_size
>> 20,
269 (unsigned long long)rdev
->mc
.aper_size
>> 20);
270 DRM_INFO("RAM width %dbits %cDR\n",
271 rdev
->mc
.vram_width
, rdev
->mc
.vram_is_ddr
? 'D' : 'S');
272 return radeon_ttm_init(rdev
);
275 void radeon_bo_fini(struct radeon_device
*rdev
)
277 radeon_ttm_fini(rdev
);
280 void radeon_bo_list_add_object(struct radeon_bo_list
*lobj
,
281 struct list_head
*head
)
284 list_add(&lobj
->list
, head
);
286 list_add_tail(&lobj
->list
, head
);
290 int radeon_bo_list_reserve(struct list_head
*head
)
292 struct radeon_bo_list
*lobj
;
295 list_for_each_entry(lobj
, head
, list
){
296 r
= radeon_bo_reserve(lobj
->bo
, false);
297 if (unlikely(r
!= 0))
303 void radeon_bo_list_unreserve(struct list_head
*head
)
305 struct radeon_bo_list
*lobj
;
307 list_for_each_entry(lobj
, head
, list
) {
308 /* only unreserve object we successfully reserved */
309 if (radeon_bo_is_reserved(lobj
->bo
))
310 radeon_bo_unreserve(lobj
->bo
);
314 int radeon_bo_list_validate(struct list_head
*head
, void *fence
)
316 struct radeon_bo_list
*lobj
;
317 struct radeon_bo
*bo
;
318 struct radeon_fence
*old_fence
= NULL
;
321 r
= radeon_bo_list_reserve(head
);
322 if (unlikely(r
!= 0)) {
325 list_for_each_entry(lobj
, head
, list
) {
327 if (!bo
->pin_count
) {
329 bo
->tbo
.proposed_placement
=
330 radeon_ttm_flags_from_domain(lobj
->wdomain
);
332 bo
->tbo
.proposed_placement
=
333 radeon_ttm_flags_from_domain(lobj
->rdomain
);
336 r
= ttm_buffer_object_validate(&bo
->tbo
,
337 bo
->tbo
.proposed_placement
,
345 lobj
->gpu_offset
= radeon_bo_gpu_offset(bo
);
346 lobj
->tiling_flags
= bo
->tiling_flags
;
348 old_fence
= (struct radeon_fence
*)bo
->tbo
.sync_obj
;
349 bo
->tbo
.sync_obj
= radeon_fence_ref(fence
);
350 bo
->tbo
.sync_obj_arg
= NULL
;
353 radeon_fence_unref(&old_fence
);
359 void radeon_bo_list_unvalidate(struct list_head
*head
, void *fence
)
361 struct radeon_bo_list
*lobj
;
362 struct radeon_fence
*old_fence
;
365 list_for_each_entry(lobj
, head
, list
) {
366 old_fence
= to_radeon_fence(lobj
->bo
->tbo
.sync_obj
);
367 if (old_fence
== fence
) {
368 lobj
->bo
->tbo
.sync_obj
= NULL
;
369 radeon_fence_unref(&old_fence
);
372 radeon_bo_list_unreserve(head
);
375 int radeon_bo_fbdev_mmap(struct radeon_bo
*bo
,
376 struct vm_area_struct
*vma
)
378 return ttm_fbdev_mmap(vma
, &bo
->tbo
);
381 static int radeon_bo_get_surface_reg(struct radeon_bo
*bo
)
383 struct radeon_device
*rdev
= bo
->rdev
;
384 struct radeon_surface_reg
*reg
;
385 struct radeon_bo
*old_object
;
389 BUG_ON(!atomic_read(&bo
->tbo
.reserved
));
391 if (!bo
->tiling_flags
)
394 if (bo
->surface_reg
>= 0) {
395 reg
= &rdev
->surface_regs
[bo
->surface_reg
];
401 for (i
= 0; i
< RADEON_GEM_MAX_SURFACES
; i
++) {
403 reg
= &rdev
->surface_regs
[i
];
407 old_object
= reg
->bo
;
408 if (old_object
->pin_count
== 0)
412 /* if we are all out */
413 if (i
== RADEON_GEM_MAX_SURFACES
) {
416 /* find someone with a surface reg and nuke their BO */
417 reg
= &rdev
->surface_regs
[steal
];
418 old_object
= reg
->bo
;
419 /* blow away the mapping */
420 DRM_DEBUG("stealing surface reg %d from %p\n", steal
, old_object
);
421 ttm_bo_unmap_virtual(&old_object
->tbo
);
422 old_object
->surface_reg
= -1;
430 radeon_set_surface_reg(rdev
, i
, bo
->tiling_flags
, bo
->pitch
,
431 bo
->tbo
.mem
.mm_node
->start
<< PAGE_SHIFT
,
432 bo
->tbo
.num_pages
<< PAGE_SHIFT
);
436 static void radeon_bo_clear_surface_reg(struct radeon_bo
*bo
)
438 struct radeon_device
*rdev
= bo
->rdev
;
439 struct radeon_surface_reg
*reg
;
441 if (bo
->surface_reg
== -1)
444 reg
= &rdev
->surface_regs
[bo
->surface_reg
];
445 radeon_clear_surface_reg(rdev
, bo
->surface_reg
);
448 bo
->surface_reg
= -1;
451 int radeon_bo_set_tiling_flags(struct radeon_bo
*bo
,
452 uint32_t tiling_flags
, uint32_t pitch
)
456 r
= radeon_bo_reserve(bo
, false);
457 if (unlikely(r
!= 0))
459 bo
->tiling_flags
= tiling_flags
;
461 radeon_bo_unreserve(bo
);
465 void radeon_bo_get_tiling_flags(struct radeon_bo
*bo
,
466 uint32_t *tiling_flags
,
469 BUG_ON(!atomic_read(&bo
->tbo
.reserved
));
471 *tiling_flags
= bo
->tiling_flags
;
476 int radeon_bo_check_tiling(struct radeon_bo
*bo
, bool has_moved
,
479 BUG_ON(!atomic_read(&bo
->tbo
.reserved
));
481 if (!(bo
->tiling_flags
& RADEON_TILING_SURFACE
))
485 radeon_bo_clear_surface_reg(bo
);
489 if (bo
->tbo
.mem
.mem_type
!= TTM_PL_VRAM
) {
493 if (bo
->surface_reg
>= 0)
494 radeon_bo_clear_surface_reg(bo
);
498 if ((bo
->surface_reg
>= 0) && !has_moved
)
501 return radeon_bo_get_surface_reg(bo
);
504 void radeon_bo_move_notify(struct ttm_buffer_object
*bo
,
505 struct ttm_mem_reg
*mem
)
507 struct radeon_bo
*rbo
= container_of(bo
, struct radeon_bo
, tbo
);
508 radeon_bo_check_tiling(rbo
, 0, 1);
511 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object
*bo
)
513 struct radeon_bo
*rbo
= container_of(bo
, struct radeon_bo
, tbo
);
514 radeon_bo_check_tiling(rbo
, 0, 0);
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