drivers/gpu/drm/radeon/radeon_ring.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include <linux/seq_file.h>
  29 #include "drmP.h"
  30 #include "radeon_drm.h"
  31 #include "radeon_reg.h"
  32 #include "radeon.h"
  33 #include "atom.h"
  34
  35 int radeon_debugfs_ib_init(struct radeon_device *rdev);
  36
  37 void radeon_ib_bogus_cleanup(struct radeon_device *rdev)
  38 {
  39         struct radeon_ib *ib, *n;
  40
  41         list_for_each_entry_safe(ib, n, &rdev->ib_pool.bogus_ib, list) {
  42                 list_del(&ib->list);
  43                 vfree(ib->ptr);
  44                 kfree(ib);
  45         }
  46 }
  47
  48 void radeon_ib_bogus_add(struct radeon_device *rdev, struct radeon_ib *ib)
  49 {
  50         struct radeon_ib *bib;
  51
  52         bib = kmalloc(sizeof(*bib), GFP_KERNEL);
  53         if (bib == NULL)
  54                 return;
  55         bib->ptr = vmalloc(ib->length_dw * 4);
  56         if (bib->ptr == NULL) {
  57                 kfree(bib);
  58                 return;
  59         }
  60         memcpy(bib->ptr, ib->ptr, ib->length_dw * 4);
  61         bib->length_dw = ib->length_dw;
  62         mutex_lock(&rdev->ib_pool.mutex);
  63         list_add_tail(&bib->list, &rdev->ib_pool.bogus_ib);
  64         mutex_unlock(&rdev->ib_pool.mutex);
  65 }
  66
  67 /*
  68  * IB.
  69  */
  70 int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
  71 {
  72         struct radeon_fence *fence;
  73         struct radeon_ib *nib;
  74         int r = 0, i, c;
  75
  76         *ib = NULL;
  77         r = radeon_fence_create(rdev, &fence);
  78         if (r) {
  79                 dev_err(rdev->dev, "failed to create fence for new IB\n");
  80                 return r;
  81         }
  82         mutex_lock(&rdev->ib_pool.mutex);
  83         for (i = rdev->ib_pool.head_id, c = 0, nib = NULL; c < RADEON_IB_POOL_SIZE; c++, i++) {
  84                 i &= (RADEON_IB_POOL_SIZE - 1);
  85                 if (rdev->ib_pool.ibs[i].free) {
  86                         nib = &rdev->ib_pool.ibs[i];
  87                         break;
  88                 }
  89         }
  90         if (nib == NULL) {
  91                 /* This should never happen, it means we allocated all
  92                  * IB and haven't scheduled one yet, return EBUSY to
  93                  * userspace hoping that on ioctl recall we get better
  94                  * luck
  95                  */
  96                 dev_err(rdev->dev, "no free indirect buffer !\n");
  97                 mutex_unlock(&rdev->ib_pool.mutex);
  98                 radeon_fence_unref(&fence);
  99                 return -EBUSY;
 100         }
 101         rdev->ib_pool.head_id = (nib->idx + 1) & (RADEON_IB_POOL_SIZE - 1);
 102         nib->free = false;
 103         if (nib->fence) {
 104                 mutex_unlock(&rdev->ib_pool.mutex);
 105                 r = radeon_fence_wait(nib->fence, false);
 106                 if (r) {
 107                         dev_err(rdev->dev, "error waiting fence of IB(%u:0x%016lX:%u)\n",
 108                                 nib->idx, (unsigned long)nib->gpu_addr, nib->length_dw);
 109                         mutex_lock(&rdev->ib_pool.mutex);
 110                         nib->free = true;
 111                         mutex_unlock(&rdev->ib_pool.mutex);
 112                         radeon_fence_unref(&fence);
 113                         return r;
 114                 }
 115                 mutex_lock(&rdev->ib_pool.mutex);
 116         }
 117         radeon_fence_unref(&nib->fence);
 118         nib->fence = fence;
 119         nib->length_dw = 0;
 120         mutex_unlock(&rdev->ib_pool.mutex);
 121         *ib = nib;
 122         return 0;
 123 }
 124
 125 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
 126 {
 127         struct radeon_ib *tmp = *ib;
 128
 129         *ib = NULL;
 130         if (tmp == NULL) {
 131                 return;
 132         }
 133         mutex_lock(&rdev->ib_pool.mutex);
 134         tmp->free = true;
 135         mutex_unlock(&rdev->ib_pool.mutex);
 136 }
 137
 138 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
 139 {
 140         int r = 0;
 141
 142         if (!ib->length_dw || !rdev->cp.ready) {
 143                 /* TODO: Nothings in the ib we should report. */
 144                 DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib->idx);
 145                 return -EINVAL;
 146         }
 147
 148         /* 64 dwords should be enough for fence too */
 149         r = radeon_ring_lock(rdev, 64);
 150         if (r) {
 151                 DRM_ERROR("radeon: scheduling IB failled (%d).\n", r);
 152                 return r;
 153         }
 154         radeon_ring_ib_execute(rdev, ib);
 155         radeon_fence_emit(rdev, ib->fence);
 156         mutex_lock(&rdev->ib_pool.mutex);
 157         /* once scheduled IB is considered free and protected by the fence */
 158         ib->free = true;
 159         mutex_unlock(&rdev->ib_pool.mutex);
 160         radeon_ring_unlock_commit(rdev);
 161         return 0;
 162 }
 163
 164 int radeon_ib_pool_init(struct radeon_device *rdev)
 165 {
 166         void *ptr;
 167         uint64_t gpu_addr;
 168         int i;
 169         int r = 0;
 170
 171         if (rdev->ib_pool.robj)
 172                 return 0;
 173         INIT_LIST_HEAD(&rdev->ib_pool.bogus_ib);
 174         /* Allocate 1M object buffer */
 175         r = radeon_bo_create(rdev, NULL,  RADEON_IB_POOL_SIZE*64*1024,
 176                                 true, RADEON_GEM_DOMAIN_GTT,
 177                                 &rdev->ib_pool.robj);
 178         if (r) {
 179                 DRM_ERROR("radeon: failed to ib pool (%d).\n", r);
 180                 return r;
 181         }
 182         r = radeon_bo_reserve(rdev->ib_pool.robj, false);
 183         if (unlikely(r != 0))
 184                 return r;
 185         r = radeon_bo_pin(rdev->ib_pool.robj, RADEON_GEM_DOMAIN_GTT, &gpu_addr);
 186         if (r) {
 187                 radeon_bo_unreserve(rdev->ib_pool.robj);
 188                 DRM_ERROR("radeon: failed to pin ib pool (%d).\n", r);
 189                 return r;
 190         }
 191         r = radeon_bo_kmap(rdev->ib_pool.robj, &ptr);
 192         radeon_bo_unreserve(rdev->ib_pool.robj);
 193         if (r) {
 194                 DRM_ERROR("radeon: failed to map ib poll (%d).\n", r);
 195                 return r;
 196         }
 197         for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
 198                 unsigned offset;
 199
 200                 offset = i * 64 * 1024;
 201                 rdev->ib_pool.ibs[i].gpu_addr = gpu_addr + offset;
 202                 rdev->ib_pool.ibs[i].ptr = ptr + offset;
 203                 rdev->ib_pool.ibs[i].idx = i;
 204                 rdev->ib_pool.ibs[i].length_dw = 0;
 205                 rdev->ib_pool.ibs[i].free = true;
 206         }
 207         rdev->ib_pool.head_id = 0;
 208         rdev->ib_pool.ready = true;
 209         DRM_INFO("radeon: ib pool ready.\n");
 210         if (radeon_debugfs_ib_init(rdev)) {
 211                 DRM_ERROR("Failed to register debugfs file for IB !\n");
 212         }
 213         return r;
 214 }
 215
 216 void radeon_ib_pool_fini(struct radeon_device *rdev)
 217 {
 218         int r;
 219
 220         if (!rdev->ib_pool.ready) {
 221                 return;
 222         }
 223         mutex_lock(&rdev->ib_pool.mutex);
 224         radeon_ib_bogus_cleanup(rdev);
 225         if (rdev->ib_pool.robj) {
 226                 r = radeon_bo_reserve(rdev->ib_pool.robj, false);
 227                 if (likely(r == 0)) {
 228                         radeon_bo_kunmap(rdev->ib_pool.robj);
 229                         radeon_bo_unpin(rdev->ib_pool.robj);
 230                         radeon_bo_unreserve(rdev->ib_pool.robj);
 231                 }
 232                 radeon_bo_unref(&rdev->ib_pool.robj);
 233                 rdev->ib_pool.robj = NULL;
 234         }
 235         mutex_unlock(&rdev->ib_pool.mutex);
 236 }
 237
 238
 239 /*
 240  * Ring.
 241  */
 242 void radeon_ring_free_size(struct radeon_device *rdev)
 243 {
 244         if (rdev->family >= CHIP_R600)
 245                 rdev->cp.rptr = RREG32(R600_CP_RB_RPTR);
 246         else
 247                 rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
 248         /* This works because ring_size is a power of 2 */
 249         rdev->cp.ring_free_dw = (rdev->cp.rptr + (rdev->cp.ring_size / 4));
 250         rdev->cp.ring_free_dw -= rdev->cp.wptr;
 251         rdev->cp.ring_free_dw &= rdev->cp.ptr_mask;
 252         if (!rdev->cp.ring_free_dw) {
 253                 rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
 254         }
 255 }
 256
 257 int radeon_ring_lock(struct radeon_device *rdev, unsigned ndw)
 258 {
 259         int r;
 260
 261         /* Align requested size with padding so unlock_commit can
 262          * pad safely */
 263         ndw = (ndw + rdev->cp.align_mask) & ~rdev->cp.align_mask;
 264         mutex_lock(&rdev->cp.mutex);
 265         while (ndw > (rdev->cp.ring_free_dw - 1)) {
 266                 radeon_ring_free_size(rdev);
 267                 if (ndw < rdev->cp.ring_free_dw) {
 268                         break;
 269                 }
 270                 r = radeon_fence_wait_next(rdev);
 271                 if (r) {
 272                         mutex_unlock(&rdev->cp.mutex);
 273                         return r;
 274                 }
 275         }
 276         rdev->cp.count_dw = ndw;
 277         rdev->cp.wptr_old = rdev->cp.wptr;
 278         return 0;
 279 }
 280
 281 void radeon_ring_unlock_commit(struct radeon_device *rdev)
 282 {
 283         unsigned count_dw_pad;
 284         unsigned i;
 285
 286         /* We pad to match fetch size */
 287         count_dw_pad = (rdev->cp.align_mask + 1) -
 288                        (rdev->cp.wptr & rdev->cp.align_mask);
 289         for (i = 0; i < count_dw_pad; i++) {
 290                 radeon_ring_write(rdev, 2 << 30);
 291         }
 292         DRM_MEMORYBARRIER();
 293         radeon_cp_commit(rdev);
 294         mutex_unlock(&rdev->cp.mutex);
 295 }
 296
 297 void radeon_ring_unlock_undo(struct radeon_device *rdev)
 298 {
 299         rdev->cp.wptr = rdev->cp.wptr_old;
 300         mutex_unlock(&rdev->cp.mutex);
 301 }
 302
 303 int radeon_ring_init(struct radeon_device *rdev, unsigned ring_size)
 304 {
 305         int r;
 306
 307         rdev->cp.ring_size = ring_size;
 308         /* Allocate ring buffer */
 309         if (rdev->cp.ring_obj == NULL) {
 310                 r = radeon_bo_create(rdev, NULL, rdev->cp.ring_size, true,
 311                                         RADEON_GEM_DOMAIN_GTT,
 312                                         &rdev->cp.ring_obj);
 313                 if (r) {
 314                         dev_err(rdev->dev, "(%d) ring create failed\n", r);
 315                         return r;
 316                 }
 317                 r = radeon_bo_reserve(rdev->cp.ring_obj, false);
 318                 if (unlikely(r != 0))
 319                         return r;
 320                 r = radeon_bo_pin(rdev->cp.ring_obj, RADEON_GEM_DOMAIN_GTT,
 321                                         &rdev->cp.gpu_addr);
 322                 if (r) {
 323                         radeon_bo_unreserve(rdev->cp.ring_obj);
 324                         dev_err(rdev->dev, "(%d) ring pin failed\n", r);
 325                         return r;
 326                 }
 327                 r = radeon_bo_kmap(rdev->cp.ring_obj,
 328                                        (void **)&rdev->cp.ring);
 329                 radeon_bo_unreserve(rdev->cp.ring_obj);
 330                 if (r) {
 331                         dev_err(rdev->dev, "(%d) ring map failed\n", r);
 332                         return r;
 333                 }
 334         }
 335         rdev->cp.ptr_mask = (rdev->cp.ring_size / 4) - 1;
 336         rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
 337         return 0;
 338 }
 339
 340 void radeon_ring_fini(struct radeon_device *rdev)
 341 {
 342         int r;
 343
 344         mutex_lock(&rdev->cp.mutex);
 345         if (rdev->cp.ring_obj) {
 346                 r = radeon_bo_reserve(rdev->cp.ring_obj, false);
 347                 if (likely(r == 0)) {
 348                         radeon_bo_kunmap(rdev->cp.ring_obj);
 349                         radeon_bo_unpin(rdev->cp.ring_obj);
 350                         radeon_bo_unreserve(rdev->cp.ring_obj);
 351                 }
 352                 radeon_bo_unref(&rdev->cp.ring_obj);
 353                 rdev->cp.ring = NULL;
 354                 rdev->cp.ring_obj = NULL;
 355         }
 356         mutex_unlock(&rdev->cp.mutex);
 357 }
 358
 359
 360 /*
 361  * Debugfs info
 362  */
 363 #if defined(CONFIG_DEBUG_FS)
 364 static int radeon_debugfs_ib_info(struct seq_file *m, void *data)
 365 {
 366         struct drm_info_node *node = (struct drm_info_node *) m->private;
 367         struct radeon_ib *ib = node->info_ent->data;
 368         unsigned i;
 369
 370         if (ib == NULL) {
 371                 return 0;
 372         }
 373         seq_printf(m, "IB %04u\n", ib->idx);
 374         seq_printf(m, "IB fence %p\n", ib->fence);
 375         seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
 376         for (i = 0; i < ib->length_dw; i++) {
 377                 seq_printf(m, "[%05u]=0x%08X\n", i, ib->ptr[i]);
 378         }
 379         return 0;
 380 }
 381
 382 static int radeon_debugfs_ib_bogus_info(struct seq_file *m, void *data)
 383 {
 384         struct drm_info_node *node = (struct drm_info_node *) m->private;
 385         struct radeon_device *rdev = node->info_ent->data;
 386         struct radeon_ib *ib;
 387         unsigned i;
 388
 389         mutex_lock(&rdev->ib_pool.mutex);
 390         if (list_empty(&rdev->ib_pool.bogus_ib)) {
 391                 mutex_unlock(&rdev->ib_pool.mutex);
 392                 seq_printf(m, "no bogus IB recorded\n");
 393                 return 0;
 394         }
 395         ib = list_first_entry(&rdev->ib_pool.bogus_ib, struct radeon_ib, list);
 396         list_del_init(&ib->list);
 397         mutex_unlock(&rdev->ib_pool.mutex);
 398         seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
 399         for (i = 0; i < ib->length_dw; i++) {
 400                 seq_printf(m, "[%05u]=0x%08X\n", i, ib->ptr[i]);
 401         }
 402         vfree(ib->ptr);
 403         kfree(ib);
 404         return 0;
 405 }
 406
 407 static struct drm_info_list radeon_debugfs_ib_list[RADEON_IB_POOL_SIZE];
 408 static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];
 409
 410 static struct drm_info_list radeon_debugfs_ib_bogus_info_list[] = {
 411         {"radeon_ib_bogus", radeon_debugfs_ib_bogus_info, 0, NULL},
 412 };
 413 #endif
 414
 415 int radeon_debugfs_ib_init(struct radeon_device *rdev)
 416 {
 417 #if defined(CONFIG_DEBUG_FS)
 418         unsigned i;
 419         int r;
 420
 421         radeon_debugfs_ib_bogus_info_list[0].data = rdev;
 422         r = radeon_debugfs_add_files(rdev, radeon_debugfs_ib_bogus_info_list, 1);
 423         if (r)
 424                 return r;
 425         for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
 426                 sprintf(radeon_debugfs_ib_names[i], "radeon_ib_%04u", i);
 427                 radeon_debugfs_ib_list[i].name = radeon_debugfs_ib_names[i];
 428                 radeon_debugfs_ib_list[i].show = &radeon_debugfs_ib_info;
 429                 radeon_debugfs_ib_list[i].driver_features = 0;
 430                 radeon_debugfs_ib_list[i].data = &rdev->ib_pool.ibs[i];
 431         }
 432         return radeon_debugfs_add_files(rdev, radeon_debugfs_ib_list,
 433                                         RADEON_IB_POOL_SIZE);
 434 #else
 435         return 0;
 436 #endif
 437 }