2 * Copyright 2013 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
25 * Authors: Christian König <christian.koenig@amd.com>
28 #include <linux/firmware.h>
29 #include <linux/module.h>
34 #include "radeon_asic.h"
37 /* 1 second timeout */
38 #define VCE_IDLE_TIMEOUT_MS 1000
41 #define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin"
43 MODULE_FIRMWARE(FIRMWARE_BONAIRE
);
45 static void radeon_vce_idle_work_handler(struct work_struct
*work
);
48 * radeon_vce_init - allocate memory, load vce firmware
50 * @rdev: radeon_device pointer
52 * First step to get VCE online, allocate memory and load the firmware
54 int radeon_vce_init(struct radeon_device
*rdev
)
56 static const char *fw_version
= "[ATI LIB=VCEFW,";
57 static const char *fb_version
= "[ATI LIB=VCEFWSTATS,";
59 const char *fw_name
, *c
;
60 uint8_t start
, mid
, end
;
63 INIT_DELAYED_WORK(&rdev
->vce
.idle_work
, radeon_vce_idle_work_handler
);
65 switch (rdev
->family
) {
71 fw_name
= FIRMWARE_BONAIRE
;
78 r
= request_firmware(&rdev
->vce_fw
, fw_name
, rdev
->dev
);
80 dev_err(rdev
->dev
, "radeon_vce: Can't load firmware \"%s\"\n",
85 /* search for firmware version */
87 size
= rdev
->vce_fw
->size
- strlen(fw_version
) - 9;
88 c
= rdev
->vce_fw
->data
;
89 for (;size
> 0; --size
, ++c
)
90 if (strncmp(c
, fw_version
, strlen(fw_version
)) == 0)
96 c
+= strlen(fw_version
);
97 if (sscanf(c
, "%2hhd.%2hhd.%2hhd]", &start
, &mid
, &end
) != 3)
100 /* search for feedback version */
102 size
= rdev
->vce_fw
->size
- strlen(fb_version
) - 3;
103 c
= rdev
->vce_fw
->data
;
104 for (;size
> 0; --size
, ++c
)
105 if (strncmp(c
, fb_version
, strlen(fb_version
)) == 0)
111 c
+= strlen(fb_version
);
112 if (sscanf(c
, "%2u]", &rdev
->vce
.fb_version
) != 1)
115 DRM_INFO("Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d!\n",
116 start
, mid
, end
, rdev
->vce
.fb_version
);
118 rdev
->vce
.fw_version
= (start
<< 24) | (mid
<< 16) | (end
<< 8);
120 /* we can only work with this fw version for now */
121 if (rdev
->vce
.fw_version
!= ((40 << 24) | (2 << 16) | (2 << 8)))
124 /* allocate firmware, stack and heap BO */
126 size
= RADEON_GPU_PAGE_ALIGN(rdev
->vce_fw
->size
) +
127 RADEON_VCE_STACK_SIZE
+ RADEON_VCE_HEAP_SIZE
;
128 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true,
129 RADEON_GEM_DOMAIN_VRAM
, 0, NULL
, &rdev
->vce
.vcpu_bo
);
131 dev_err(rdev
->dev
, "(%d) failed to allocate VCE bo\n", r
);
135 r
= radeon_bo_reserve(rdev
->vce
.vcpu_bo
, false);
137 radeon_bo_unref(&rdev
->vce
.vcpu_bo
);
138 dev_err(rdev
->dev
, "(%d) failed to reserve VCE bo\n", r
);
142 r
= radeon_bo_pin(rdev
->vce
.vcpu_bo
, RADEON_GEM_DOMAIN_VRAM
,
143 &rdev
->vce
.gpu_addr
);
144 radeon_bo_unreserve(rdev
->vce
.vcpu_bo
);
146 radeon_bo_unref(&rdev
->vce
.vcpu_bo
);
147 dev_err(rdev
->dev
, "(%d) VCE bo pin failed\n", r
);
151 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
152 atomic_set(&rdev
->vce
.handles
[i
], 0);
153 rdev
->vce
.filp
[i
] = NULL
;
160 * radeon_vce_fini - free memory
162 * @rdev: radeon_device pointer
164 * Last step on VCE teardown, free firmware memory
166 void radeon_vce_fini(struct radeon_device
*rdev
)
168 if (rdev
->vce
.vcpu_bo
== NULL
)
171 radeon_bo_unref(&rdev
->vce
.vcpu_bo
);
173 release_firmware(rdev
->vce_fw
);
177 * radeon_vce_suspend - unpin VCE fw memory
179 * @rdev: radeon_device pointer
182 int radeon_vce_suspend(struct radeon_device
*rdev
)
186 if (rdev
->vce
.vcpu_bo
== NULL
)
189 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
)
190 if (atomic_read(&rdev
->vce
.handles
[i
]))
193 if (i
== RADEON_MAX_VCE_HANDLES
)
196 /* TODO: suspending running encoding sessions isn't supported */
201 * radeon_vce_resume - pin VCE fw memory
203 * @rdev: radeon_device pointer
206 int radeon_vce_resume(struct radeon_device
*rdev
)
211 if (rdev
->vce
.vcpu_bo
== NULL
)
214 r
= radeon_bo_reserve(rdev
->vce
.vcpu_bo
, false);
216 dev_err(rdev
->dev
, "(%d) failed to reserve VCE bo\n", r
);
220 r
= radeon_bo_kmap(rdev
->vce
.vcpu_bo
, &cpu_addr
);
222 radeon_bo_unreserve(rdev
->vce
.vcpu_bo
);
223 dev_err(rdev
->dev
, "(%d) VCE map failed\n", r
);
227 memcpy(cpu_addr
, rdev
->vce_fw
->data
, rdev
->vce_fw
->size
);
229 radeon_bo_kunmap(rdev
->vce
.vcpu_bo
);
231 radeon_bo_unreserve(rdev
->vce
.vcpu_bo
);
237 * radeon_vce_idle_work_handler - power off VCE
239 * @work: pointer to work structure
241 * power of VCE when it's not used any more
243 static void radeon_vce_idle_work_handler(struct work_struct
*work
)
245 struct radeon_device
*rdev
=
246 container_of(work
, struct radeon_device
, vce
.idle_work
.work
);
248 if ((radeon_fence_count_emitted(rdev
, TN_RING_TYPE_VCE1_INDEX
) == 0) &&
249 (radeon_fence_count_emitted(rdev
, TN_RING_TYPE_VCE2_INDEX
) == 0)) {
250 if ((rdev
->pm
.pm_method
== PM_METHOD_DPM
) && rdev
->pm
.dpm_enabled
) {
251 radeon_dpm_enable_vce(rdev
, false);
253 radeon_set_vce_clocks(rdev
, 0, 0);
256 schedule_delayed_work(&rdev
->vce
.idle_work
,
257 msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS
));
262 * radeon_vce_note_usage - power up VCE
264 * @rdev: radeon_device pointer
266 * Make sure VCE is powerd up when we want to use it
268 void radeon_vce_note_usage(struct radeon_device
*rdev
)
270 bool streams_changed
= false;
271 bool set_clocks
= !cancel_delayed_work_sync(&rdev
->vce
.idle_work
);
272 set_clocks
&= schedule_delayed_work(&rdev
->vce
.idle_work
,
273 msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS
));
275 if ((rdev
->pm
.pm_method
== PM_METHOD_DPM
) && rdev
->pm
.dpm_enabled
) {
276 /* XXX figure out if the streams changed */
277 streams_changed
= false;
280 if (set_clocks
|| streams_changed
) {
281 if ((rdev
->pm
.pm_method
== PM_METHOD_DPM
) && rdev
->pm
.dpm_enabled
) {
282 radeon_dpm_enable_vce(rdev
, true);
284 radeon_set_vce_clocks(rdev
, 53300, 40000);
290 * radeon_vce_free_handles - free still open VCE handles
292 * @rdev: radeon_device pointer
293 * @filp: drm file pointer
295 * Close all VCE handles still open by this file pointer
297 void radeon_vce_free_handles(struct radeon_device
*rdev
, struct drm_file
*filp
)
300 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
301 uint32_t handle
= atomic_read(&rdev
->vce
.handles
[i
]);
302 if (!handle
|| rdev
->vce
.filp
[i
] != filp
)
305 radeon_vce_note_usage(rdev
);
307 r
= radeon_vce_get_destroy_msg(rdev
, TN_RING_TYPE_VCE1_INDEX
,
310 DRM_ERROR("Error destroying VCE handle (%d)!\n", r
);
312 rdev
->vce
.filp
[i
] = NULL
;
313 atomic_set(&rdev
->vce
.handles
[i
], 0);
318 * radeon_vce_get_create_msg - generate a VCE create msg
320 * @rdev: radeon_device pointer
321 * @ring: ring we should submit the msg to
322 * @handle: VCE session handle to use
323 * @fence: optional fence to return
325 * Open up a stream for HW test
327 int radeon_vce_get_create_msg(struct radeon_device
*rdev
, int ring
,
328 uint32_t handle
, struct radeon_fence
**fence
)
330 const unsigned ib_size_dw
= 1024;
335 r
= radeon_ib_get(rdev
, ring
, &ib
, NULL
, ib_size_dw
* 4);
337 DRM_ERROR("radeon: failed to get ib (%d).\n", r
);
341 dummy
= ib
.gpu_addr
+ 1024;
343 /* stitch together an VCE create msg */
345 ib
.ptr
[ib
.length_dw
++] = 0x0000000c; /* len */
346 ib
.ptr
[ib
.length_dw
++] = 0x00000001; /* session cmd */
347 ib
.ptr
[ib
.length_dw
++] = handle
;
349 ib
.ptr
[ib
.length_dw
++] = 0x00000030; /* len */
350 ib
.ptr
[ib
.length_dw
++] = 0x01000001; /* create cmd */
351 ib
.ptr
[ib
.length_dw
++] = 0x00000000;
352 ib
.ptr
[ib
.length_dw
++] = 0x00000042;
353 ib
.ptr
[ib
.length_dw
++] = 0x0000000a;
354 ib
.ptr
[ib
.length_dw
++] = 0x00000001;
355 ib
.ptr
[ib
.length_dw
++] = 0x00000080;
356 ib
.ptr
[ib
.length_dw
++] = 0x00000060;
357 ib
.ptr
[ib
.length_dw
++] = 0x00000100;
358 ib
.ptr
[ib
.length_dw
++] = 0x00000100;
359 ib
.ptr
[ib
.length_dw
++] = 0x0000000c;
360 ib
.ptr
[ib
.length_dw
++] = 0x00000000;
362 ib
.ptr
[ib
.length_dw
++] = 0x00000014; /* len */
363 ib
.ptr
[ib
.length_dw
++] = 0x05000005; /* feedback buffer */
364 ib
.ptr
[ib
.length_dw
++] = upper_32_bits(dummy
);
365 ib
.ptr
[ib
.length_dw
++] = dummy
;
366 ib
.ptr
[ib
.length_dw
++] = 0x00000001;
368 for (i
= ib
.length_dw
; i
< ib_size_dw
; ++i
)
371 r
= radeon_ib_schedule(rdev
, &ib
, NULL
, false);
373 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r
);
377 *fence
= radeon_fence_ref(ib
.fence
);
379 radeon_ib_free(rdev
, &ib
);
385 * radeon_vce_get_destroy_msg - generate a VCE destroy msg
387 * @rdev: radeon_device pointer
388 * @ring: ring we should submit the msg to
389 * @handle: VCE session handle to use
390 * @fence: optional fence to return
392 * Close up a stream for HW test or if userspace failed to do so
394 int radeon_vce_get_destroy_msg(struct radeon_device
*rdev
, int ring
,
395 uint32_t handle
, struct radeon_fence
**fence
)
397 const unsigned ib_size_dw
= 1024;
402 r
= radeon_ib_get(rdev
, ring
, &ib
, NULL
, ib_size_dw
* 4);
404 DRM_ERROR("radeon: failed to get ib (%d).\n", r
);
408 dummy
= ib
.gpu_addr
+ 1024;
410 /* stitch together an VCE destroy msg */
412 ib
.ptr
[ib
.length_dw
++] = 0x0000000c; /* len */
413 ib
.ptr
[ib
.length_dw
++] = 0x00000001; /* session cmd */
414 ib
.ptr
[ib
.length_dw
++] = handle
;
416 ib
.ptr
[ib
.length_dw
++] = 0x00000014; /* len */
417 ib
.ptr
[ib
.length_dw
++] = 0x05000005; /* feedback buffer */
418 ib
.ptr
[ib
.length_dw
++] = upper_32_bits(dummy
);
419 ib
.ptr
[ib
.length_dw
++] = dummy
;
420 ib
.ptr
[ib
.length_dw
++] = 0x00000001;
422 ib
.ptr
[ib
.length_dw
++] = 0x00000008; /* len */
423 ib
.ptr
[ib
.length_dw
++] = 0x02000001; /* destroy cmd */
425 for (i
= ib
.length_dw
; i
< ib_size_dw
; ++i
)
428 r
= radeon_ib_schedule(rdev
, &ib
, NULL
, false);
430 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r
);
434 *fence
= radeon_fence_ref(ib
.fence
);
436 radeon_ib_free(rdev
, &ib
);
442 * radeon_vce_cs_reloc - command submission relocation
445 * @lo: address of lower dword
446 * @hi: address of higher dword
447 * @size: size of checker for relocation buffer
449 * Patch relocation inside command stream with real buffer address
451 int radeon_vce_cs_reloc(struct radeon_cs_parser
*p
, int lo
, int hi
,
454 struct radeon_cs_chunk
*relocs_chunk
;
455 struct radeon_cs_reloc
*reloc
;
456 uint64_t start
, end
, offset
;
459 relocs_chunk
= &p
->chunks
[p
->chunk_relocs_idx
];
460 offset
= radeon_get_ib_value(p
, lo
);
461 idx
= radeon_get_ib_value(p
, hi
);
463 if (idx
>= relocs_chunk
->length_dw
) {
464 DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
465 idx
, relocs_chunk
->length_dw
);
469 reloc
= p
->relocs_ptr
[(idx
/ 4)];
470 start
= reloc
->gpu_offset
;
471 end
= start
+ radeon_bo_size(reloc
->robj
);
474 p
->ib
.ptr
[lo
] = start
& 0xFFFFFFFF;
475 p
->ib
.ptr
[hi
] = start
>> 32;
478 DRM_ERROR("invalid reloc offset %llX!\n", offset
);
481 if ((end
- start
) < size
) {
482 DRM_ERROR("buffer to small (%d / %d)!\n",
483 (unsigned)(end
- start
), size
);
491 * radeon_vce_validate_handle - validate stream handle
494 * @handle: handle to validate
496 * Validates the handle and return the found session index or -EINVAL
497 * we we don't have another free session index.
499 int radeon_vce_validate_handle(struct radeon_cs_parser
*p
, uint32_t handle
)
503 /* validate the handle */
504 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
505 if (atomic_read(&p
->rdev
->vce
.handles
[i
]) == handle
)
509 /* handle not found try to alloc a new one */
510 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
511 if (!atomic_cmpxchg(&p
->rdev
->vce
.handles
[i
], 0, handle
)) {
512 p
->rdev
->vce
.filp
[i
] = p
->filp
;
513 p
->rdev
->vce
.img_size
[i
] = 0;
518 DRM_ERROR("No more free VCE handles!\n");
523 * radeon_vce_cs_parse - parse and validate the command stream
528 int radeon_vce_cs_parse(struct radeon_cs_parser
*p
)
530 int session_idx
= -1;
531 bool destroyed
= false;
532 uint32_t tmp
, handle
= 0;
533 uint32_t *size
= &tmp
;
536 while (p
->idx
< p
->chunks
[p
->chunk_ib_idx
].length_dw
) {
537 uint32_t len
= radeon_get_ib_value(p
, p
->idx
);
538 uint32_t cmd
= radeon_get_ib_value(p
, p
->idx
+ 1);
540 if ((len
< 8) || (len
& 3)) {
541 DRM_ERROR("invalid VCE command length (%d)!\n", len
);
546 DRM_ERROR("No other command allowed after destroy!\n");
551 case 0x00000001: // session
552 handle
= radeon_get_ib_value(p
, p
->idx
+ 2);
553 session_idx
= radeon_vce_validate_handle(p
, handle
);
556 size
= &p
->rdev
->vce
.img_size
[session_idx
];
559 case 0x00000002: // task info
562 case 0x01000001: // create
563 *size
= radeon_get_ib_value(p
, p
->idx
+ 8) *
564 radeon_get_ib_value(p
, p
->idx
+ 10) *
568 case 0x04000001: // config extension
569 case 0x04000002: // pic control
570 case 0x04000005: // rate control
571 case 0x04000007: // motion estimation
572 case 0x04000008: // rdo
575 case 0x03000001: // encode
576 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 10, p
->idx
+ 9,
581 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 12, p
->idx
+ 11,
587 case 0x02000001: // destroy
591 case 0x05000001: // context buffer
592 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 3, p
->idx
+ 2,
598 case 0x05000004: // video bitstream buffer
599 tmp
= radeon_get_ib_value(p
, p
->idx
+ 4);
600 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 3, p
->idx
+ 2,
606 case 0x05000005: // feedback buffer
607 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 3, p
->idx
+ 2,
614 DRM_ERROR("invalid VCE command (0x%x)!\n", cmd
);
618 if (session_idx
== -1) {
619 DRM_ERROR("no session command at start of IB\n");
627 /* IB contains a destroy msg, free the handle */
628 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
)
629 atomic_cmpxchg(&p
->rdev
->vce
.handles
[i
], handle
, 0);
636 * radeon_vce_semaphore_emit - emit a semaphore command
638 * @rdev: radeon_device pointer
639 * @ring: engine to use
640 * @semaphore: address of semaphore
641 * @emit_wait: true=emit wait, false=emit signal
644 bool radeon_vce_semaphore_emit(struct radeon_device
*rdev
,
645 struct radeon_ring
*ring
,
646 struct radeon_semaphore
*semaphore
,
649 uint64_t addr
= semaphore
->gpu_addr
;
651 radeon_ring_write(ring
, VCE_CMD_SEMAPHORE
);
652 radeon_ring_write(ring
, (addr
>> 3) & 0x000FFFFF);
653 radeon_ring_write(ring
, (addr
>> 23) & 0x000FFFFF);
654 radeon_ring_write(ring
, 0x01003000 | (emit_wait
? 1 : 0));
656 radeon_ring_write(ring
, VCE_CMD_END
);
662 * radeon_vce_ib_execute - execute indirect buffer
664 * @rdev: radeon_device pointer
665 * @ib: the IB to execute
668 void radeon_vce_ib_execute(struct radeon_device
*rdev
, struct radeon_ib
*ib
)
670 struct radeon_ring
*ring
= &rdev
->ring
[ib
->ring
];
671 radeon_ring_write(ring
, VCE_CMD_IB
);
672 radeon_ring_write(ring
, ib
->gpu_addr
);
673 radeon_ring_write(ring
, upper_32_bits(ib
->gpu_addr
));
674 radeon_ring_write(ring
, ib
->length_dw
);
678 * radeon_vce_fence_emit - add a fence command to the ring
680 * @rdev: radeon_device pointer
684 void radeon_vce_fence_emit(struct radeon_device
*rdev
,
685 struct radeon_fence
*fence
)
687 struct radeon_ring
*ring
= &rdev
->ring
[fence
->ring
];
688 uint64_t addr
= rdev
->fence_drv
[fence
->ring
].gpu_addr
;
690 radeon_ring_write(ring
, VCE_CMD_FENCE
);
691 radeon_ring_write(ring
, addr
);
692 radeon_ring_write(ring
, upper_32_bits(addr
));
693 radeon_ring_write(ring
, fence
->seq
);
694 radeon_ring_write(ring
, VCE_CMD_TRAP
);
695 radeon_ring_write(ring
, VCE_CMD_END
);
699 * radeon_vce_ring_test - test if VCE ring is working
701 * @rdev: radeon_device pointer
702 * @ring: the engine to test on
705 int radeon_vce_ring_test(struct radeon_device
*rdev
, struct radeon_ring
*ring
)
707 uint32_t rptr
= vce_v1_0_get_rptr(rdev
, ring
);
711 r
= radeon_ring_lock(rdev
, ring
, 16);
713 DRM_ERROR("radeon: vce failed to lock ring %d (%d).\n",
717 radeon_ring_write(ring
, VCE_CMD_END
);
718 radeon_ring_unlock_commit(rdev
, ring
, false);
720 for (i
= 0; i
< rdev
->usec_timeout
; i
++) {
721 if (vce_v1_0_get_rptr(rdev
, ring
) != rptr
)
726 if (i
< rdev
->usec_timeout
) {
727 DRM_INFO("ring test on %d succeeded in %d usecs\n",
730 DRM_ERROR("radeon: ring %d test failed\n",
739 * radeon_vce_ib_test - test if VCE IBs are working
741 * @rdev: radeon_device pointer
742 * @ring: the engine to test on
745 int radeon_vce_ib_test(struct radeon_device
*rdev
, struct radeon_ring
*ring
)
747 struct radeon_fence
*fence
= NULL
;
750 r
= radeon_vce_get_create_msg(rdev
, ring
->idx
, 1, NULL
);
752 DRM_ERROR("radeon: failed to get create msg (%d).\n", r
);
756 r
= radeon_vce_get_destroy_msg(rdev
, ring
->idx
, 1, &fence
);
758 DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r
);
762 r
= radeon_fence_wait(fence
, false);
764 DRM_ERROR("radeon: fence wait failed (%d).\n", r
);
766 DRM_INFO("ib test on ring %d succeeded\n", ring
->idx
);
769 radeon_fence_unref(&fence
);