drivers/gpu/drm/rcar-du/rcar_du_kms.c

   1 /*
   2  * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
   3  *
   4  * Copyright (C) 2013-2015 Renesas Electronics Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <drm/drmP.h>
  15 #include <drm/drm_atomic.h>
  16 #include <drm/drm_atomic_helper.h>
  17 #include <drm/drm_crtc.h>
  18 #include <drm/drm_crtc_helper.h>
  19 #include <drm/drm_fb_cma_helper.h>
  20 #include <drm/drm_gem_cma_helper.h>
  21
  22 #include <linux/of_graph.h>
  23 #include <linux/wait.h>
  24
  25 #include "rcar_du_crtc.h"
  26 #include "rcar_du_drv.h"
  27 #include "rcar_du_encoder.h"
  28 #include "rcar_du_kms.h"
  29 #include "rcar_du_lvdsenc.h"
  30 #include "rcar_du_regs.h"
  31 #include "rcar_du_vsp.h"
  32
  33 /* -----------------------------------------------------------------------------
  34  * Format helpers
  35  */
  36
  37 static const struct rcar_du_format_info rcar_du_format_infos[] = {
  38         {
  39                 .fourcc = DRM_FORMAT_RGB565,
  40                 .bpp = 16,
  41                 .planes = 1,
  42                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  43                 .edf = PnDDCR4_EDF_NONE,
  44         }, {
  45                 .fourcc = DRM_FORMAT_ARGB1555,
  46                 .bpp = 16,
  47                 .planes = 1,
  48                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  49                 .edf = PnDDCR4_EDF_NONE,
  50         }, {
  51                 .fourcc = DRM_FORMAT_XRGB1555,
  52                 .bpp = 16,
  53                 .planes = 1,
  54                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  55                 .edf = PnDDCR4_EDF_NONE,
  56         }, {
  57                 .fourcc = DRM_FORMAT_XRGB8888,
  58                 .bpp = 32,
  59                 .planes = 1,
  60                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  61                 .edf = PnDDCR4_EDF_RGB888,
  62         }, {
  63                 .fourcc = DRM_FORMAT_ARGB8888,
  64                 .bpp = 32,
  65                 .planes = 1,
  66                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
  67                 .edf = PnDDCR4_EDF_ARGB8888,
  68         }, {
  69                 .fourcc = DRM_FORMAT_UYVY,
  70                 .bpp = 16,
  71                 .planes = 1,
  72                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  73                 .edf = PnDDCR4_EDF_NONE,
  74         }, {
  75                 .fourcc = DRM_FORMAT_YUYV,
  76                 .bpp = 16,
  77                 .planes = 1,
  78                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  79                 .edf = PnDDCR4_EDF_NONE,
  80         }, {
  81                 .fourcc = DRM_FORMAT_NV12,
  82                 .bpp = 12,
  83                 .planes = 2,
  84                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  85                 .edf = PnDDCR4_EDF_NONE,
  86         }, {
  87                 .fourcc = DRM_FORMAT_NV21,
  88                 .bpp = 12,
  89                 .planes = 2,
  90                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  91                 .edf = PnDDCR4_EDF_NONE,
  92         }, {
  93                 .fourcc = DRM_FORMAT_NV16,
  94                 .bpp = 16,
  95                 .planes = 2,
  96                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  97                 .edf = PnDDCR4_EDF_NONE,
  98         },
  99         /* The following formats are not supported on Gen2 and thus have no
 100          * associated .pnmr or .edf settings.
 101          */
 102         {
 103                 .fourcc = DRM_FORMAT_NV61,
 104                 .bpp = 16,
 105                 .planes = 2,
 106         }, {
 107                 .fourcc = DRM_FORMAT_YUV420,
 108                 .bpp = 12,
 109                 .planes = 3,
 110         }, {
 111                 .fourcc = DRM_FORMAT_YVU420,
 112                 .bpp = 12,
 113                 .planes = 3,
 114         }, {
 115                 .fourcc = DRM_FORMAT_YUV422,
 116                 .bpp = 16,
 117                 .planes = 3,
 118         }, {
 119                 .fourcc = DRM_FORMAT_YVU422,
 120                 .bpp = 16,
 121                 .planes = 3,
 122         }, {
 123                 .fourcc = DRM_FORMAT_YUV444,
 124                 .bpp = 24,
 125                 .planes = 3,
 126         }, {
 127                 .fourcc = DRM_FORMAT_YVU444,
 128                 .bpp = 24,
 129                 .planes = 3,
 130         },
 131 };
 132
 133 const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
 134 {
 135         unsigned int i;
 136
 137         for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
 138                 if (rcar_du_format_infos[i].fourcc == fourcc)
 139                         return &rcar_du_format_infos[i];
 140         }
 141
 142         return NULL;
 143 }
 144
 145 /* -----------------------------------------------------------------------------
 146  * Frame buffer
 147  */
 148
 149 int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
 150                         struct drm_mode_create_dumb *args)
 151 {
 152         struct rcar_du_device *rcdu = dev->dev_private;
 153         unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
 154         unsigned int align;
 155
 156         /* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
 157          * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
 158          */
 159         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 160                 align = 128;
 161         else
 162                 align = 16 * args->bpp / 8;
 163
 164         args->pitch = roundup(min_pitch, align);
 165
 166         return drm_gem_cma_dumb_create_internal(file, dev, args);
 167 }
 168
 169 static struct drm_framebuffer *
 170 rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
 171                   const struct drm_mode_fb_cmd2 *mode_cmd)
 172 {
 173         struct rcar_du_device *rcdu = dev->dev_private;
 174         const struct rcar_du_format_info *format;
 175         unsigned int max_pitch;
 176         unsigned int align;
 177         unsigned int bpp;
 178         unsigned int i;
 179
 180         format = rcar_du_format_info(mode_cmd->pixel_format);
 181         if (format == NULL) {
 182                 dev_dbg(dev->dev, "unsupported pixel format %08x\n",
 183                         mode_cmd->pixel_format);
 184                 return ERR_PTR(-EINVAL);
 185         }
 186
 187         /*
 188          * The pitch and alignment constraints are expressed in pixels on the
 189          * hardware side and in bytes in the DRM API.
 190          */
 191         bpp = format->planes == 1 ? format->bpp / 8 : 1;
 192         max_pitch =  4096 * bpp;
 193
 194         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 195                 align = 128;
 196         else
 197                 align = 16 * bpp;
 198
 199         if (mode_cmd->pitches[0] & (align - 1) ||
 200             mode_cmd->pitches[0] >= max_pitch) {
 201                 dev_dbg(dev->dev, "invalid pitch value %u\n",
 202                         mode_cmd->pitches[0]);
 203                 return ERR_PTR(-EINVAL);
 204         }
 205
 206         for (i = 1; i < format->planes; ++i) {
 207                 if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) {
 208                         dev_dbg(dev->dev,
 209                                 "luma and chroma pitches do not match\n");
 210                         return ERR_PTR(-EINVAL);
 211                 }
 212         }
 213
 214         return drm_fb_cma_create(dev, file_priv, mode_cmd);
 215 }
 216
 217 static void rcar_du_output_poll_changed(struct drm_device *dev)
 218 {
 219         struct rcar_du_device *rcdu = dev->dev_private;
 220
 221         drm_fbdev_cma_hotplug_event(rcdu->fbdev);
 222 }
 223
 224 /* -----------------------------------------------------------------------------
 225  * Atomic Check and Update
 226  */
 227
 228 static int rcar_du_atomic_check(struct drm_device *dev,
 229                                 struct drm_atomic_state *state)
 230 {
 231         struct rcar_du_device *rcdu = dev->dev_private;
 232         int ret;
 233
 234         ret = drm_atomic_helper_check(dev, state);
 235         if (ret < 0)
 236                 return ret;
 237
 238         if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
 239                 return 0;
 240
 241         return rcar_du_atomic_check_planes(dev, state);
 242 }
 243
 244 struct rcar_du_commit {
 245         struct work_struct work;
 246         struct drm_device *dev;
 247         struct drm_atomic_state *state;
 248         u32 crtcs;
 249 };
 250
 251 static void rcar_du_atomic_complete(struct rcar_du_commit *commit)
 252 {
 253         struct drm_device *dev = commit->dev;
 254         struct rcar_du_device *rcdu = dev->dev_private;
 255         struct drm_atomic_state *old_state = commit->state;
 256
 257         /* Apply the atomic update. */
 258         drm_atomic_helper_commit_modeset_disables(dev, old_state);
 259         drm_atomic_helper_commit_modeset_enables(dev, old_state);
 260         drm_atomic_helper_commit_planes(dev, old_state, true);
 261
 262         drm_atomic_helper_wait_for_vblanks(dev, old_state);
 263
 264         drm_atomic_helper_cleanup_planes(dev, old_state);
 265
 266         drm_atomic_state_free(old_state);
 267
 268         /* Complete the commit, wake up any waiter. */
 269         spin_lock(&rcdu->commit.wait.lock);
 270         rcdu->commit.pending &= ~commit->crtcs;
 271         wake_up_all_locked(&rcdu->commit.wait);
 272         spin_unlock(&rcdu->commit.wait.lock);
 273
 274         kfree(commit);
 275 }
 276
 277 static void rcar_du_atomic_work(struct work_struct *work)
 278 {
 279         struct rcar_du_commit *commit =
 280                 container_of(work, struct rcar_du_commit, work);
 281
 282         rcar_du_atomic_complete(commit);
 283 }
 284
 285 static int rcar_du_atomic_commit(struct drm_device *dev,
 286                                  struct drm_atomic_state *state,
 287                                  bool nonblock)
 288 {
 289         struct rcar_du_device *rcdu = dev->dev_private;
 290         struct rcar_du_commit *commit;
 291         struct drm_crtc *crtc;
 292         struct drm_crtc_state *crtc_state;
 293         unsigned int i;
 294         int ret;
 295
 296         ret = drm_atomic_helper_prepare_planes(dev, state);
 297         if (ret)
 298                 return ret;
 299
 300         /* Allocate the commit object. */
 301         commit = kzalloc(sizeof(*commit), GFP_KERNEL);
 302         if (commit == NULL) {
 303                 ret = -ENOMEM;
 304                 goto error;
 305         }
 306
 307         INIT_WORK(&commit->work, rcar_du_atomic_work);
 308         commit->dev = dev;
 309         commit->state = state;
 310
 311         /* Wait until all affected CRTCs have completed previous commits and
 312          * mark them as pending.
 313          */
 314         for_each_crtc_in_state(state, crtc, crtc_state, i)
 315                 commit->crtcs |= drm_crtc_mask(crtc);
 316
 317         spin_lock(&rcdu->commit.wait.lock);
 318         ret = wait_event_interruptible_locked(rcdu->commit.wait,
 319                         !(rcdu->commit.pending & commit->crtcs));
 320         if (ret == 0)
 321                 rcdu->commit.pending |= commit->crtcs;
 322         spin_unlock(&rcdu->commit.wait.lock);
 323
 324         if (ret) {
 325                 kfree(commit);
 326                 goto error;
 327         }
 328
 329         /* Swap the state, this is the point of no return. */
 330         drm_atomic_helper_swap_state(state, true);
 331
 332         if (nonblock)
 333                 schedule_work(&commit->work);
 334         else
 335                 rcar_du_atomic_complete(commit);
 336
 337         return 0;
 338
 339 error:
 340         drm_atomic_helper_cleanup_planes(dev, state);
 341         return ret;
 342 }
 343
 344 /* -----------------------------------------------------------------------------
 345  * Initialization
 346  */
 347
 348 static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
 349         .fb_create = rcar_du_fb_create,
 350         .output_poll_changed = rcar_du_output_poll_changed,
 351         .atomic_check = rcar_du_atomic_check,
 352         .atomic_commit = rcar_du_atomic_commit,
 353 };
 354
 355 static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
 356                                      enum rcar_du_output output,
 357                                      struct of_endpoint *ep)
 358 {
 359         static const struct {
 360                 const char *compatible;
 361                 enum rcar_du_encoder_type type;
 362         } encoders[] = {
 363                 { "adi,adv7123", RCAR_DU_ENCODER_VGA },
 364                 { "adi,adv7511w", RCAR_DU_ENCODER_HDMI },
 365                 { "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
 366         };
 367
 368         enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
 369         struct device_node *connector = NULL;
 370         struct device_node *encoder = NULL;
 371         struct device_node *ep_node = NULL;
 372         struct device_node *entity_ep_node;
 373         struct device_node *entity;
 374         int ret;
 375
 376         /*
 377          * Locate the connected entity and infer its type from the number of
 378          * endpoints.
 379          */
 380         entity = of_graph_get_remote_port_parent(ep->local_node);
 381         if (!entity) {
 382                 dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
 383                         ep->local_node->full_name);
 384                 return -ENODEV;
 385         }
 386
 387         entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
 388
 389         for_each_endpoint_of_node(entity, ep_node) {
 390                 if (ep_node == entity_ep_node)
 391                         continue;
 392
 393                 /*
 394                  * We've found one endpoint other than the input, this must
 395                  * be an encoder. Locate the connector.
 396                  */
 397                 encoder = entity;
 398                 connector = of_graph_get_remote_port_parent(ep_node);
 399                 of_node_put(ep_node);
 400
 401                 if (!connector) {
 402                         dev_warn(rcdu->dev,
 403                                  "no connector for encoder %s, skipping\n",
 404                                  encoder->full_name);
 405                         of_node_put(entity_ep_node);
 406                         of_node_put(encoder);
 407                         return -ENODEV;
 408                 }
 409
 410                 break;
 411         }
 412
 413         of_node_put(entity_ep_node);
 414
 415         if (encoder) {
 416                 /*
 417                  * If an encoder has been found, get its type based on its
 418                  * compatible string.
 419                  */
 420                 unsigned int i;
 421
 422                 for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
 423                         if (of_device_is_compatible(encoder,
 424                                                     encoders[i].compatible)) {
 425                                 enc_type = encoders[i].type;
 426                                 break;
 427                         }
 428                 }
 429
 430                 if (i == ARRAY_SIZE(encoders)) {
 431                         dev_warn(rcdu->dev,
 432                                  "unknown encoder type for %s, skipping\n",
 433                                  encoder->full_name);
 434                         of_node_put(encoder);
 435                         of_node_put(connector);
 436                         return -EINVAL;
 437                 }
 438         } else {
 439                 /*
 440                  * If no encoder has been found the entity must be the
 441                  * connector.
 442                  */
 443                 connector = entity;
 444         }
 445
 446         ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
 447         of_node_put(encoder);
 448         of_node_put(connector);
 449
 450         if (ret && ret != -EPROBE_DEFER)
 451                 dev_warn(rcdu->dev,
 452                          "failed to initialize encoder %s (%d), skipping\n",
 453                          encoder->full_name, ret);
 454
 455         return ret;
 456 }
 457
 458 static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
 459 {
 460         struct device_node *np = rcdu->dev->of_node;
 461         struct device_node *ep_node;
 462         unsigned int num_encoders = 0;
 463
 464         /*
 465          * Iterate over the endpoints and create one encoder for each output
 466          * pipeline.
 467          */
 468         for_each_endpoint_of_node(np, ep_node) {
 469                 enum rcar_du_output output;
 470                 struct of_endpoint ep;
 471                 unsigned int i;
 472                 int ret;
 473
 474                 ret = of_graph_parse_endpoint(ep_node, &ep);
 475                 if (ret < 0) {
 476                         of_node_put(ep_node);
 477                         return ret;
 478                 }
 479
 480                 /* Find the output route corresponding to the port number. */
 481                 for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
 482                         if (rcdu->info->routes[i].possible_crtcs &&
 483                             rcdu->info->routes[i].port == ep.port) {
 484                                 output = i;
 485                                 break;
 486                         }
 487                 }
 488
 489                 if (i == RCAR_DU_OUTPUT_MAX) {
 490                         dev_warn(rcdu->dev,
 491                                  "port %u references unexisting output, skipping\n",
 492                                  ep.port);
 493                         continue;
 494                 }
 495
 496                 /* Process the output pipeline. */
 497                 ret = rcar_du_encoders_init_one(rcdu, output, &ep);
 498                 if (ret < 0) {
 499                         if (ret == -EPROBE_DEFER) {
 500                                 of_node_put(ep_node);
 501                                 return ret;
 502                         }
 503
 504                         continue;
 505                 }
 506
 507                 num_encoders++;
 508         }
 509
 510         return num_encoders;
 511 }
 512
 513 static int rcar_du_properties_init(struct rcar_du_device *rcdu)
 514 {
 515         rcdu->props.alpha =
 516                 drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
 517         if (rcdu->props.alpha == NULL)
 518                 return -ENOMEM;
 519
 520         /* The color key is expressed as an RGB888 triplet stored in a 32-bit
 521          * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
 522          * or enable source color keying (1).
 523          */
 524         rcdu->props.colorkey =
 525                 drm_property_create_range(rcdu->ddev, 0, "colorkey",
 526                                           0, 0x01ffffff);
 527         if (rcdu->props.colorkey == NULL)
 528                 return -ENOMEM;
 529
 530         rcdu->props.zpos =
 531                 drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
 532         if (rcdu->props.zpos == NULL)
 533                 return -ENOMEM;
 534
 535         return 0;
 536 }
 537
 538 int rcar_du_modeset_init(struct rcar_du_device *rcdu)
 539 {
 540         static const unsigned int mmio_offsets[] = {
 541                 DU0_REG_OFFSET, DU2_REG_OFFSET
 542         };
 543
 544         struct drm_device *dev = rcdu->ddev;
 545         struct drm_encoder *encoder;
 546         struct drm_fbdev_cma *fbdev;
 547         unsigned int num_encoders;
 548         unsigned int num_groups;
 549         unsigned int i;
 550         int ret;
 551
 552         drm_mode_config_init(dev);
 553
 554         dev->mode_config.min_width = 0;
 555         dev->mode_config.min_height = 0;
 556         dev->mode_config.max_width = 4095;
 557         dev->mode_config.max_height = 2047;
 558         dev->mode_config.funcs = &rcar_du_mode_config_funcs;
 559
 560         rcdu->num_crtcs = rcdu->info->num_crtcs;
 561
 562         ret = rcar_du_properties_init(rcdu);
 563         if (ret < 0)
 564                 return ret;
 565
 566         /* Initialize the groups. */
 567         num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
 568
 569         for (i = 0; i < num_groups; ++i) {
 570                 struct rcar_du_group *rgrp = &rcdu->groups[i];
 571
 572                 mutex_init(&rgrp->lock);
 573
 574                 rgrp->dev = rcdu;
 575                 rgrp->mmio_offset = mmio_offsets[i];
 576                 rgrp->index = i;
 577                 rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U);
 578
 579                 /* If we have more than one CRTCs in this group pre-associate
 580                  * the low-order planes with CRTC 0 and the high-order planes
 581                  * with CRTC 1 to minimize flicker occurring when the
 582                  * association is changed.
 583                  */
 584                 rgrp->dptsr_planes = rgrp->num_crtcs > 1
 585                                    ? (rcdu->info->gen >= 3 ? 0x04 : 0xf0)
 586                                    : 0;
 587
 588                 if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
 589                         ret = rcar_du_planes_init(rgrp);
 590                         if (ret < 0)
 591                                 return ret;
 592                 }
 593         }
 594
 595         /* Initialize the compositors. */
 596         if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
 597                 for (i = 0; i < rcdu->num_crtcs; ++i) {
 598                         struct rcar_du_vsp *vsp = &rcdu->vsps[i];
 599
 600                         vsp->index = i;
 601                         vsp->dev = rcdu;
 602                         rcdu->crtcs[i].vsp = vsp;
 603
 604                         ret = rcar_du_vsp_init(vsp);
 605                         if (ret < 0)
 606                                 return ret;
 607                 }
 608         }
 609
 610         /* Create the CRTCs. */
 611         for (i = 0; i < rcdu->num_crtcs; ++i) {
 612                 struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
 613
 614                 ret = rcar_du_crtc_create(rgrp, i);
 615                 if (ret < 0)
 616                         return ret;
 617         }
 618
 619         /* Initialize the encoders. */
 620         ret = rcar_du_lvdsenc_init(rcdu);
 621         if (ret < 0)
 622                 return ret;
 623
 624         ret = rcar_du_encoders_init(rcdu);
 625         if (ret < 0)
 626                 return ret;
 627
 628         if (ret == 0) {
 629                 dev_err(rcdu->dev, "error: no encoder could be initialized\n");
 630                 return -EINVAL;
 631         }
 632
 633         num_encoders = ret;
 634
 635         /* Set the possible CRTCs and possible clones. There's always at least
 636          * one way for all encoders to clone each other, set all bits in the
 637          * possible clones field.
 638          */
 639         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 640                 struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
 641                 const struct rcar_du_output_routing *route =
 642                         &rcdu->info->routes[renc->output];
 643
 644                 encoder->possible_crtcs = route->possible_crtcs;
 645                 encoder->possible_clones = (1 << num_encoders) - 1;
 646         }
 647
 648         drm_mode_config_reset(dev);
 649
 650         drm_kms_helper_poll_init(dev);
 651
 652         if (dev->mode_config.num_connector) {
 653                 fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
 654                                            dev->mode_config.num_connector);
 655                 if (IS_ERR(fbdev))
 656                         return PTR_ERR(fbdev);
 657
 658                 rcdu->fbdev = fbdev;
 659         } else {
 660                 dev_info(rcdu->dev,
 661                          "no connector found, disabling fbdev emulation\n");
 662         }
 663
 664         return 0;
 665 }