drivers/gpu/drm/rcar-du/rcar_du_kms.c

   1 /*
   2  * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
   3  *
   4  * Copyright (C) 2013 Renesas Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <drm/drmP.h>
  15 #include <drm/drm_crtc.h>
  16 #include <drm/drm_crtc_helper.h>
  17 #include <drm/drm_fb_cma_helper.h>
  18 #include <drm/drm_gem_cma_helper.h>
  19
  20 #include "rcar_du_crtc.h"
  21 #include "rcar_du_drv.h"
  22 #include "rcar_du_encoder.h"
  23 #include "rcar_du_kms.h"
  24 #include "rcar_du_lvdsenc.h"
  25 #include "rcar_du_regs.h"
  26
  27 /* -----------------------------------------------------------------------------
  28  * Format helpers
  29  */
  30
  31 static const struct rcar_du_format_info rcar_du_format_infos[] = {
  32         {
  33                 .fourcc = DRM_FORMAT_RGB565,
  34                 .bpp = 16,
  35                 .planes = 1,
  36                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  37                 .edf = PnDDCR4_EDF_NONE,
  38         }, {
  39                 .fourcc = DRM_FORMAT_ARGB1555,
  40                 .bpp = 16,
  41                 .planes = 1,
  42                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  43                 .edf = PnDDCR4_EDF_NONE,
  44         }, {
  45                 .fourcc = DRM_FORMAT_XRGB1555,
  46                 .bpp = 16,
  47                 .planes = 1,
  48                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  49                 .edf = PnDDCR4_EDF_NONE,
  50         }, {
  51                 .fourcc = DRM_FORMAT_XRGB8888,
  52                 .bpp = 32,
  53                 .planes = 1,
  54                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  55                 .edf = PnDDCR4_EDF_RGB888,
  56         }, {
  57                 .fourcc = DRM_FORMAT_ARGB8888,
  58                 .bpp = 32,
  59                 .planes = 1,
  60                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
  61                 .edf = PnDDCR4_EDF_ARGB8888,
  62         }, {
  63                 .fourcc = DRM_FORMAT_UYVY,
  64                 .bpp = 16,
  65                 .planes = 1,
  66                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  67                 .edf = PnDDCR4_EDF_NONE,
  68         }, {
  69                 .fourcc = DRM_FORMAT_YUYV,
  70                 .bpp = 16,
  71                 .planes = 1,
  72                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  73                 .edf = PnDDCR4_EDF_NONE,
  74         }, {
  75                 .fourcc = DRM_FORMAT_NV12,
  76                 .bpp = 12,
  77                 .planes = 2,
  78                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  79                 .edf = PnDDCR4_EDF_NONE,
  80         }, {
  81                 .fourcc = DRM_FORMAT_NV21,
  82                 .bpp = 12,
  83                 .planes = 2,
  84                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  85                 .edf = PnDDCR4_EDF_NONE,
  86         }, {
  87                 /* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
  88                 .fourcc = DRM_FORMAT_NV16,
  89                 .bpp = 16,
  90                 .planes = 2,
  91                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  92                 .edf = PnDDCR4_EDF_NONE,
  93         },
  94 };
  95
  96 const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
  97 {
  98         unsigned int i;
  99
 100         for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
 101                 if (rcar_du_format_infos[i].fourcc == fourcc)
 102                         return &rcar_du_format_infos[i];
 103         }
 104
 105         return NULL;
 106 }
 107
 108 /* -----------------------------------------------------------------------------
 109  * Frame buffer
 110  */
 111
 112 int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
 113                         struct drm_mode_create_dumb *args)
 114 {
 115         struct rcar_du_device *rcdu = dev->dev_private;
 116         unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
 117         unsigned int align;
 118
 119         /* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
 120          * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
 121          */
 122         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 123                 align = 128;
 124         else
 125                 align = 16 * args->bpp / 8;
 126
 127         args->pitch = roundup(max(args->pitch, min_pitch), align);
 128
 129         return drm_gem_cma_dumb_create(file, dev, args);
 130 }
 131
 132 static struct drm_framebuffer *
 133 rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
 134                   struct drm_mode_fb_cmd2 *mode_cmd)
 135 {
 136         struct rcar_du_device *rcdu = dev->dev_private;
 137         const struct rcar_du_format_info *format;
 138         unsigned int max_pitch;
 139         unsigned int align;
 140         unsigned int bpp;
 141
 142         format = rcar_du_format_info(mode_cmd->pixel_format);
 143         if (format == NULL) {
 144                 dev_dbg(dev->dev, "unsupported pixel format %08x\n",
 145                         mode_cmd->pixel_format);
 146                 return ERR_PTR(-EINVAL);
 147         }
 148
 149         /*
 150          * The pitch and alignment constraints are expressed in pixels on the
 151          * hardware side and in bytes in the DRM API.
 152          */
 153         bpp = format->planes == 2 ? 1 : format->bpp / 8;
 154         max_pitch =  4096 * bpp;
 155
 156         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 157                 align = 128;
 158         else
 159                 align = 16 * bpp;
 160
 161         if (mode_cmd->pitches[0] & (align - 1) ||
 162             mode_cmd->pitches[0] >= max_pitch) {
 163                 dev_dbg(dev->dev, "invalid pitch value %u\n",
 164                         mode_cmd->pitches[0]);
 165                 return ERR_PTR(-EINVAL);
 166         }
 167
 168         if (format->planes == 2) {
 169                 if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
 170                         dev_dbg(dev->dev,
 171                                 "luma and chroma pitches do not match\n");
 172                         return ERR_PTR(-EINVAL);
 173                 }
 174         }
 175
 176         return drm_fb_cma_create(dev, file_priv, mode_cmd);
 177 }
 178
 179 static void rcar_du_output_poll_changed(struct drm_device *dev)
 180 {
 181         struct rcar_du_device *rcdu = dev->dev_private;
 182
 183         drm_fbdev_cma_hotplug_event(rcdu->fbdev);
 184 }
 185
 186 static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
 187         .fb_create = rcar_du_fb_create,
 188         .output_poll_changed = rcar_du_output_poll_changed,
 189 };
 190
 191 int rcar_du_modeset_init(struct rcar_du_device *rcdu)
 192 {
 193         static const unsigned int mmio_offsets[] = {
 194                 DU0_REG_OFFSET, DU2_REG_OFFSET
 195         };
 196
 197         struct drm_device *dev = rcdu->ddev;
 198         struct drm_encoder *encoder;
 199         struct drm_fbdev_cma *fbdev;
 200         unsigned int num_groups;
 201         unsigned int i;
 202         int ret;
 203
 204         drm_mode_config_init(dev);
 205
 206         dev->mode_config.min_width = 0;
 207         dev->mode_config.min_height = 0;
 208         dev->mode_config.max_width = 4095;
 209         dev->mode_config.max_height = 2047;
 210         dev->mode_config.funcs = &rcar_du_mode_config_funcs;
 211
 212         rcdu->num_crtcs = rcdu->info->num_crtcs;
 213
 214         /* Initialize the groups. */
 215         num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
 216
 217         for (i = 0; i < num_groups; ++i) {
 218                 struct rcar_du_group *rgrp = &rcdu->groups[i];
 219
 220                 rgrp->dev = rcdu;
 221                 rgrp->mmio_offset = mmio_offsets[i];
 222                 rgrp->index = i;
 223
 224                 ret = rcar_du_planes_init(rgrp);
 225                 if (ret < 0)
 226                         return ret;
 227         }
 228
 229         /* Create the CRTCs. */
 230         for (i = 0; i < rcdu->num_crtcs; ++i) {
 231                 struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
 232
 233                 ret = rcar_du_crtc_create(rgrp, i);
 234                 if (ret < 0)
 235                         return ret;
 236         }
 237
 238         /* Initialize the encoders. */
 239         ret = rcar_du_lvdsenc_init(rcdu);
 240         if (ret < 0)
 241                 return ret;
 242
 243         for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
 244                 const struct rcar_du_encoder_data *pdata =
 245                         &rcdu->pdata->encoders[i];
 246                 const struct rcar_du_output_routing *route =
 247                         &rcdu->info->routes[pdata->output];
 248
 249                 if (pdata->type == RCAR_DU_ENCODER_UNUSED)
 250                         continue;
 251
 252                 if (pdata->output >= RCAR_DU_OUTPUT_MAX ||
 253                     route->possible_crtcs == 0) {
 254                         dev_warn(rcdu->dev,
 255                                  "encoder %u references unexisting output %u, skipping\n",
 256                                  i, pdata->output);
 257                         continue;
 258                 }
 259
 260                 ret = rcar_du_encoder_init(rcdu, pdata->type, pdata->output,
 261                                            pdata);
 262                 if (ret < 0)
 263                         return ret;
 264         }
 265
 266         /* Set the possible CRTCs and possible clones. There's always at least
 267          * one way for all encoders to clone each other, set all bits in the
 268          * possible clones field.
 269          */
 270         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 271                 struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
 272                 const struct rcar_du_output_routing *route =
 273                         &rcdu->info->routes[renc->output];
 274
 275                 encoder->possible_crtcs = route->possible_crtcs;
 276                 encoder->possible_clones = (1 << rcdu->pdata->num_encoders) - 1;
 277         }
 278
 279         /* Now that the CRTCs have been initialized register the planes. */
 280         for (i = 0; i < num_groups; ++i) {
 281                 ret = rcar_du_planes_register(&rcdu->groups[i]);
 282                 if (ret < 0)
 283                         return ret;
 284         }
 285
 286         drm_kms_helper_poll_init(dev);
 287
 288         drm_helper_disable_unused_functions(dev);
 289
 290         fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
 291                                    dev->mode_config.num_connector);
 292         if (IS_ERR(fbdev))
 293                 return PTR_ERR(fbdev);
 294
 295 #ifndef CONFIG_FRAMEBUFFER_CONSOLE
 296         drm_fbdev_cma_restore_mode(fbdev);
 297 #endif
 298
 299         rcdu->fbdev = fbdev;
 300
 301         return 0;
 302 }