2 * Copyright (C) STMicroelectronics SA 2014
3 * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
4 * Fabien Dessenne <fabien.dessenne@st.com>
5 * for STMicroelectronics.
6 * License terms: GNU General Public License (GPL), version 2
8 #include <linux/seq_file.h>
10 #include "sti_compositor.h"
11 #include "sti_mixer.h"
14 /* Module parameter to set the background color of the mixer */
15 static unsigned int bkg_color
= 0x000000;
16 MODULE_PARM_DESC(bkgcolor
, "Value of the background color 0xRRGGBB");
17 module_param_named(bkgcolor
, bkg_color
, int, 0644);
19 /* Identity: G=Y , B=Cb , R=Cr */
20 static const u32 mixerColorSpaceMatIdentity
[] = {
21 0x10000000, 0x00000000, 0x10000000, 0x00001000,
22 0x00000000, 0x00000000, 0x00000000, 0x00000000
26 #define GAM_MIXER_CTL 0x00
27 #define GAM_MIXER_BKC 0x04
28 #define GAM_MIXER_BCO 0x0C
29 #define GAM_MIXER_BCS 0x10
30 #define GAM_MIXER_AVO 0x28
31 #define GAM_MIXER_AVS 0x2C
32 #define GAM_MIXER_CRB 0x34
33 #define GAM_MIXER_ACT 0x38
34 #define GAM_MIXER_MBP 0x3C
35 #define GAM_MIXER_MX0 0x80
37 /* id for depth of CRB reg */
38 #define GAM_DEPTH_VID0_ID 1
39 #define GAM_DEPTH_VID1_ID 2
40 #define GAM_DEPTH_GDP0_ID 3
41 #define GAM_DEPTH_GDP1_ID 4
42 #define GAM_DEPTH_GDP2_ID 5
43 #define GAM_DEPTH_GDP3_ID 6
44 #define GAM_DEPTH_MASK_ID 7
47 #define GAM_CTL_BACK_MASK BIT(0)
48 #define GAM_CTL_VID0_MASK BIT(1)
49 #define GAM_CTL_VID1_MASK BIT(2)
50 #define GAM_CTL_GDP0_MASK BIT(3)
51 #define GAM_CTL_GDP1_MASK BIT(4)
52 #define GAM_CTL_GDP2_MASK BIT(5)
53 #define GAM_CTL_GDP3_MASK BIT(6)
54 #define GAM_CTL_CURSOR_MASK BIT(9)
56 const char *sti_mixer_to_str(struct sti_mixer
*mixer
)
64 return "<UNKNOWN MIXER>";
68 static inline u32
sti_mixer_reg_read(struct sti_mixer
*mixer
, u32 reg_id
)
70 return readl(mixer
->regs
+ reg_id
);
73 static inline void sti_mixer_reg_write(struct sti_mixer
*mixer
,
76 writel(val
, mixer
->regs
+ reg_id
);
79 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
80 sti_mixer_reg_read(mixer, reg))
82 static void mixer_dbg_ctl(struct seq_file
*s
, int val
)
86 char *const disp_layer
[] = {"BKG", "VID0", "VID1", "GDP0",
87 "GDP1", "GDP2", "GDP3"};
89 seq_puts(s
, "\tEnabled: ");
90 for (i
= 0; i
< 7; i
++) {
92 seq_printf(s
, "%s ", disp_layer
[i
]);
100 seq_puts(s
, "CURS ");
104 seq_puts(s
, "Nothing");
107 static void mixer_dbg_crb(struct seq_file
*s
, int val
)
111 seq_puts(s
, "\tDepth: ");
112 for (i
= 0; i
< GAM_MIXER_NB_DEPTH_LEVEL
; i
++) {
113 switch (val
& GAM_DEPTH_MASK_ID
) {
114 case GAM_DEPTH_VID0_ID
:
117 case GAM_DEPTH_VID1_ID
:
120 case GAM_DEPTH_GDP0_ID
:
123 case GAM_DEPTH_GDP1_ID
:
126 case GAM_DEPTH_GDP2_ID
:
129 case GAM_DEPTH_GDP3_ID
:
136 if (i
< GAM_MIXER_NB_DEPTH_LEVEL
- 1)
142 static void mixer_dbg_mxn(struct seq_file
*s
, void *addr
)
146 for (i
= 1; i
< 8; i
++)
147 seq_printf(s
, "-0x%08X", (int)readl(addr
+ i
* 4));
150 static int mixer_dbg_show(struct seq_file
*s
, void *arg
)
152 struct drm_info_node
*node
= s
->private;
153 struct sti_mixer
*mixer
= (struct sti_mixer
*)node
->info_ent
->data
;
155 seq_printf(s
, "%s: (vaddr = 0x%p)",
156 sti_mixer_to_str(mixer
), mixer
->regs
);
158 DBGFS_DUMP(GAM_MIXER_CTL
);
159 mixer_dbg_ctl(s
, sti_mixer_reg_read(mixer
, GAM_MIXER_CTL
));
160 DBGFS_DUMP(GAM_MIXER_BKC
);
161 DBGFS_DUMP(GAM_MIXER_BCO
);
162 DBGFS_DUMP(GAM_MIXER_BCS
);
163 DBGFS_DUMP(GAM_MIXER_AVO
);
164 DBGFS_DUMP(GAM_MIXER_AVS
);
165 DBGFS_DUMP(GAM_MIXER_CRB
);
166 mixer_dbg_crb(s
, sti_mixer_reg_read(mixer
, GAM_MIXER_CRB
));
167 DBGFS_DUMP(GAM_MIXER_ACT
);
168 DBGFS_DUMP(GAM_MIXER_MBP
);
169 DBGFS_DUMP(GAM_MIXER_MX0
);
170 mixer_dbg_mxn(s
, mixer
->regs
+ GAM_MIXER_MX0
);
176 static struct drm_info_list mixer0_debugfs_files
[] = {
177 { "mixer_main", mixer_dbg_show
, 0, NULL
},
180 static struct drm_info_list mixer1_debugfs_files
[] = {
181 { "mixer_aux", mixer_dbg_show
, 0, NULL
},
184 int sti_mixer_debugfs_init(struct sti_mixer
*mixer
, struct drm_minor
*minor
)
187 struct drm_info_list
*mixer_debugfs_files
;
192 mixer_debugfs_files
= mixer0_debugfs_files
;
193 nb_files
= ARRAY_SIZE(mixer0_debugfs_files
);
196 mixer_debugfs_files
= mixer1_debugfs_files
;
197 nb_files
= ARRAY_SIZE(mixer1_debugfs_files
);
203 for (i
= 0; i
< nb_files
; i
++)
204 mixer_debugfs_files
[i
].data
= mixer
;
206 return drm_debugfs_create_files(mixer_debugfs_files
,
208 minor
->debugfs_root
, minor
);
211 void sti_mixer_set_background_status(struct sti_mixer
*mixer
, bool enable
)
213 u32 val
= sti_mixer_reg_read(mixer
, GAM_MIXER_CTL
);
215 val
&= ~GAM_CTL_BACK_MASK
;
217 sti_mixer_reg_write(mixer
, GAM_MIXER_CTL
, val
);
220 static void sti_mixer_set_background_color(struct sti_mixer
*mixer
,
223 sti_mixer_reg_write(mixer
, GAM_MIXER_BKC
, rgb
);
226 static void sti_mixer_set_background_area(struct sti_mixer
*mixer
,
227 struct drm_display_mode
*mode
)
229 u32 ydo
, xdo
, yds
, xds
;
231 ydo
= sti_vtg_get_line_number(*mode
, 0);
232 yds
= sti_vtg_get_line_number(*mode
, mode
->vdisplay
- 1);
233 xdo
= sti_vtg_get_pixel_number(*mode
, 0);
234 xds
= sti_vtg_get_pixel_number(*mode
, mode
->hdisplay
- 1);
236 sti_mixer_reg_write(mixer
, GAM_MIXER_BCO
, ydo
<< 16 | xdo
);
237 sti_mixer_reg_write(mixer
, GAM_MIXER_BCS
, yds
<< 16 | xds
);
240 int sti_mixer_set_plane_depth(struct sti_mixer
*mixer
, struct sti_plane
*plane
)
242 int plane_id
, depth
= plane
->drm_plane
.state
->normalized_zpos
;
246 switch (plane
->desc
) {
248 plane_id
= GAM_DEPTH_GDP0_ID
;
251 plane_id
= GAM_DEPTH_GDP1_ID
;
254 plane_id
= GAM_DEPTH_GDP2_ID
;
257 plane_id
= GAM_DEPTH_GDP3_ID
;
260 plane_id
= GAM_DEPTH_VID0_ID
;
263 /* no need to set depth for cursor */
266 DRM_ERROR("Unknown plane %d\n", plane
->desc
);
270 /* Search if a previous depth was already assigned to the plane */
271 val
= sti_mixer_reg_read(mixer
, GAM_MIXER_CRB
);
272 for (i
= 0; i
< GAM_MIXER_NB_DEPTH_LEVEL
; i
++) {
273 mask
= GAM_DEPTH_MASK_ID
<< (3 * i
);
274 if ((val
& mask
) == plane_id
<< (3 * i
))
278 mask
|= GAM_DEPTH_MASK_ID
<< (3 * depth
);
279 plane_id
= plane_id
<< (3 * depth
);
281 DRM_DEBUG_DRIVER("%s %s depth=%d\n", sti_mixer_to_str(mixer
),
282 sti_plane_to_str(plane
), depth
);
283 dev_dbg(mixer
->dev
, "GAM_MIXER_CRB val 0x%x mask 0x%x\n",
288 sti_mixer_reg_write(mixer
, GAM_MIXER_CRB
, val
);
290 dev_dbg(mixer
->dev
, "Read GAM_MIXER_CRB 0x%x\n",
291 sti_mixer_reg_read(mixer
, GAM_MIXER_CRB
));
295 int sti_mixer_active_video_area(struct sti_mixer
*mixer
,
296 struct drm_display_mode
*mode
)
298 u32 ydo
, xdo
, yds
, xds
;
300 ydo
= sti_vtg_get_line_number(*mode
, 0);
301 yds
= sti_vtg_get_line_number(*mode
, mode
->vdisplay
- 1);
302 xdo
= sti_vtg_get_pixel_number(*mode
, 0);
303 xds
= sti_vtg_get_pixel_number(*mode
, mode
->hdisplay
- 1);
305 DRM_DEBUG_DRIVER("%s active video area xdo:%d ydo:%d xds:%d yds:%d\n",
306 sti_mixer_to_str(mixer
), xdo
, ydo
, xds
, yds
);
307 sti_mixer_reg_write(mixer
, GAM_MIXER_AVO
, ydo
<< 16 | xdo
);
308 sti_mixer_reg_write(mixer
, GAM_MIXER_AVS
, yds
<< 16 | xds
);
310 sti_mixer_set_background_color(mixer
, bkg_color
);
312 sti_mixer_set_background_area(mixer
, mode
);
313 sti_mixer_set_background_status(mixer
, true);
317 static u32
sti_mixer_get_plane_mask(struct sti_plane
*plane
)
319 switch (plane
->desc
) {
321 return GAM_CTL_BACK_MASK
;
323 return GAM_CTL_GDP0_MASK
;
325 return GAM_CTL_GDP1_MASK
;
327 return GAM_CTL_GDP2_MASK
;
329 return GAM_CTL_GDP3_MASK
;
331 return GAM_CTL_VID0_MASK
;
333 return GAM_CTL_CURSOR_MASK
;
339 int sti_mixer_set_plane_status(struct sti_mixer
*mixer
,
340 struct sti_plane
*plane
, bool status
)
344 DRM_DEBUG_DRIVER("%s %s %s\n", status
? "enable" : "disable",
345 sti_mixer_to_str(mixer
), sti_plane_to_str(plane
));
347 mask
= sti_mixer_get_plane_mask(plane
);
349 DRM_ERROR("Can't find layer mask\n");
353 val
= sti_mixer_reg_read(mixer
, GAM_MIXER_CTL
);
355 val
|= status
? mask
: 0;
356 sti_mixer_reg_write(mixer
, GAM_MIXER_CTL
, val
);
361 void sti_mixer_set_matrix(struct sti_mixer
*mixer
)
365 for (i
= 0; i
< ARRAY_SIZE(mixerColorSpaceMatIdentity
); i
++)
366 sti_mixer_reg_write(mixer
, GAM_MIXER_MX0
+ (i
* 4),
367 mixerColorSpaceMatIdentity
[i
]);
370 struct sti_mixer
*sti_mixer_create(struct device
*dev
,
371 struct drm_device
*drm_dev
,
373 void __iomem
*baseaddr
)
375 struct sti_mixer
*mixer
= devm_kzalloc(dev
, sizeof(*mixer
), GFP_KERNEL
);
376 struct device_node
*np
= dev
->of_node
;
378 dev_dbg(dev
, "%s\n", __func__
);
380 DRM_ERROR("Failed to allocated memory for mixer\n");
383 mixer
->regs
= baseaddr
;
387 if (of_device_is_compatible(np
, "st,stih416-compositor"))
388 sti_mixer_set_matrix(mixer
);
390 DRM_DEBUG_DRIVER("%s created. Regs=%p\n",
391 sti_mixer_to_str(mixer
), mixer
->regs
);