2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include "tilcdc_drv.h"
21 #include "tilcdc_regs.h"
22 #include "tilcdc_tfp410.h"
23 #include "tilcdc_slave.h"
24 #include "tilcdc_panel.h"
26 #include "drm_fb_helper.h"
28 static LIST_HEAD(module_list
);
29 static bool slave_probing
;
31 void tilcdc_module_init(struct tilcdc_module
*mod
, const char *name
,
32 const struct tilcdc_module_ops
*funcs
)
36 INIT_LIST_HEAD(&mod
->list
);
37 list_add(&mod
->list
, &module_list
);
40 void tilcdc_module_cleanup(struct tilcdc_module
*mod
)
45 void tilcdc_slave_probedefer(bool defered
)
47 slave_probing
= defered
;
50 static struct of_device_id tilcdc_of_match
[];
52 static struct drm_framebuffer
*tilcdc_fb_create(struct drm_device
*dev
,
53 struct drm_file
*file_priv
, struct drm_mode_fb_cmd2
*mode_cmd
)
55 return drm_fb_cma_create(dev
, file_priv
, mode_cmd
);
58 static void tilcdc_fb_output_poll_changed(struct drm_device
*dev
)
60 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
62 drm_fbdev_cma_hotplug_event(priv
->fbdev
);
65 static const struct drm_mode_config_funcs mode_config_funcs
= {
66 .fb_create
= tilcdc_fb_create
,
67 .output_poll_changed
= tilcdc_fb_output_poll_changed
,
70 static int modeset_init(struct drm_device
*dev
)
72 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
73 struct tilcdc_module
*mod
;
75 drm_mode_config_init(dev
);
77 priv
->crtc
= tilcdc_crtc_create(dev
);
79 list_for_each_entry(mod
, &module_list
, list
) {
80 DBG("loading module: %s", mod
->name
);
81 mod
->funcs
->modeset_init(mod
, dev
);
84 if ((priv
->num_encoders
== 0) || (priv
->num_connectors
== 0)) {
86 dev_err(dev
->dev
, "no encoders/connectors found\n");
90 dev
->mode_config
.min_width
= 0;
91 dev
->mode_config
.min_height
= 0;
92 dev
->mode_config
.max_width
= tilcdc_crtc_max_width(priv
->crtc
);
93 dev
->mode_config
.max_height
= 2048;
94 dev
->mode_config
.funcs
= &mode_config_funcs
;
99 #ifdef CONFIG_CPU_FREQ
100 static int cpufreq_transition(struct notifier_block
*nb
,
101 unsigned long val
, void *data
)
103 struct tilcdc_drm_private
*priv
= container_of(nb
,
104 struct tilcdc_drm_private
, freq_transition
);
105 if (val
== CPUFREQ_POSTCHANGE
) {
106 if (priv
->lcd_fck_rate
!= clk_get_rate(priv
->clk
)) {
107 priv
->lcd_fck_rate
= clk_get_rate(priv
->clk
);
108 tilcdc_crtc_update_clk(priv
->crtc
);
120 static int tilcdc_unload(struct drm_device
*dev
)
122 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
124 drm_fbdev_cma_fini(priv
->fbdev
);
125 drm_kms_helper_poll_fini(dev
);
126 drm_mode_config_cleanup(dev
);
127 drm_vblank_cleanup(dev
);
129 pm_runtime_get_sync(dev
->dev
);
130 drm_irq_uninstall(dev
);
131 pm_runtime_put_sync(dev
->dev
);
133 #ifdef CONFIG_CPU_FREQ
134 cpufreq_unregister_notifier(&priv
->freq_transition
,
135 CPUFREQ_TRANSITION_NOTIFIER
);
144 flush_workqueue(priv
->wq
);
145 destroy_workqueue(priv
->wq
);
147 dev
->dev_private
= NULL
;
149 pm_runtime_disable(dev
->dev
);
156 static int tilcdc_load(struct drm_device
*dev
, unsigned long flags
)
158 struct platform_device
*pdev
= dev
->platformdev
;
159 struct device_node
*node
= pdev
->dev
.of_node
;
160 struct tilcdc_drm_private
*priv
;
161 struct tilcdc_module
*mod
;
162 struct resource
*res
;
166 priv
= kzalloc(sizeof(*priv
), GFP_KERNEL
);
168 dev_err(dev
->dev
, "failed to allocate private data\n");
172 dev
->dev_private
= priv
;
174 priv
->wq
= alloc_ordered_workqueue("tilcdc", 0);
176 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
178 dev_err(dev
->dev
, "failed to get memory resource\n");
183 priv
->mmio
= ioremap_nocache(res
->start
, resource_size(res
));
185 dev_err(dev
->dev
, "failed to ioremap\n");
190 priv
->clk
= clk_get(dev
->dev
, "fck");
191 if (IS_ERR(priv
->clk
)) {
192 dev_err(dev
->dev
, "failed to get functional clock\n");
197 priv
->disp_clk
= clk_get(dev
->dev
, "dpll_disp_ck");
198 if (IS_ERR(priv
->clk
)) {
199 dev_err(dev
->dev
, "failed to get display clock\n");
204 #ifdef CONFIG_CPU_FREQ
205 priv
->lcd_fck_rate
= clk_get_rate(priv
->clk
);
206 priv
->freq_transition
.notifier_call
= cpufreq_transition
;
207 ret
= cpufreq_register_notifier(&priv
->freq_transition
,
208 CPUFREQ_TRANSITION_NOTIFIER
);
210 dev_err(dev
->dev
, "failed to register cpufreq notifier\n");
215 if (of_property_read_u32(node
, "max-bandwidth", &priv
->max_bandwidth
))
216 priv
->max_bandwidth
= TILCDC_DEFAULT_MAX_BANDWIDTH
;
218 DBG("Maximum Bandwidth Value %d", priv
->max_bandwidth
);
220 if (of_property_read_u32(node
, "ti,max-width", &priv
->max_width
))
221 priv
->max_width
= TILCDC_DEFAULT_MAX_WIDTH
;
223 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv
->max_width
);
225 if (of_property_read_u32(node
, "ti,max-pixelclock",
226 &priv
->max_pixelclock
))
227 priv
->max_pixelclock
= TILCDC_DEFAULT_MAX_PIXELCLOCK
;
229 DBG("Maximum Pixel Clock Value %dKHz", priv
->max_pixelclock
);
231 pm_runtime_enable(dev
->dev
);
233 /* Determine LCD IP Version */
234 pm_runtime_get_sync(dev
->dev
);
235 switch (tilcdc_read(dev
, LCDC_PID_REG
)) {
244 dev_warn(dev
->dev
, "Unknown PID Reg value 0x%08x, "
245 "defaulting to LCD revision 1\n",
246 tilcdc_read(dev
, LCDC_PID_REG
));
251 pm_runtime_put_sync(dev
->dev
);
253 ret
= modeset_init(dev
);
255 dev_err(dev
->dev
, "failed to initialize mode setting\n");
259 ret
= drm_vblank_init(dev
, 1);
261 dev_err(dev
->dev
, "failed to initialize vblank\n");
265 pm_runtime_get_sync(dev
->dev
);
266 ret
= drm_irq_install(dev
, platform_get_irq(dev
->platformdev
, 0));
267 pm_runtime_put_sync(dev
->dev
);
269 dev_err(dev
->dev
, "failed to install IRQ handler\n");
273 platform_set_drvdata(pdev
, dev
);
276 list_for_each_entry(mod
, &module_list
, list
) {
277 DBG("%s: preferred_bpp: %d", mod
->name
, mod
->preferred_bpp
);
278 bpp
= mod
->preferred_bpp
;
283 priv
->fbdev
= drm_fbdev_cma_init(dev
, bpp
,
284 dev
->mode_config
.num_crtc
,
285 dev
->mode_config
.num_connector
);
287 drm_kms_helper_poll_init(dev
);
296 static void tilcdc_preclose(struct drm_device
*dev
, struct drm_file
*file
)
298 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
300 tilcdc_crtc_cancel_page_flip(priv
->crtc
, file
);
303 static void tilcdc_lastclose(struct drm_device
*dev
)
305 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
306 drm_fbdev_cma_restore_mode(priv
->fbdev
);
309 static irqreturn_t
tilcdc_irq(int irq
, void *arg
)
311 struct drm_device
*dev
= arg
;
312 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
313 return tilcdc_crtc_irq(priv
->crtc
);
316 static void tilcdc_irq_preinstall(struct drm_device
*dev
)
318 tilcdc_clear_irqstatus(dev
, 0xffffffff);
321 static int tilcdc_irq_postinstall(struct drm_device
*dev
)
323 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
325 /* enable FIFO underflow irq: */
327 tilcdc_set(dev
, LCDC_RASTER_CTRL_REG
, LCDC_V1_UNDERFLOW_INT_ENA
);
329 tilcdc_set(dev
, LCDC_INT_ENABLE_SET_REG
, LCDC_V2_UNDERFLOW_INT_ENA
);
334 static void tilcdc_irq_uninstall(struct drm_device
*dev
)
336 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
338 /* disable irqs that we might have enabled: */
339 if (priv
->rev
== 1) {
340 tilcdc_clear(dev
, LCDC_RASTER_CTRL_REG
,
341 LCDC_V1_UNDERFLOW_INT_ENA
| LCDC_V1_PL_INT_ENA
);
342 tilcdc_clear(dev
, LCDC_DMA_CTRL_REG
, LCDC_V1_END_OF_FRAME_INT_ENA
);
344 tilcdc_clear(dev
, LCDC_INT_ENABLE_SET_REG
,
345 LCDC_V2_UNDERFLOW_INT_ENA
| LCDC_V2_PL_INT_ENA
|
346 LCDC_V2_END_OF_FRAME0_INT_ENA
| LCDC_V2_END_OF_FRAME1_INT_ENA
|
352 static void enable_vblank(struct drm_device
*dev
, bool enable
)
354 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
357 if (priv
->rev
== 1) {
358 reg
= LCDC_DMA_CTRL_REG
;
359 mask
= LCDC_V1_END_OF_FRAME_INT_ENA
;
361 reg
= LCDC_INT_ENABLE_SET_REG
;
362 mask
= LCDC_V2_END_OF_FRAME0_INT_ENA
|
363 LCDC_V2_END_OF_FRAME1_INT_ENA
| LCDC_FRAME_DONE
;
367 tilcdc_set(dev
, reg
, mask
);
369 tilcdc_clear(dev
, reg
, mask
);
372 static int tilcdc_enable_vblank(struct drm_device
*dev
, int crtc
)
374 enable_vblank(dev
, true);
378 static void tilcdc_disable_vblank(struct drm_device
*dev
, int crtc
)
380 enable_vblank(dev
, false);
383 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
384 static const struct {
390 #define REG(rev, save, reg) { #reg, rev, save, reg }
391 /* exists in revision 1: */
392 REG(1, false, LCDC_PID_REG
),
393 REG(1, true, LCDC_CTRL_REG
),
394 REG(1, false, LCDC_STAT_REG
),
395 REG(1, true, LCDC_RASTER_CTRL_REG
),
396 REG(1, true, LCDC_RASTER_TIMING_0_REG
),
397 REG(1, true, LCDC_RASTER_TIMING_1_REG
),
398 REG(1, true, LCDC_RASTER_TIMING_2_REG
),
399 REG(1, true, LCDC_DMA_CTRL_REG
),
400 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG
),
401 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG
),
402 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG
),
403 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG
),
404 /* new in revision 2: */
405 REG(2, false, LCDC_RAW_STAT_REG
),
406 REG(2, false, LCDC_MASKED_STAT_REG
),
407 REG(2, false, LCDC_INT_ENABLE_SET_REG
),
408 REG(2, false, LCDC_INT_ENABLE_CLR_REG
),
409 REG(2, false, LCDC_END_OF_INT_IND_REG
),
410 REG(2, true, LCDC_CLK_ENABLE_REG
),
411 REG(2, true, LCDC_INT_ENABLE_SET_REG
),
416 #ifdef CONFIG_DEBUG_FS
417 static int tilcdc_regs_show(struct seq_file
*m
, void *arg
)
419 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
420 struct drm_device
*dev
= node
->minor
->dev
;
421 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
424 pm_runtime_get_sync(dev
->dev
);
426 seq_printf(m
, "revision: %d\n", priv
->rev
);
428 for (i
= 0; i
< ARRAY_SIZE(registers
); i
++)
429 if (priv
->rev
>= registers
[i
].rev
)
430 seq_printf(m
, "%s:\t %08x\n", registers
[i
].name
,
431 tilcdc_read(dev
, registers
[i
].reg
));
433 pm_runtime_put_sync(dev
->dev
);
438 static int tilcdc_mm_show(struct seq_file
*m
, void *arg
)
440 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
441 struct drm_device
*dev
= node
->minor
->dev
;
442 return drm_mm_dump_table(m
, &dev
->vma_offset_manager
->vm_addr_space_mm
);
445 static struct drm_info_list tilcdc_debugfs_list
[] = {
446 { "regs", tilcdc_regs_show
, 0 },
447 { "mm", tilcdc_mm_show
, 0 },
448 { "fb", drm_fb_cma_debugfs_show
, 0 },
451 static int tilcdc_debugfs_init(struct drm_minor
*minor
)
453 struct drm_device
*dev
= minor
->dev
;
454 struct tilcdc_module
*mod
;
457 ret
= drm_debugfs_create_files(tilcdc_debugfs_list
,
458 ARRAY_SIZE(tilcdc_debugfs_list
),
459 minor
->debugfs_root
, minor
);
461 list_for_each_entry(mod
, &module_list
, list
)
462 if (mod
->funcs
->debugfs_init
)
463 mod
->funcs
->debugfs_init(mod
, minor
);
466 dev_err(dev
->dev
, "could not install tilcdc_debugfs_list\n");
473 static void tilcdc_debugfs_cleanup(struct drm_minor
*minor
)
475 struct tilcdc_module
*mod
;
476 drm_debugfs_remove_files(tilcdc_debugfs_list
,
477 ARRAY_SIZE(tilcdc_debugfs_list
), minor
);
479 list_for_each_entry(mod
, &module_list
, list
)
480 if (mod
->funcs
->debugfs_cleanup
)
481 mod
->funcs
->debugfs_cleanup(mod
, minor
);
485 static const struct file_operations fops
= {
486 .owner
= THIS_MODULE
,
488 .release
= drm_release
,
489 .unlocked_ioctl
= drm_ioctl
,
491 .compat_ioctl
= drm_compat_ioctl
,
496 .mmap
= drm_gem_cma_mmap
,
499 static struct drm_driver tilcdc_driver
= {
500 .driver_features
= DRIVER_HAVE_IRQ
| DRIVER_GEM
| DRIVER_MODESET
,
502 .unload
= tilcdc_unload
,
503 .preclose
= tilcdc_preclose
,
504 .lastclose
= tilcdc_lastclose
,
505 .set_busid
= drm_platform_set_busid
,
506 .irq_handler
= tilcdc_irq
,
507 .irq_preinstall
= tilcdc_irq_preinstall
,
508 .irq_postinstall
= tilcdc_irq_postinstall
,
509 .irq_uninstall
= tilcdc_irq_uninstall
,
510 .get_vblank_counter
= drm_vblank_count
,
511 .enable_vblank
= tilcdc_enable_vblank
,
512 .disable_vblank
= tilcdc_disable_vblank
,
513 .gem_free_object
= drm_gem_cma_free_object
,
514 .gem_vm_ops
= &drm_gem_cma_vm_ops
,
515 .dumb_create
= drm_gem_cma_dumb_create
,
516 .dumb_map_offset
= drm_gem_cma_dumb_map_offset
,
517 .dumb_destroy
= drm_gem_dumb_destroy
,
518 #ifdef CONFIG_DEBUG_FS
519 .debugfs_init
= tilcdc_debugfs_init
,
520 .debugfs_cleanup
= tilcdc_debugfs_cleanup
,
524 .desc
= "TI LCD Controller DRM",
534 #ifdef CONFIG_PM_SLEEP
535 static int tilcdc_pm_suspend(struct device
*dev
)
537 struct drm_device
*ddev
= dev_get_drvdata(dev
);
538 struct tilcdc_drm_private
*priv
= ddev
->dev_private
;
541 drm_kms_helper_poll_disable(ddev
);
543 /* Save register state: */
544 for (i
= 0; i
< ARRAY_SIZE(registers
); i
++)
545 if (registers
[i
].save
&& (priv
->rev
>= registers
[i
].rev
))
546 priv
->saved_register
[n
++] = tilcdc_read(ddev
, registers
[i
].reg
);
551 static int tilcdc_pm_resume(struct device
*dev
)
553 struct drm_device
*ddev
= dev_get_drvdata(dev
);
554 struct tilcdc_drm_private
*priv
= ddev
->dev_private
;
557 /* Restore register state: */
558 for (i
= 0; i
< ARRAY_SIZE(registers
); i
++)
559 if (registers
[i
].save
&& (priv
->rev
>= registers
[i
].rev
))
560 tilcdc_write(ddev
, registers
[i
].reg
, priv
->saved_register
[n
++]);
562 drm_kms_helper_poll_enable(ddev
);
568 static const struct dev_pm_ops tilcdc_pm_ops
= {
569 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend
, tilcdc_pm_resume
)
576 static int tilcdc_pdev_probe(struct platform_device
*pdev
)
578 /* bail out early if no DT data: */
579 if (!pdev
->dev
.of_node
) {
580 dev_err(&pdev
->dev
, "device-tree data is missing\n");
584 /* defer probing if slave is in deferred probing */
585 if (slave_probing
== true)
586 return -EPROBE_DEFER
;
588 return drm_platform_init(&tilcdc_driver
, pdev
);
591 static int tilcdc_pdev_remove(struct platform_device
*pdev
)
593 drm_put_dev(platform_get_drvdata(pdev
));
598 static struct of_device_id tilcdc_of_match
[] = {
599 { .compatible
= "ti,am33xx-tilcdc", },
602 MODULE_DEVICE_TABLE(of
, tilcdc_of_match
);
604 static struct platform_driver tilcdc_platform_driver
= {
605 .probe
= tilcdc_pdev_probe
,
606 .remove
= tilcdc_pdev_remove
,
608 .owner
= THIS_MODULE
,
610 .pm
= &tilcdc_pm_ops
,
611 .of_match_table
= tilcdc_of_match
,
615 static int __init
tilcdc_drm_init(void)
618 tilcdc_tfp410_init();
621 return platform_driver_register(&tilcdc_platform_driver
);
624 static void __exit
tilcdc_drm_fini(void)
627 platform_driver_unregister(&tilcdc_platform_driver
);
630 tilcdc_tfp410_fini();
633 module_init(tilcdc_drm_init
);
634 module_exit(tilcdc_drm_fini
);
636 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
637 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
638 MODULE_LICENSE("GPL");