1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "vmwgfx_kms.h"
31 /* Might need a hrtimer here? */
32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
34 void vmw_display_unit_cleanup(struct vmw_display_unit
*du
)
36 if (du
->cursor_surface
)
37 vmw_surface_unreference(&du
->cursor_surface
);
38 if (du
->cursor_dmabuf
)
39 vmw_dmabuf_unreference(&du
->cursor_dmabuf
);
40 drm_crtc_cleanup(&du
->crtc
);
41 drm_encoder_cleanup(&du
->encoder
);
42 drm_connector_cleanup(&du
->connector
);
46 * Display Unit Cursor functions
49 int vmw_cursor_update_image(struct vmw_private
*dev_priv
,
50 u32
*image
, u32 width
, u32 height
,
51 u32 hotspotX
, u32 hotspotY
)
55 SVGAFifoCmdDefineAlphaCursor cursor
;
57 u32 image_size
= width
* height
* 4;
58 u32 cmd_size
= sizeof(*cmd
) + image_size
;
63 cmd
= vmw_fifo_reserve(dev_priv
, cmd_size
);
64 if (unlikely(cmd
== NULL
)) {
65 DRM_ERROR("Fifo reserve failed.\n");
69 memset(cmd
, 0, sizeof(*cmd
));
71 memcpy(&cmd
[1], image
, image_size
);
73 cmd
->cmd
= cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR
);
74 cmd
->cursor
.id
= cpu_to_le32(0);
75 cmd
->cursor
.width
= cpu_to_le32(width
);
76 cmd
->cursor
.height
= cpu_to_le32(height
);
77 cmd
->cursor
.hotspotX
= cpu_to_le32(hotspotX
);
78 cmd
->cursor
.hotspotY
= cpu_to_le32(hotspotY
);
80 vmw_fifo_commit(dev_priv
, cmd_size
);
85 void vmw_cursor_update_position(struct vmw_private
*dev_priv
,
86 bool show
, int x
, int y
)
88 __le32 __iomem
*fifo_mem
= dev_priv
->mmio_virt
;
91 iowrite32(show
? 1 : 0, fifo_mem
+ SVGA_FIFO_CURSOR_ON
);
92 iowrite32(x
, fifo_mem
+ SVGA_FIFO_CURSOR_X
);
93 iowrite32(y
, fifo_mem
+ SVGA_FIFO_CURSOR_Y
);
94 count
= ioread32(fifo_mem
+ SVGA_FIFO_CURSOR_COUNT
);
95 iowrite32(++count
, fifo_mem
+ SVGA_FIFO_CURSOR_COUNT
);
98 int vmw_du_crtc_cursor_set(struct drm_crtc
*crtc
, struct drm_file
*file_priv
,
99 uint32_t handle
, uint32_t width
, uint32_t height
)
101 struct vmw_private
*dev_priv
= vmw_priv(crtc
->dev
);
102 struct ttm_object_file
*tfile
= vmw_fpriv(file_priv
)->tfile
;
103 struct vmw_display_unit
*du
= vmw_crtc_to_du(crtc
);
104 struct vmw_surface
*surface
= NULL
;
105 struct vmw_dma_buffer
*dmabuf
= NULL
;
109 ret
= vmw_user_surface_lookup_handle(dev_priv
, tfile
,
112 if (!surface
->snooper
.image
) {
113 DRM_ERROR("surface not suitable for cursor\n");
117 ret
= vmw_user_dmabuf_lookup(tfile
,
120 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret
);
126 /* takedown old cursor */
127 if (du
->cursor_surface
) {
128 du
->cursor_surface
->snooper
.crtc
= NULL
;
129 vmw_surface_unreference(&du
->cursor_surface
);
131 if (du
->cursor_dmabuf
)
132 vmw_dmabuf_unreference(&du
->cursor_dmabuf
);
134 /* setup new image */
136 /* vmw_user_surface_lookup takes one reference */
137 du
->cursor_surface
= surface
;
139 du
->cursor_surface
->snooper
.crtc
= crtc
;
140 du
->cursor_age
= du
->cursor_surface
->snooper
.age
;
141 vmw_cursor_update_image(dev_priv
, surface
->snooper
.image
,
142 64, 64, du
->hotspot_x
, du
->hotspot_y
);
144 struct ttm_bo_kmap_obj map
;
145 unsigned long kmap_offset
;
146 unsigned long kmap_num
;
150 /* vmw_user_surface_lookup takes one reference */
151 du
->cursor_dmabuf
= dmabuf
;
154 kmap_num
= (64*64*4) >> PAGE_SHIFT
;
156 ret
= ttm_bo_reserve(&dmabuf
->base
, true, false, false, 0);
157 if (unlikely(ret
!= 0)) {
158 DRM_ERROR("reserve failed\n");
162 ret
= ttm_bo_kmap(&dmabuf
->base
, kmap_offset
, kmap_num
, &map
);
163 if (unlikely(ret
!= 0))
166 virtual = ttm_kmap_obj_virtual(&map
, &dummy
);
167 vmw_cursor_update_image(dev_priv
, virtual, 64, 64,
168 du
->hotspot_x
, du
->hotspot_y
);
172 ttm_bo_unreserve(&dmabuf
->base
);
175 vmw_cursor_update_position(dev_priv
, false, 0, 0);
179 vmw_cursor_update_position(dev_priv
, true, du
->cursor_x
, du
->cursor_y
);
184 int vmw_du_crtc_cursor_move(struct drm_crtc
*crtc
, int x
, int y
)
186 struct vmw_private
*dev_priv
= vmw_priv(crtc
->dev
);
187 struct vmw_display_unit
*du
= vmw_crtc_to_du(crtc
);
188 bool shown
= du
->cursor_surface
|| du
->cursor_dmabuf
? true : false;
190 du
->cursor_x
= x
+ crtc
->x
;
191 du
->cursor_y
= y
+ crtc
->y
;
193 vmw_cursor_update_position(dev_priv
, shown
,
194 du
->cursor_x
, du
->cursor_y
);
199 void vmw_kms_cursor_snoop(struct vmw_surface
*srf
,
200 struct ttm_object_file
*tfile
,
201 struct ttm_buffer_object
*bo
,
202 SVGA3dCmdHeader
*header
)
204 struct ttm_bo_kmap_obj map
;
205 unsigned long kmap_offset
;
206 unsigned long kmap_num
;
212 SVGA3dCmdHeader header
;
213 SVGA3dCmdSurfaceDMA dma
;
217 cmd
= container_of(header
, struct vmw_dma_cmd
, header
);
219 /* No snooper installed */
220 if (!srf
->snooper
.image
)
223 if (cmd
->dma
.host
.face
!= 0 || cmd
->dma
.host
.mipmap
!= 0) {
224 DRM_ERROR("face and mipmap for cursors should never != 0\n");
228 if (cmd
->header
.size
< 64) {
229 DRM_ERROR("at least one full copy box must be given\n");
233 box
= (SVGA3dCopyBox
*)&cmd
[1];
234 box_count
= (cmd
->header
.size
- sizeof(SVGA3dCmdSurfaceDMA
)) /
235 sizeof(SVGA3dCopyBox
);
237 if (cmd
->dma
.guest
.pitch
!= (64 * 4) ||
238 cmd
->dma
.guest
.ptr
.offset
% PAGE_SIZE
||
239 box
->x
!= 0 || box
->y
!= 0 || box
->z
!= 0 ||
240 box
->srcx
!= 0 || box
->srcy
!= 0 || box
->srcz
!= 0 ||
241 box
->w
!= 64 || box
->h
!= 64 || box
->d
!= 1 ||
243 /* TODO handle none page aligned offsets */
244 /* TODO handle partial uploads and pitch != 256 */
245 /* TODO handle more then one copy (size != 64) */
246 DRM_ERROR("lazy programmer, can't handle weird stuff\n");
250 kmap_offset
= cmd
->dma
.guest
.ptr
.offset
>> PAGE_SHIFT
;
251 kmap_num
= (64*64*4) >> PAGE_SHIFT
;
253 ret
= ttm_bo_reserve(bo
, true, false, false, 0);
254 if (unlikely(ret
!= 0)) {
255 DRM_ERROR("reserve failed\n");
259 ret
= ttm_bo_kmap(bo
, kmap_offset
, kmap_num
, &map
);
260 if (unlikely(ret
!= 0))
263 virtual = ttm_kmap_obj_virtual(&map
, &dummy
);
265 memcpy(srf
->snooper
.image
, virtual, 64*64*4);
268 /* we can't call this function from this function since execbuf has
269 * reserved fifo space.
271 * if (srf->snooper.crtc)
272 * vmw_ldu_crtc_cursor_update_image(dev_priv,
273 * srf->snooper.image, 64, 64,
274 * du->hotspot_x, du->hotspot_y);
279 ttm_bo_unreserve(bo
);
282 void vmw_kms_cursor_post_execbuf(struct vmw_private
*dev_priv
)
284 struct drm_device
*dev
= dev_priv
->dev
;
285 struct vmw_display_unit
*du
;
286 struct drm_crtc
*crtc
;
288 mutex_lock(&dev
->mode_config
.mutex
);
290 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
291 du
= vmw_crtc_to_du(crtc
);
292 if (!du
->cursor_surface
||
293 du
->cursor_age
== du
->cursor_surface
->snooper
.age
)
296 du
->cursor_age
= du
->cursor_surface
->snooper
.age
;
297 vmw_cursor_update_image(dev_priv
,
298 du
->cursor_surface
->snooper
.image
,
299 64, 64, du
->hotspot_x
, du
->hotspot_y
);
302 mutex_unlock(&dev
->mode_config
.mutex
);
306 * Generic framebuffer code
309 int vmw_framebuffer_create_handle(struct drm_framebuffer
*fb
,
310 struct drm_file
*file_priv
,
311 unsigned int *handle
)
320 * Surface framebuffer code
323 #define vmw_framebuffer_to_vfbs(x) \
324 container_of(x, struct vmw_framebuffer_surface, base.base)
326 struct vmw_framebuffer_surface
{
327 struct vmw_framebuffer base
;
328 struct vmw_surface
*surface
;
329 struct vmw_dma_buffer
*buffer
;
330 struct list_head head
;
331 struct drm_master
*master
;
334 void vmw_framebuffer_surface_destroy(struct drm_framebuffer
*framebuffer
)
336 struct vmw_framebuffer_surface
*vfbs
=
337 vmw_framebuffer_to_vfbs(framebuffer
);
338 struct vmw_master
*vmaster
= vmw_master(vfbs
->master
);
341 mutex_lock(&vmaster
->fb_surf_mutex
);
342 list_del(&vfbs
->head
);
343 mutex_unlock(&vmaster
->fb_surf_mutex
);
345 drm_master_put(&vfbs
->master
);
346 drm_framebuffer_cleanup(framebuffer
);
347 vmw_surface_unreference(&vfbs
->surface
);
352 static int do_surface_dirty_sou(struct vmw_private
*dev_priv
,
353 struct vmw_framebuffer
*framebuffer
,
354 struct vmw_surface
*surf
,
355 unsigned flags
, unsigned color
,
356 struct drm_clip_rect
*clips
,
357 unsigned num_clips
, int inc
)
359 int left
= clips
->x2
, right
= clips
->x1
;
360 int top
= clips
->y2
, bottom
= clips
->y1
;
365 SVGA3dCmdHeader header
;
366 SVGA3dCmdBlitSurfaceToScreen body
;
370 fifo_size
= sizeof(*cmd
);
371 cmd
= vmw_fifo_reserve(dev_priv
, fifo_size
);
372 if (unlikely(cmd
== NULL
)) {
373 DRM_ERROR("Fifo reserve failed.\n");
377 memset(cmd
, 0, fifo_size
);
379 cmd
->header
.id
= cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN
);
380 cmd
->header
.size
= cpu_to_le32(sizeof(cmd
->body
));
382 cmd
->body
.srcImage
.sid
= cpu_to_le32(surf
->res
.id
);
383 cmd
->body
.destScreenId
= SVGA_ID_INVALID
; /* virtual coords */
385 for (i
= 0; i
< num_clips
; i
++, clips
+= inc
) {
386 left
= min_t(int, left
, (int)clips
->x1
);
387 right
= max_t(int, right
, (int)clips
->x2
);
388 top
= min_t(int, top
, (int)clips
->y1
);
389 bottom
= max_t(int, bottom
, (int)clips
->y2
);
392 cmd
->body
.srcRect
.left
= left
;
393 cmd
->body
.srcRect
.right
= right
;
394 cmd
->body
.srcRect
.top
= top
;
395 cmd
->body
.srcRect
.bottom
= bottom
;
397 cmd
->body
.destRect
.left
= left
;
398 cmd
->body
.destRect
.right
= right
;
399 cmd
->body
.destRect
.top
= top
;
400 cmd
->body
.destRect
.bottom
= bottom
;
402 vmw_fifo_commit(dev_priv
, fifo_size
);
407 int vmw_framebuffer_surface_dirty(struct drm_framebuffer
*framebuffer
,
408 struct drm_file
*file_priv
,
409 unsigned flags
, unsigned color
,
410 struct drm_clip_rect
*clips
,
413 struct vmw_private
*dev_priv
= vmw_priv(framebuffer
->dev
);
414 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
415 struct vmw_framebuffer_surface
*vfbs
=
416 vmw_framebuffer_to_vfbs(framebuffer
);
417 struct vmw_surface
*surf
= vfbs
->surface
;
418 struct drm_clip_rect norect
;
421 if (unlikely(vfbs
->master
!= file_priv
->master
))
424 /* Require ScreenObject support for 3D */
425 if (!dev_priv
->sou_priv
)
428 ret
= ttm_read_lock(&vmaster
->lock
, true);
429 if (unlikely(ret
!= 0))
435 norect
.x1
= norect
.y1
= 0;
436 norect
.x2
= framebuffer
->width
;
437 norect
.y2
= framebuffer
->height
;
438 } else if (flags
& DRM_MODE_FB_DIRTY_ANNOTATE_COPY
) {
440 inc
= 2; /* skip source rects */
443 ret
= do_surface_dirty_sou(dev_priv
, &vfbs
->base
, surf
,
445 clips
, num_clips
, inc
);
447 ttm_read_unlock(&vmaster
->lock
);
451 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs
= {
452 .destroy
= vmw_framebuffer_surface_destroy
,
453 .dirty
= vmw_framebuffer_surface_dirty
,
454 .create_handle
= vmw_framebuffer_create_handle
,
457 static int vmw_kms_new_framebuffer_surface(struct vmw_private
*dev_priv
,
458 struct drm_file
*file_priv
,
459 struct vmw_surface
*surface
,
460 struct vmw_framebuffer
**out
,
461 const struct drm_mode_fb_cmd
465 struct drm_device
*dev
= dev_priv
->dev
;
466 struct vmw_framebuffer_surface
*vfbs
;
467 enum SVGA3dSurfaceFormat format
;
468 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
471 /* 3D is only supported on HWv8 hosts which supports screen objects */
472 if (!dev_priv
->sou_priv
)
479 if (unlikely(surface
->mip_levels
[0] != 1 ||
480 surface
->num_sizes
!= 1 ||
481 surface
->sizes
[0].width
< mode_cmd
->width
||
482 surface
->sizes
[0].height
< mode_cmd
->height
||
483 surface
->sizes
[0].depth
!= 1)) {
484 DRM_ERROR("Incompatible surface dimensions "
485 "for requested mode.\n");
489 switch (mode_cmd
->depth
) {
491 format
= SVGA3D_A8R8G8B8
;
494 format
= SVGA3D_X8R8G8B8
;
497 format
= SVGA3D_R5G6B5
;
500 format
= SVGA3D_A1R5G5B5
;
503 format
= SVGA3D_LUMINANCE8
;
506 DRM_ERROR("Invalid color depth: %d\n", mode_cmd
->depth
);
510 if (unlikely(format
!= surface
->format
)) {
511 DRM_ERROR("Invalid surface format for requested mode.\n");
515 vfbs
= kzalloc(sizeof(*vfbs
), GFP_KERNEL
);
521 ret
= drm_framebuffer_init(dev
, &vfbs
->base
.base
,
522 &vmw_framebuffer_surface_funcs
);
526 if (!vmw_surface_reference(surface
)) {
527 DRM_ERROR("failed to reference surface %p\n", surface
);
531 /* XXX get the first 3 from the surface info */
532 vfbs
->base
.base
.bits_per_pixel
= mode_cmd
->bpp
;
533 vfbs
->base
.base
.pitch
= mode_cmd
->pitch
;
534 vfbs
->base
.base
.depth
= mode_cmd
->depth
;
535 vfbs
->base
.base
.width
= mode_cmd
->width
;
536 vfbs
->base
.base
.height
= mode_cmd
->height
;
537 vfbs
->surface
= surface
;
538 vfbs
->master
= drm_master_get(file_priv
->master
);
540 mutex_lock(&vmaster
->fb_surf_mutex
);
541 list_add_tail(&vfbs
->head
, &vmaster
->fb_surf
);
542 mutex_unlock(&vmaster
->fb_surf_mutex
);
549 drm_framebuffer_cleanup(&vfbs
->base
.base
);
557 * Dmabuf framebuffer code
560 #define vmw_framebuffer_to_vfbd(x) \
561 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
563 struct vmw_framebuffer_dmabuf
{
564 struct vmw_framebuffer base
;
565 struct vmw_dma_buffer
*buffer
;
569 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer
*framebuffer
)
571 struct vmw_framebuffer_dmabuf
*vfbd
=
572 vmw_framebuffer_to_vfbd(framebuffer
);
574 drm_framebuffer_cleanup(framebuffer
);
575 vmw_dmabuf_unreference(&vfbd
->buffer
);
580 static int do_dmabuf_dirty_ldu(struct vmw_private
*dev_priv
,
581 struct vmw_framebuffer
*framebuffer
,
582 struct vmw_dma_buffer
*buffer
,
583 unsigned flags
, unsigned color
,
584 struct drm_clip_rect
*clips
,
585 unsigned num_clips
, int increment
)
592 SVGAFifoCmdUpdate body
;
595 fifo_size
= sizeof(*cmd
) * num_clips
;
596 cmd
= vmw_fifo_reserve(dev_priv
, fifo_size
);
597 if (unlikely(cmd
== NULL
)) {
598 DRM_ERROR("Fifo reserve failed.\n");
602 memset(cmd
, 0, fifo_size
);
603 for (i
= 0; i
< num_clips
; i
++, clips
+= increment
) {
604 cmd
[i
].header
= cpu_to_le32(SVGA_CMD_UPDATE
);
605 cmd
[i
].body
.x
= cpu_to_le32(clips
->x1
);
606 cmd
[i
].body
.y
= cpu_to_le32(clips
->y1
);
607 cmd
[i
].body
.width
= cpu_to_le32(clips
->x2
- clips
->x1
);
608 cmd
[i
].body
.height
= cpu_to_le32(clips
->y2
- clips
->y1
);
611 vmw_fifo_commit(dev_priv
, fifo_size
);
615 static int do_dmabuf_dirty_sou(struct drm_file
*file_priv
,
616 struct vmw_private
*dev_priv
,
617 struct vmw_framebuffer
*framebuffer
,
618 struct vmw_dma_buffer
*buffer
,
619 unsigned flags
, unsigned color
,
620 struct drm_clip_rect
*clips
,
621 unsigned num_clips
, int increment
)
623 struct vmw_framebuffer_dmabuf
*vfbd
=
624 vmw_framebuffer_to_vfbd(&framebuffer
->base
);
630 SVGAFifoCmdDefineGMRFB body
;
634 SVGAFifoCmdBlitGMRFBToScreen body
;
637 fifo_size
= sizeof(*cmd
) + sizeof(*blits
) * num_clips
;
638 cmd
= kmalloc(fifo_size
, GFP_KERNEL
);
639 if (unlikely(cmd
== NULL
)) {
640 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
644 memset(cmd
, 0, fifo_size
);
645 cmd
->header
= SVGA_CMD_DEFINE_GMRFB
;
646 cmd
->body
.format
.bitsPerPixel
= framebuffer
->base
.bits_per_pixel
;
647 cmd
->body
.format
.colorDepth
= framebuffer
->base
.depth
;
648 cmd
->body
.format
.reserved
= 0;
649 cmd
->body
.bytesPerLine
= framebuffer
->base
.pitch
;
650 cmd
->body
.ptr
.gmrId
= vfbd
->handle
;
651 cmd
->body
.ptr
.offset
= 0;
653 blits
= (void *)&cmd
[1];
654 for (i
= 0; i
< num_clips
; i
++, clips
+= increment
) {
655 blits
[i
].header
= SVGA_CMD_BLIT_GMRFB_TO_SCREEN
;
656 blits
[i
].body
.srcOrigin
.x
= clips
->x1
;
657 blits
[i
].body
.srcOrigin
.y
= clips
->y1
;
658 blits
[i
].body
.destRect
.left
= clips
->x1
;
659 blits
[i
].body
.destRect
.top
= clips
->y1
;
660 blits
[i
].body
.destRect
.right
= clips
->x2
;
661 blits
[i
].body
.destRect
.bottom
= clips
->y2
;
664 ret
= vmw_execbuf_process(file_priv
, dev_priv
, NULL
, cmd
,
672 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer
*framebuffer
,
673 struct drm_file
*file_priv
,
674 unsigned flags
, unsigned color
,
675 struct drm_clip_rect
*clips
,
678 struct vmw_private
*dev_priv
= vmw_priv(framebuffer
->dev
);
679 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
680 struct vmw_framebuffer_dmabuf
*vfbd
=
681 vmw_framebuffer_to_vfbd(framebuffer
);
682 struct vmw_dma_buffer
*dmabuf
= vfbd
->buffer
;
683 struct drm_clip_rect norect
;
684 int ret
, increment
= 1;
686 ret
= ttm_read_lock(&vmaster
->lock
, true);
687 if (unlikely(ret
!= 0))
693 norect
.x1
= norect
.y1
= 0;
694 norect
.x2
= framebuffer
->width
;
695 norect
.y2
= framebuffer
->height
;
696 } else if (flags
& DRM_MODE_FB_DIRTY_ANNOTATE_COPY
) {
701 if (dev_priv
->ldu_priv
) {
702 ret
= do_dmabuf_dirty_ldu(dev_priv
, &vfbd
->base
, dmabuf
,
704 clips
, num_clips
, increment
);
706 ret
= do_dmabuf_dirty_sou(file_priv
, dev_priv
, &vfbd
->base
,
707 dmabuf
, flags
, color
,
708 clips
, num_clips
, increment
);
711 ttm_read_unlock(&vmaster
->lock
);
715 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs
= {
716 .destroy
= vmw_framebuffer_dmabuf_destroy
,
717 .dirty
= vmw_framebuffer_dmabuf_dirty
,
718 .create_handle
= vmw_framebuffer_create_handle
,
722 * Pin the dmabuffer to the start of vram.
724 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer
*vfb
)
726 struct vmw_private
*dev_priv
= vmw_priv(vfb
->base
.dev
);
727 struct vmw_framebuffer_dmabuf
*vfbd
=
728 vmw_framebuffer_to_vfbd(&vfb
->base
);
731 /* This code should not be used with screen objects */
732 BUG_ON(dev_priv
->sou_priv
);
734 vmw_overlay_pause_all(dev_priv
);
736 ret
= vmw_dmabuf_to_start_of_vram(dev_priv
, vfbd
->buffer
, true, false);
738 vmw_overlay_resume_all(dev_priv
);
745 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer
*vfb
)
747 struct vmw_private
*dev_priv
= vmw_priv(vfb
->base
.dev
);
748 struct vmw_framebuffer_dmabuf
*vfbd
=
749 vmw_framebuffer_to_vfbd(&vfb
->base
);
752 WARN_ON(!vfbd
->buffer
);
756 return vmw_dmabuf_unpin(dev_priv
, vfbd
->buffer
, false);
759 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private
*dev_priv
,
760 struct vmw_dma_buffer
*dmabuf
,
761 struct vmw_framebuffer
**out
,
762 const struct drm_mode_fb_cmd
766 struct drm_device
*dev
= dev_priv
->dev
;
767 struct vmw_framebuffer_dmabuf
*vfbd
;
768 unsigned int requested_size
;
771 requested_size
= mode_cmd
->height
* mode_cmd
->pitch
;
772 if (unlikely(requested_size
> dmabuf
->base
.num_pages
* PAGE_SIZE
)) {
773 DRM_ERROR("Screen buffer object size is too small "
774 "for requested mode.\n");
778 vfbd
= kzalloc(sizeof(*vfbd
), GFP_KERNEL
);
784 ret
= drm_framebuffer_init(dev
, &vfbd
->base
.base
,
785 &vmw_framebuffer_dmabuf_funcs
);
789 if (!vmw_dmabuf_reference(dmabuf
)) {
790 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf
);
794 vfbd
->base
.base
.bits_per_pixel
= mode_cmd
->bpp
;
795 vfbd
->base
.base
.pitch
= mode_cmd
->pitch
;
796 vfbd
->base
.base
.depth
= mode_cmd
->depth
;
797 vfbd
->base
.base
.width
= mode_cmd
->width
;
798 vfbd
->base
.base
.height
= mode_cmd
->height
;
799 if (!dev_priv
->sou_priv
) {
800 vfbd
->base
.pin
= vmw_framebuffer_dmabuf_pin
;
801 vfbd
->base
.unpin
= vmw_framebuffer_dmabuf_unpin
;
803 vfbd
->buffer
= dmabuf
;
804 vfbd
->handle
= mode_cmd
->handle
;
810 drm_framebuffer_cleanup(&vfbd
->base
.base
);
818 * Generic Kernel modesetting functions
821 static struct drm_framebuffer
*vmw_kms_fb_create(struct drm_device
*dev
,
822 struct drm_file
*file_priv
,
823 struct drm_mode_fb_cmd
*mode_cmd
)
825 struct vmw_private
*dev_priv
= vmw_priv(dev
);
826 struct ttm_object_file
*tfile
= vmw_fpriv(file_priv
)->tfile
;
827 struct vmw_framebuffer
*vfb
= NULL
;
828 struct vmw_surface
*surface
= NULL
;
829 struct vmw_dma_buffer
*bo
= NULL
;
834 * This code should be conditioned on Screen Objects not being used.
835 * If screen objects are used, we can allocate a GMR to hold the
836 * requested framebuffer.
839 required_size
= mode_cmd
->pitch
* mode_cmd
->height
;
840 if (unlikely(required_size
> (u64
) dev_priv
->vram_size
)) {
841 DRM_ERROR("VRAM size is too small for requested mode.\n");
846 * End conditioned code.
849 ret
= vmw_user_surface_lookup_handle(dev_priv
, tfile
,
850 mode_cmd
->handle
, &surface
);
854 if (!surface
->scanout
)
855 goto err_not_scanout
;
857 ret
= vmw_kms_new_framebuffer_surface(dev_priv
, file_priv
, surface
,
860 /* vmw_user_surface_lookup takes one ref so does new_fb */
861 vmw_surface_unreference(&surface
);
864 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret
);
870 DRM_INFO("%s: trying buffer\n", __func__
);
872 ret
= vmw_user_dmabuf_lookup(tfile
, mode_cmd
->handle
, &bo
);
874 DRM_ERROR("failed to find buffer: %i\n", ret
);
875 return ERR_PTR(-ENOENT
);
878 ret
= vmw_kms_new_framebuffer_dmabuf(dev_priv
, bo
, &vfb
,
881 /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
882 vmw_dmabuf_unreference(&bo
);
885 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret
);
892 DRM_ERROR("surface not marked as scanout\n");
893 /* vmw_user_surface_lookup takes one ref */
894 vmw_surface_unreference(&surface
);
896 return ERR_PTR(-EINVAL
);
899 static struct drm_mode_config_funcs vmw_kms_funcs
= {
900 .fb_create
= vmw_kms_fb_create
,
903 int vmw_kms_init(struct vmw_private
*dev_priv
)
905 struct drm_device
*dev
= dev_priv
->dev
;
908 drm_mode_config_init(dev
);
909 dev
->mode_config
.funcs
= &vmw_kms_funcs
;
910 dev
->mode_config
.min_width
= 1;
911 dev
->mode_config
.min_height
= 1;
912 /* assumed largest fb size */
913 dev
->mode_config
.max_width
= 8192;
914 dev
->mode_config
.max_height
= 8192;
916 ret
= vmw_kms_init_screen_object_display(dev_priv
);
917 if (ret
) /* Fallback */
918 (void)vmw_kms_init_legacy_display_system(dev_priv
);
923 int vmw_kms_close(struct vmw_private
*dev_priv
)
926 * Docs says we should take the lock before calling this function
927 * but since it destroys encoders and our destructor calls
928 * drm_encoder_cleanup which takes the lock we deadlock.
930 drm_mode_config_cleanup(dev_priv
->dev
);
931 vmw_kms_close_legacy_display_system(dev_priv
);
935 int vmw_kms_cursor_bypass_ioctl(struct drm_device
*dev
, void *data
,
936 struct drm_file
*file_priv
)
938 struct drm_vmw_cursor_bypass_arg
*arg
= data
;
939 struct vmw_display_unit
*du
;
940 struct drm_mode_object
*obj
;
941 struct drm_crtc
*crtc
;
945 mutex_lock(&dev
->mode_config
.mutex
);
946 if (arg
->flags
& DRM_VMW_CURSOR_BYPASS_ALL
) {
948 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
949 du
= vmw_crtc_to_du(crtc
);
950 du
->hotspot_x
= arg
->xhot
;
951 du
->hotspot_y
= arg
->yhot
;
954 mutex_unlock(&dev
->mode_config
.mutex
);
958 obj
= drm_mode_object_find(dev
, arg
->crtc_id
, DRM_MODE_OBJECT_CRTC
);
964 crtc
= obj_to_crtc(obj
);
965 du
= vmw_crtc_to_du(crtc
);
967 du
->hotspot_x
= arg
->xhot
;
968 du
->hotspot_y
= arg
->yhot
;
971 mutex_unlock(&dev
->mode_config
.mutex
);
976 int vmw_kms_write_svga(struct vmw_private
*vmw_priv
,
977 unsigned width
, unsigned height
, unsigned pitch
,
978 unsigned bpp
, unsigned depth
)
980 if (vmw_priv
->capabilities
& SVGA_CAP_PITCHLOCK
)
981 vmw_write(vmw_priv
, SVGA_REG_PITCHLOCK
, pitch
);
982 else if (vmw_fifo_have_pitchlock(vmw_priv
))
983 iowrite32(pitch
, vmw_priv
->mmio_virt
+ SVGA_FIFO_PITCHLOCK
);
984 vmw_write(vmw_priv
, SVGA_REG_WIDTH
, width
);
985 vmw_write(vmw_priv
, SVGA_REG_HEIGHT
, height
);
986 vmw_write(vmw_priv
, SVGA_REG_BITS_PER_PIXEL
, bpp
);
988 if (vmw_read(vmw_priv
, SVGA_REG_DEPTH
) != depth
) {
989 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
990 depth
, bpp
, vmw_read(vmw_priv
, SVGA_REG_DEPTH
));
997 int vmw_kms_save_vga(struct vmw_private
*vmw_priv
)
999 struct vmw_vga_topology_state
*save
;
1002 vmw_priv
->vga_width
= vmw_read(vmw_priv
, SVGA_REG_WIDTH
);
1003 vmw_priv
->vga_height
= vmw_read(vmw_priv
, SVGA_REG_HEIGHT
);
1004 vmw_priv
->vga_bpp
= vmw_read(vmw_priv
, SVGA_REG_BITS_PER_PIXEL
);
1005 if (vmw_priv
->capabilities
& SVGA_CAP_PITCHLOCK
)
1006 vmw_priv
->vga_pitchlock
=
1007 vmw_read(vmw_priv
, SVGA_REG_PITCHLOCK
);
1008 else if (vmw_fifo_have_pitchlock(vmw_priv
))
1009 vmw_priv
->vga_pitchlock
= ioread32(vmw_priv
->mmio_virt
+
1010 SVGA_FIFO_PITCHLOCK
);
1012 if (!(vmw_priv
->capabilities
& SVGA_CAP_DISPLAY_TOPOLOGY
))
1015 vmw_priv
->num_displays
= vmw_read(vmw_priv
,
1016 SVGA_REG_NUM_GUEST_DISPLAYS
);
1018 if (vmw_priv
->num_displays
== 0)
1019 vmw_priv
->num_displays
= 1;
1021 for (i
= 0; i
< vmw_priv
->num_displays
; ++i
) {
1022 save
= &vmw_priv
->vga_save
[i
];
1023 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, i
);
1024 save
->primary
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_IS_PRIMARY
);
1025 save
->pos_x
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_POSITION_X
);
1026 save
->pos_y
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_POSITION_Y
);
1027 save
->width
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_WIDTH
);
1028 save
->height
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_HEIGHT
);
1029 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, SVGA_ID_INVALID
);
1030 if (i
== 0 && vmw_priv
->num_displays
== 1 &&
1031 save
->width
== 0 && save
->height
== 0) {
1034 * It should be fairly safe to assume that these
1035 * values are uninitialized.
1038 save
->width
= vmw_priv
->vga_width
- save
->pos_x
;
1039 save
->height
= vmw_priv
->vga_height
- save
->pos_y
;
1046 int vmw_kms_restore_vga(struct vmw_private
*vmw_priv
)
1048 struct vmw_vga_topology_state
*save
;
1051 vmw_write(vmw_priv
, SVGA_REG_WIDTH
, vmw_priv
->vga_width
);
1052 vmw_write(vmw_priv
, SVGA_REG_HEIGHT
, vmw_priv
->vga_height
);
1053 vmw_write(vmw_priv
, SVGA_REG_BITS_PER_PIXEL
, vmw_priv
->vga_bpp
);
1054 if (vmw_priv
->capabilities
& SVGA_CAP_PITCHLOCK
)
1055 vmw_write(vmw_priv
, SVGA_REG_PITCHLOCK
,
1056 vmw_priv
->vga_pitchlock
);
1057 else if (vmw_fifo_have_pitchlock(vmw_priv
))
1058 iowrite32(vmw_priv
->vga_pitchlock
,
1059 vmw_priv
->mmio_virt
+ SVGA_FIFO_PITCHLOCK
);
1061 if (!(vmw_priv
->capabilities
& SVGA_CAP_DISPLAY_TOPOLOGY
))
1064 for (i
= 0; i
< vmw_priv
->num_displays
; ++i
) {
1065 save
= &vmw_priv
->vga_save
[i
];
1066 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, i
);
1067 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_IS_PRIMARY
, save
->primary
);
1068 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_POSITION_X
, save
->pos_x
);
1069 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_POSITION_Y
, save
->pos_y
);
1070 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_WIDTH
, save
->width
);
1071 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_HEIGHT
, save
->height
);
1072 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, SVGA_ID_INVALID
);
1078 bool vmw_kms_validate_mode_vram(struct vmw_private
*dev_priv
,
1082 return ((u64
) pitch
* (u64
) height
) < (u64
) dev_priv
->vram_size
;
1085 u32
vmw_get_vblank_counter(struct drm_device
*dev
, int crtc
)
1092 * Small shared kms functions.
1095 int vmw_du_update_layout(struct vmw_private
*dev_priv
, unsigned num
,
1096 struct drm_vmw_rect
*rects
)
1098 struct drm_device
*dev
= dev_priv
->dev
;
1099 struct vmw_display_unit
*du
;
1100 struct drm_connector
*con
;
1103 mutex_lock(&dev
->mode_config
.mutex
);
1106 DRM_INFO("%s: new layout ", __func__
);
1107 for (i
= 0; i
< (int)num
; i
++)
1108 DRM_INFO("(%i, %i %ux%u) ", rects
[i
].x
, rects
[i
].y
,
1109 rects
[i
].w
, rects
[i
].h
);
1115 list_for_each_entry(con
, &dev
->mode_config
.connector_list
, head
) {
1116 du
= vmw_connector_to_du(con
);
1117 if (num
> du
->unit
) {
1118 du
->pref_width
= rects
[du
->unit
].w
;
1119 du
->pref_height
= rects
[du
->unit
].h
;
1120 du
->pref_active
= true;
1122 du
->pref_width
= 800;
1123 du
->pref_height
= 600;
1124 du
->pref_active
= false;
1126 con
->status
= vmw_du_connector_detect(con
, true);
1129 mutex_unlock(&dev
->mode_config
.mutex
);
1134 void vmw_du_crtc_save(struct drm_crtc
*crtc
)
1138 void vmw_du_crtc_restore(struct drm_crtc
*crtc
)
1142 void vmw_du_crtc_gamma_set(struct drm_crtc
*crtc
,
1143 u16
*r
, u16
*g
, u16
*b
,
1144 uint32_t start
, uint32_t size
)
1146 struct vmw_private
*dev_priv
= vmw_priv(crtc
->dev
);
1149 for (i
= 0; i
< size
; i
++) {
1150 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i
,
1152 vmw_write(dev_priv
, SVGA_PALETTE_BASE
+ i
* 3 + 0, r
[i
] >> 8);
1153 vmw_write(dev_priv
, SVGA_PALETTE_BASE
+ i
* 3 + 1, g
[i
] >> 8);
1154 vmw_write(dev_priv
, SVGA_PALETTE_BASE
+ i
* 3 + 2, b
[i
] >> 8);
1158 void vmw_du_connector_dpms(struct drm_connector
*connector
, int mode
)
1162 void vmw_du_connector_save(struct drm_connector
*connector
)
1166 void vmw_du_connector_restore(struct drm_connector
*connector
)
1170 enum drm_connector_status
1171 vmw_du_connector_detect(struct drm_connector
*connector
, bool force
)
1173 uint32_t num_displays
;
1174 struct drm_device
*dev
= connector
->dev
;
1175 struct vmw_private
*dev_priv
= vmw_priv(dev
);
1177 mutex_lock(&dev_priv
->hw_mutex
);
1178 num_displays
= vmw_read(dev_priv
, SVGA_REG_NUM_DISPLAYS
);
1179 mutex_unlock(&dev_priv
->hw_mutex
);
1181 return ((vmw_connector_to_du(connector
)->unit
< num_displays
) ?
1182 connector_status_connected
: connector_status_disconnected
);
1185 static struct drm_display_mode vmw_kms_connector_builtin
[] = {
1187 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
1188 752, 800, 0, 480, 489, 492, 525, 0,
1189 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
1191 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
1192 968, 1056, 0, 600, 601, 605, 628, 0,
1193 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1195 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
1196 1184, 1344, 0, 768, 771, 777, 806, 0,
1197 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
1199 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
1200 1344, 1600, 0, 864, 865, 868, 900, 0,
1201 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1203 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 79500, 1280, 1344,
1204 1472, 1664, 0, 768, 771, 778, 798, 0,
1205 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1207 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 83500, 1280, 1352,
1208 1480, 1680, 0, 800, 803, 809, 831, 0,
1209 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
1211 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1376,
1212 1488, 1800, 0, 960, 961, 964, 1000, 0,
1213 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1214 /* 1280x1024@60Hz */
1215 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1328,
1216 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1217 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1219 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 85500, 1360, 1424,
1220 1536, 1792, 0, 768, 771, 777, 795, 0,
1221 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1222 /* 1440x1050@60Hz */
1223 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 121750, 1400, 1488,
1224 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1225 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1227 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 106500, 1440, 1520,
1228 1672, 1904, 0, 900, 903, 909, 934, 0,
1229 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1230 /* 1600x1200@60Hz */
1231 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 162000, 1600, 1664,
1232 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1233 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1234 /* 1680x1050@60Hz */
1235 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 146250, 1680, 1784,
1236 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1237 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1238 /* 1792x1344@60Hz */
1239 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 204750, 1792, 1920,
1240 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1241 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1242 /* 1853x1392@60Hz */
1243 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 218250, 1856, 1952,
1244 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1245 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1246 /* 1920x1200@60Hz */
1247 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 193250, 1920, 2056,
1248 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1249 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1250 /* 1920x1440@60Hz */
1251 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 234000, 1920, 2048,
1252 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1253 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1254 /* 2560x1600@60Hz */
1255 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 348500, 2560, 2752,
1256 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1257 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1259 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1262 int vmw_du_connector_fill_modes(struct drm_connector
*connector
,
1263 uint32_t max_width
, uint32_t max_height
)
1265 struct vmw_display_unit
*du
= vmw_connector_to_du(connector
);
1266 struct drm_device
*dev
= connector
->dev
;
1267 struct vmw_private
*dev_priv
= vmw_priv(dev
);
1268 struct drm_display_mode
*mode
= NULL
;
1269 struct drm_display_mode
*bmode
;
1270 struct drm_display_mode prefmode
= { DRM_MODE("preferred",
1271 DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
,
1272 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1273 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
)
1277 /* Add preferred mode */
1279 mode
= drm_mode_duplicate(dev
, &prefmode
);
1282 mode
->hdisplay
= du
->pref_width
;
1283 mode
->vdisplay
= du
->pref_height
;
1284 mode
->vrefresh
= drm_mode_vrefresh(mode
);
1285 if (vmw_kms_validate_mode_vram(dev_priv
, mode
->hdisplay
* 2,
1287 drm_mode_probed_add(connector
, mode
);
1289 if (du
->pref_mode
) {
1290 list_del_init(&du
->pref_mode
->head
);
1291 drm_mode_destroy(dev
, du
->pref_mode
);
1294 du
->pref_mode
= mode
;
1298 for (i
= 0; vmw_kms_connector_builtin
[i
].type
!= 0; i
++) {
1299 bmode
= &vmw_kms_connector_builtin
[i
];
1300 if (bmode
->hdisplay
> max_width
||
1301 bmode
->vdisplay
> max_height
)
1304 if (!vmw_kms_validate_mode_vram(dev_priv
, bmode
->hdisplay
* 2,
1308 mode
= drm_mode_duplicate(dev
, bmode
);
1311 mode
->vrefresh
= drm_mode_vrefresh(mode
);
1313 drm_mode_probed_add(connector
, mode
);
1316 drm_mode_connector_list_update(connector
);
1321 int vmw_du_connector_set_property(struct drm_connector
*connector
,
1322 struct drm_property
*property
,