1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "vmwgfx_kms.h"
30 /* Might need a hrtimer here? */
31 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33 static int vmw_surface_dmabuf_pin(struct vmw_framebuffer
*vfb
);
34 static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer
*vfb
);
36 void vmw_display_unit_cleanup(struct vmw_display_unit
*du
)
38 if (du
->cursor_surface
)
39 vmw_surface_unreference(&du
->cursor_surface
);
40 if (du
->cursor_dmabuf
)
41 vmw_dmabuf_unreference(&du
->cursor_dmabuf
);
42 drm_crtc_cleanup(&du
->crtc
);
43 drm_encoder_cleanup(&du
->encoder
);
44 drm_connector_cleanup(&du
->connector
);
48 * Display Unit Cursor functions
51 int vmw_cursor_update_image(struct vmw_private
*dev_priv
,
52 u32
*image
, u32 width
, u32 height
,
53 u32 hotspotX
, u32 hotspotY
)
57 SVGAFifoCmdDefineAlphaCursor cursor
;
59 u32 image_size
= width
* height
* 4;
60 u32 cmd_size
= sizeof(*cmd
) + image_size
;
65 cmd
= vmw_fifo_reserve(dev_priv
, cmd_size
);
66 if (unlikely(cmd
== NULL
)) {
67 DRM_ERROR("Fifo reserve failed.\n");
71 memset(cmd
, 0, sizeof(*cmd
));
73 memcpy(&cmd
[1], image
, image_size
);
75 cmd
->cmd
= cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR
);
76 cmd
->cursor
.id
= cpu_to_le32(0);
77 cmd
->cursor
.width
= cpu_to_le32(width
);
78 cmd
->cursor
.height
= cpu_to_le32(height
);
79 cmd
->cursor
.hotspotX
= cpu_to_le32(hotspotX
);
80 cmd
->cursor
.hotspotY
= cpu_to_le32(hotspotY
);
82 vmw_fifo_commit(dev_priv
, cmd_size
);
87 void vmw_cursor_update_position(struct vmw_private
*dev_priv
,
88 bool show
, int x
, int y
)
90 __le32 __iomem
*fifo_mem
= dev_priv
->mmio_virt
;
93 iowrite32(show
? 1 : 0, fifo_mem
+ SVGA_FIFO_CURSOR_ON
);
94 iowrite32(x
, fifo_mem
+ SVGA_FIFO_CURSOR_X
);
95 iowrite32(y
, fifo_mem
+ SVGA_FIFO_CURSOR_Y
);
96 count
= ioread32(fifo_mem
+ SVGA_FIFO_CURSOR_COUNT
);
97 iowrite32(++count
, fifo_mem
+ SVGA_FIFO_CURSOR_COUNT
);
100 int vmw_du_crtc_cursor_set(struct drm_crtc
*crtc
, struct drm_file
*file_priv
,
101 uint32_t handle
, uint32_t width
, uint32_t height
)
103 struct vmw_private
*dev_priv
= vmw_priv(crtc
->dev
);
104 struct ttm_object_file
*tfile
= vmw_fpriv(file_priv
)->tfile
;
105 struct vmw_display_unit
*du
= vmw_crtc_to_du(crtc
);
106 struct vmw_surface
*surface
= NULL
;
107 struct vmw_dma_buffer
*dmabuf
= NULL
;
111 ret
= vmw_user_surface_lookup_handle(dev_priv
, tfile
,
114 if (!surface
->snooper
.image
) {
115 DRM_ERROR("surface not suitable for cursor\n");
119 ret
= vmw_user_dmabuf_lookup(tfile
,
122 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret
);
128 /* takedown old cursor */
129 if (du
->cursor_surface
) {
130 du
->cursor_surface
->snooper
.crtc
= NULL
;
131 vmw_surface_unreference(&du
->cursor_surface
);
133 if (du
->cursor_dmabuf
)
134 vmw_dmabuf_unreference(&du
->cursor_dmabuf
);
136 /* setup new image */
138 /* vmw_user_surface_lookup takes one reference */
139 du
->cursor_surface
= surface
;
141 du
->cursor_surface
->snooper
.crtc
= crtc
;
142 du
->cursor_age
= du
->cursor_surface
->snooper
.age
;
143 vmw_cursor_update_image(dev_priv
, surface
->snooper
.image
,
144 64, 64, du
->hotspot_x
, du
->hotspot_y
);
146 struct ttm_bo_kmap_obj map
;
147 unsigned long kmap_offset
;
148 unsigned long kmap_num
;
152 /* vmw_user_surface_lookup takes one reference */
153 du
->cursor_dmabuf
= dmabuf
;
156 kmap_num
= (64*64*4) >> PAGE_SHIFT
;
158 ret
= ttm_bo_reserve(&dmabuf
->base
, true, false, false, 0);
159 if (unlikely(ret
!= 0)) {
160 DRM_ERROR("reserve failed\n");
164 ret
= ttm_bo_kmap(&dmabuf
->base
, kmap_offset
, kmap_num
, &map
);
165 if (unlikely(ret
!= 0))
168 virtual = ttm_kmap_obj_virtual(&map
, &dummy
);
169 vmw_cursor_update_image(dev_priv
, virtual, 64, 64,
170 du
->hotspot_x
, du
->hotspot_y
);
174 ttm_bo_unreserve(&dmabuf
->base
);
177 vmw_cursor_update_position(dev_priv
, false, 0, 0);
181 vmw_cursor_update_position(dev_priv
, true, du
->cursor_x
, du
->cursor_y
);
186 int vmw_du_crtc_cursor_move(struct drm_crtc
*crtc
, int x
, int y
)
188 struct vmw_private
*dev_priv
= vmw_priv(crtc
->dev
);
189 struct vmw_display_unit
*du
= vmw_crtc_to_du(crtc
);
190 bool shown
= du
->cursor_surface
|| du
->cursor_dmabuf
? true : false;
192 du
->cursor_x
= x
+ crtc
->x
;
193 du
->cursor_y
= y
+ crtc
->y
;
195 vmw_cursor_update_position(dev_priv
, shown
,
196 du
->cursor_x
, du
->cursor_y
);
201 void vmw_kms_cursor_snoop(struct vmw_surface
*srf
,
202 struct ttm_object_file
*tfile
,
203 struct ttm_buffer_object
*bo
,
204 SVGA3dCmdHeader
*header
)
206 struct ttm_bo_kmap_obj map
;
207 unsigned long kmap_offset
;
208 unsigned long kmap_num
;
214 SVGA3dCmdHeader header
;
215 SVGA3dCmdSurfaceDMA dma
;
219 cmd
= container_of(header
, struct vmw_dma_cmd
, header
);
221 /* No snooper installed */
222 if (!srf
->snooper
.image
)
225 if (cmd
->dma
.host
.face
!= 0 || cmd
->dma
.host
.mipmap
!= 0) {
226 DRM_ERROR("face and mipmap for cursors should never != 0\n");
230 if (cmd
->header
.size
< 64) {
231 DRM_ERROR("at least one full copy box must be given\n");
235 box
= (SVGA3dCopyBox
*)&cmd
[1];
236 box_count
= (cmd
->header
.size
- sizeof(SVGA3dCmdSurfaceDMA
)) /
237 sizeof(SVGA3dCopyBox
);
239 if (cmd
->dma
.guest
.pitch
!= (64 * 4) ||
240 cmd
->dma
.guest
.ptr
.offset
% PAGE_SIZE
||
241 box
->x
!= 0 || box
->y
!= 0 || box
->z
!= 0 ||
242 box
->srcx
!= 0 || box
->srcy
!= 0 || box
->srcz
!= 0 ||
243 box
->w
!= 64 || box
->h
!= 64 || box
->d
!= 1 ||
245 /* TODO handle none page aligned offsets */
246 /* TODO handle partial uploads and pitch != 256 */
247 /* TODO handle more then one copy (size != 64) */
248 DRM_ERROR("lazy programmer, can't handle weird stuff\n");
252 kmap_offset
= cmd
->dma
.guest
.ptr
.offset
>> PAGE_SHIFT
;
253 kmap_num
= (64*64*4) >> PAGE_SHIFT
;
255 ret
= ttm_bo_reserve(bo
, true, false, false, 0);
256 if (unlikely(ret
!= 0)) {
257 DRM_ERROR("reserve failed\n");
261 ret
= ttm_bo_kmap(bo
, kmap_offset
, kmap_num
, &map
);
262 if (unlikely(ret
!= 0))
265 virtual = ttm_kmap_obj_virtual(&map
, &dummy
);
267 memcpy(srf
->snooper
.image
, virtual, 64*64*4);
270 /* we can't call this function from this function since execbuf has
271 * reserved fifo space.
273 * if (srf->snooper.crtc)
274 * vmw_ldu_crtc_cursor_update_image(dev_priv,
275 * srf->snooper.image, 64, 64,
276 * du->hotspot_x, du->hotspot_y);
281 ttm_bo_unreserve(bo
);
284 void vmw_kms_cursor_post_execbuf(struct vmw_private
*dev_priv
)
286 struct drm_device
*dev
= dev_priv
->dev
;
287 struct vmw_display_unit
*du
;
288 struct drm_crtc
*crtc
;
290 mutex_lock(&dev
->mode_config
.mutex
);
292 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
293 du
= vmw_crtc_to_du(crtc
);
294 if (!du
->cursor_surface
||
295 du
->cursor_age
== du
->cursor_surface
->snooper
.age
)
298 du
->cursor_age
= du
->cursor_surface
->snooper
.age
;
299 vmw_cursor_update_image(dev_priv
,
300 du
->cursor_surface
->snooper
.image
,
301 64, 64, du
->hotspot_x
, du
->hotspot_y
);
304 mutex_unlock(&dev
->mode_config
.mutex
);
308 * Generic framebuffer code
311 int vmw_framebuffer_create_handle(struct drm_framebuffer
*fb
,
312 struct drm_file
*file_priv
,
313 unsigned int *handle
)
322 * Surface framebuffer code
325 #define vmw_framebuffer_to_vfbs(x) \
326 container_of(x, struct vmw_framebuffer_surface, base.base)
328 struct vmw_framebuffer_surface
{
329 struct vmw_framebuffer base
;
330 struct vmw_surface
*surface
;
331 struct vmw_dma_buffer
*buffer
;
332 struct delayed_work d_work
;
333 struct mutex work_lock
;
335 struct list_head head
;
336 struct drm_master
*master
;
340 * vmw_kms_idle_workqueues - Flush workqueues on this master
342 * @vmaster - Pointer identifying the master, for the surfaces of which
343 * we idle the dirty work queues.
345 * This function should be called with the ttm lock held in exclusive mode
346 * to idle all dirty work queues before the fifo is taken down.
348 * The work task may actually requeue itself, but after the flush returns we're
349 * sure that there's nothing to present, since the ttm lock is held in
350 * exclusive mode, so the fifo will never get used.
353 void vmw_kms_idle_workqueues(struct vmw_master
*vmaster
)
355 struct vmw_framebuffer_surface
*entry
;
357 mutex_lock(&vmaster
->fb_surf_mutex
);
358 list_for_each_entry(entry
, &vmaster
->fb_surf
, head
) {
359 if (cancel_delayed_work_sync(&entry
->d_work
))
360 (void) entry
->d_work
.work
.func(&entry
->d_work
.work
);
362 (void) cancel_delayed_work_sync(&entry
->d_work
);
364 mutex_unlock(&vmaster
->fb_surf_mutex
);
367 void vmw_framebuffer_surface_destroy(struct drm_framebuffer
*framebuffer
)
369 struct vmw_framebuffer_surface
*vfbs
=
370 vmw_framebuffer_to_vfbs(framebuffer
);
371 struct vmw_master
*vmaster
= vmw_master(vfbs
->master
);
374 mutex_lock(&vmaster
->fb_surf_mutex
);
375 list_del(&vfbs
->head
);
376 mutex_unlock(&vmaster
->fb_surf_mutex
);
378 cancel_delayed_work_sync(&vfbs
->d_work
);
379 drm_master_put(&vfbs
->master
);
380 drm_framebuffer_cleanup(framebuffer
);
381 vmw_surface_unreference(&vfbs
->surface
);
386 static void vmw_framebuffer_present_fs_callback(struct work_struct
*work
)
388 struct delayed_work
*d_work
=
389 container_of(work
, struct delayed_work
, work
);
390 struct vmw_framebuffer_surface
*vfbs
=
391 container_of(d_work
, struct vmw_framebuffer_surface
, d_work
);
392 struct vmw_surface
*surf
= vfbs
->surface
;
393 struct drm_framebuffer
*framebuffer
= &vfbs
->base
.base
;
394 struct vmw_private
*dev_priv
= vmw_priv(framebuffer
->dev
);
397 SVGA3dCmdHeader header
;
398 SVGA3dCmdPresent body
;
403 * Strictly we should take the ttm_lock in read mode before accessing
404 * the fifo, to make sure the fifo is present and up. However,
405 * instead we flush all workqueues under the ttm lock in exclusive mode
406 * before taking down the fifo.
408 mutex_lock(&vfbs
->work_lock
);
409 if (!vfbs
->present_fs
)
412 cmd
= vmw_fifo_reserve(dev_priv
, sizeof(*cmd
));
413 if (unlikely(cmd
== NULL
))
416 cmd
->header
.id
= cpu_to_le32(SVGA_3D_CMD_PRESENT
);
417 cmd
->header
.size
= cpu_to_le32(sizeof(cmd
->body
) + sizeof(cmd
->cr
));
418 cmd
->body
.sid
= cpu_to_le32(surf
->res
.id
);
419 cmd
->cr
.x
= cpu_to_le32(0);
420 cmd
->cr
.y
= cpu_to_le32(0);
421 cmd
->cr
.srcx
= cmd
->cr
.x
;
422 cmd
->cr
.srcy
= cmd
->cr
.y
;
423 cmd
->cr
.w
= cpu_to_le32(framebuffer
->width
);
424 cmd
->cr
.h
= cpu_to_le32(framebuffer
->height
);
425 vfbs
->present_fs
= false;
426 vmw_fifo_commit(dev_priv
, sizeof(*cmd
));
429 * Will not re-add if already pending.
431 schedule_delayed_work(&vfbs
->d_work
, VMWGFX_PRESENT_RATE
);
433 mutex_unlock(&vfbs
->work_lock
);
436 static int do_surface_dirty_ldu(struct vmw_private
*dev_priv
,
437 struct vmw_framebuffer
*framebuffer
,
438 struct vmw_surface
*surf
,
439 unsigned flags
, unsigned color
,
440 struct drm_clip_rect
*clips
,
441 unsigned num_clips
, int inc
)
447 SVGA3dCmdHeader header
;
448 SVGA3dCmdPresent body
;
452 cmd
= vmw_fifo_reserve(dev_priv
, sizeof(*cmd
) + (num_clips
- 1) *
454 if (unlikely(cmd
== NULL
)) {
455 DRM_ERROR("Fifo reserve failed.\n");
459 memset(cmd
, 0, sizeof(*cmd
));
461 cmd
->header
.id
= cpu_to_le32(SVGA_3D_CMD_PRESENT
);
462 cmd
->header
.size
= cpu_to_le32(sizeof(cmd
->body
) + num_clips
*
464 cmd
->body
.sid
= cpu_to_le32(surf
->res
.id
);
466 for (i
= 0, cr
= &cmd
->cr
; i
< num_clips
; i
++, cr
++, clips
+= inc
) {
467 cr
->x
= cpu_to_le16(clips
->x1
);
468 cr
->y
= cpu_to_le16(clips
->y1
);
471 cr
->w
= cpu_to_le16(clips
->x2
- clips
->x1
);
472 cr
->h
= cpu_to_le16(clips
->y2
- clips
->y1
);
475 vmw_fifo_commit(dev_priv
, sizeof(*cmd
) + (num_clips
- 1) *
480 int vmw_framebuffer_surface_dirty(struct drm_framebuffer
*framebuffer
,
481 struct drm_file
*file_priv
,
482 unsigned flags
, unsigned color
,
483 struct drm_clip_rect
*clips
,
486 struct vmw_private
*dev_priv
= vmw_priv(framebuffer
->dev
);
487 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
488 struct vmw_framebuffer_surface
*vfbs
=
489 vmw_framebuffer_to_vfbs(framebuffer
);
490 struct vmw_surface
*surf
= vfbs
->surface
;
491 struct drm_clip_rect norect
;
494 if (unlikely(vfbs
->master
!= file_priv
->master
))
497 ret
= ttm_read_lock(&vmaster
->lock
, true);
498 if (unlikely(ret
!= 0))
502 !(dev_priv
->fifo
.capabilities
&
503 SVGA_FIFO_CAP_SCREEN_OBJECT
)) {
506 mutex_lock(&vfbs
->work_lock
);
507 vfbs
->present_fs
= true;
508 ret
= schedule_delayed_work(&vfbs
->d_work
, VMWGFX_PRESENT_RATE
);
509 mutex_unlock(&vfbs
->work_lock
);
512 * No work pending, Force immediate present.
514 vmw_framebuffer_present_fs_callback(&vfbs
->d_work
.work
);
516 ttm_read_unlock(&vmaster
->lock
);
523 norect
.x1
= norect
.y1
= 0;
524 norect
.x2
= framebuffer
->width
;
525 norect
.y2
= framebuffer
->height
;
526 } else if (flags
& DRM_MODE_FB_DIRTY_ANNOTATE_COPY
) {
528 inc
= 2; /* skip source rects */
531 ret
= do_surface_dirty_ldu(dev_priv
, &vfbs
->base
, surf
,
533 clips
, num_clips
, inc
);
535 ttm_read_unlock(&vmaster
->lock
);
539 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs
= {
540 .destroy
= vmw_framebuffer_surface_destroy
,
541 .dirty
= vmw_framebuffer_surface_dirty
,
542 .create_handle
= vmw_framebuffer_create_handle
,
545 static int vmw_kms_new_framebuffer_surface(struct vmw_private
*dev_priv
,
546 struct drm_file
*file_priv
,
547 struct vmw_surface
*surface
,
548 struct vmw_framebuffer
**out
,
549 const struct drm_mode_fb_cmd
553 struct drm_device
*dev
= dev_priv
->dev
;
554 struct vmw_framebuffer_surface
*vfbs
;
555 enum SVGA3dSurfaceFormat format
;
556 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
563 if (unlikely(surface
->mip_levels
[0] != 1 ||
564 surface
->num_sizes
!= 1 ||
565 surface
->sizes
[0].width
< mode_cmd
->width
||
566 surface
->sizes
[0].height
< mode_cmd
->height
||
567 surface
->sizes
[0].depth
!= 1)) {
568 DRM_ERROR("Incompatible surface dimensions "
569 "for requested mode.\n");
573 switch (mode_cmd
->depth
) {
575 format
= SVGA3D_A8R8G8B8
;
578 format
= SVGA3D_X8R8G8B8
;
581 format
= SVGA3D_R5G6B5
;
584 format
= SVGA3D_A1R5G5B5
;
587 format
= SVGA3D_LUMINANCE8
;
590 DRM_ERROR("Invalid color depth: %d\n", mode_cmd
->depth
);
594 if (unlikely(format
!= surface
->format
)) {
595 DRM_ERROR("Invalid surface format for requested mode.\n");
599 vfbs
= kzalloc(sizeof(*vfbs
), GFP_KERNEL
);
605 ret
= drm_framebuffer_init(dev
, &vfbs
->base
.base
,
606 &vmw_framebuffer_surface_funcs
);
610 if (!vmw_surface_reference(surface
)) {
611 DRM_ERROR("failed to reference surface %p\n", surface
);
615 /* XXX get the first 3 from the surface info */
616 vfbs
->base
.base
.bits_per_pixel
= mode_cmd
->bpp
;
617 vfbs
->base
.base
.pitch
= mode_cmd
->pitch
;
618 vfbs
->base
.base
.depth
= mode_cmd
->depth
;
619 vfbs
->base
.base
.width
= mode_cmd
->width
;
620 vfbs
->base
.base
.height
= mode_cmd
->height
;
621 vfbs
->base
.pin
= &vmw_surface_dmabuf_pin
;
622 vfbs
->base
.unpin
= &vmw_surface_dmabuf_unpin
;
623 vfbs
->surface
= surface
;
624 vfbs
->master
= drm_master_get(file_priv
->master
);
625 mutex_init(&vfbs
->work_lock
);
627 mutex_lock(&vmaster
->fb_surf_mutex
);
628 INIT_DELAYED_WORK(&vfbs
->d_work
, &vmw_framebuffer_present_fs_callback
);
629 list_add_tail(&vfbs
->head
, &vmaster
->fb_surf
);
630 mutex_unlock(&vmaster
->fb_surf_mutex
);
637 drm_framebuffer_cleanup(&vfbs
->base
.base
);
645 * Dmabuf framebuffer code
648 #define vmw_framebuffer_to_vfbd(x) \
649 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
651 struct vmw_framebuffer_dmabuf
{
652 struct vmw_framebuffer base
;
653 struct vmw_dma_buffer
*buffer
;
656 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer
*framebuffer
)
658 struct vmw_framebuffer_dmabuf
*vfbd
=
659 vmw_framebuffer_to_vfbd(framebuffer
);
661 drm_framebuffer_cleanup(framebuffer
);
662 vmw_dmabuf_unreference(&vfbd
->buffer
);
667 static int do_dmabuf_dirty_ldu(struct vmw_private
*dev_priv
,
668 struct vmw_framebuffer
*framebuffer
,
669 struct vmw_dma_buffer
*buffer
,
670 unsigned flags
, unsigned color
,
671 struct drm_clip_rect
*clips
,
672 unsigned num_clips
, int increment
)
679 SVGAFifoCmdUpdate body
;
682 fifo_size
= sizeof(*cmd
) * num_clips
;
683 cmd
= vmw_fifo_reserve(dev_priv
, fifo_size
);
684 if (unlikely(cmd
== NULL
)) {
685 DRM_ERROR("Fifo reserve failed.\n");
689 memset(cmd
, 0, fifo_size
);
690 for (i
= 0; i
< num_clips
; i
++, clips
+= increment
) {
691 cmd
[i
].header
= cpu_to_le32(SVGA_CMD_UPDATE
);
692 cmd
[i
].body
.x
= cpu_to_le32(clips
->x1
);
693 cmd
[i
].body
.y
= cpu_to_le32(clips
->y1
);
694 cmd
[i
].body
.width
= cpu_to_le32(clips
->x2
- clips
->x1
);
695 cmd
[i
].body
.height
= cpu_to_le32(clips
->y2
- clips
->y1
);
698 vmw_fifo_commit(dev_priv
, fifo_size
);
702 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer
*framebuffer
,
703 struct drm_file
*file_priv
,
704 unsigned flags
, unsigned color
,
705 struct drm_clip_rect
*clips
,
708 struct vmw_private
*dev_priv
= vmw_priv(framebuffer
->dev
);
709 struct vmw_master
*vmaster
= vmw_master(file_priv
->master
);
710 struct vmw_framebuffer_dmabuf
*vfbd
=
711 vmw_framebuffer_to_vfbd(framebuffer
);
712 struct vmw_dma_buffer
*dmabuf
= vfbd
->buffer
;
713 struct drm_clip_rect norect
;
714 int ret
, increment
= 1;
716 ret
= ttm_read_lock(&vmaster
->lock
, true);
717 if (unlikely(ret
!= 0))
723 norect
.x1
= norect
.y1
= 0;
724 norect
.x2
= framebuffer
->width
;
725 norect
.y2
= framebuffer
->height
;
726 } else if (flags
& DRM_MODE_FB_DIRTY_ANNOTATE_COPY
) {
731 ret
= do_dmabuf_dirty_ldu(dev_priv
, &vfbd
->base
, dmabuf
,
733 clips
, num_clips
, increment
);
735 ttm_read_unlock(&vmaster
->lock
);
739 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs
= {
740 .destroy
= vmw_framebuffer_dmabuf_destroy
,
741 .dirty
= vmw_framebuffer_dmabuf_dirty
,
742 .create_handle
= vmw_framebuffer_create_handle
,
746 * We need to reserve the start of vram because the host might
747 * scribble to it at mode changes, so we need to reserve it.
749 static int vmw_surface_dmabuf_pin(struct vmw_framebuffer
*vfb
)
751 struct vmw_private
*dev_priv
= vmw_priv(vfb
->base
.dev
);
752 struct vmw_framebuffer_surface
*vfbs
=
753 vmw_framebuffer_to_vfbs(&vfb
->base
);
754 unsigned long size
= vfbs
->base
.base
.pitch
* vfbs
->base
.base
.height
;
756 struct ttm_placement ne_placement
= vmw_vram_ne_placement
;
758 ne_placement
.lpfn
= (size
+ (PAGE_SIZE
- 1)) / PAGE_SIZE
;
760 vfbs
->buffer
= kzalloc(sizeof(*vfbs
->buffer
), GFP_KERNEL
);
761 if (unlikely(vfbs
->buffer
== NULL
))
764 vmw_overlay_pause_all(dev_priv
);
765 ret
= vmw_dmabuf_init(dev_priv
, vfbs
->buffer
, size
,
766 &vmw_vram_ne_placement
,
767 false, &vmw_dmabuf_bo_free
);
768 vmw_overlay_resume_all(dev_priv
);
769 if (unlikely(ret
!= 0))
776 * See vmw_surface_dmabuf_pin.
778 static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer
*vfb
)
780 struct ttm_buffer_object
*bo
;
781 struct vmw_framebuffer_surface
*vfbs
=
782 vmw_framebuffer_to_vfbs(&vfb
->base
);
784 if (unlikely(vfbs
->buffer
== NULL
))
787 bo
= &vfbs
->buffer
->base
;
795 * Pin the dmabuffer to the start of vram.
797 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer
*vfb
)
799 struct vmw_private
*dev_priv
= vmw_priv(vfb
->base
.dev
);
800 struct vmw_framebuffer_dmabuf
*vfbd
=
801 vmw_framebuffer_to_vfbd(&vfb
->base
);
805 vmw_overlay_pause_all(dev_priv
);
807 ret
= vmw_dmabuf_to_start_of_vram(dev_priv
, vfbd
->buffer
);
809 vmw_overlay_resume_all(dev_priv
);
816 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer
*vfb
)
818 struct vmw_private
*dev_priv
= vmw_priv(vfb
->base
.dev
);
819 struct vmw_framebuffer_dmabuf
*vfbd
=
820 vmw_framebuffer_to_vfbd(&vfb
->base
);
823 WARN_ON(!vfbd
->buffer
);
827 return vmw_dmabuf_from_vram(dev_priv
, vfbd
->buffer
);
830 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private
*dev_priv
,
831 struct vmw_dma_buffer
*dmabuf
,
832 struct vmw_framebuffer
**out
,
833 const struct drm_mode_fb_cmd
837 struct drm_device
*dev
= dev_priv
->dev
;
838 struct vmw_framebuffer_dmabuf
*vfbd
;
839 unsigned int requested_size
;
842 requested_size
= mode_cmd
->height
* mode_cmd
->pitch
;
843 if (unlikely(requested_size
> dmabuf
->base
.num_pages
* PAGE_SIZE
)) {
844 DRM_ERROR("Screen buffer object size is too small "
845 "for requested mode.\n");
849 vfbd
= kzalloc(sizeof(*vfbd
), GFP_KERNEL
);
855 ret
= drm_framebuffer_init(dev
, &vfbd
->base
.base
,
856 &vmw_framebuffer_dmabuf_funcs
);
860 if (!vmw_dmabuf_reference(dmabuf
)) {
861 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf
);
865 vfbd
->base
.base
.bits_per_pixel
= mode_cmd
->bpp
;
866 vfbd
->base
.base
.pitch
= mode_cmd
->pitch
;
867 vfbd
->base
.base
.depth
= mode_cmd
->depth
;
868 vfbd
->base
.base
.width
= mode_cmd
->width
;
869 vfbd
->base
.base
.height
= mode_cmd
->height
;
870 vfbd
->base
.pin
= vmw_framebuffer_dmabuf_pin
;
871 vfbd
->base
.unpin
= vmw_framebuffer_dmabuf_unpin
;
872 vfbd
->buffer
= dmabuf
;
878 drm_framebuffer_cleanup(&vfbd
->base
.base
);
886 * Generic Kernel modesetting functions
889 static struct drm_framebuffer
*vmw_kms_fb_create(struct drm_device
*dev
,
890 struct drm_file
*file_priv
,
891 struct drm_mode_fb_cmd
*mode_cmd
)
893 struct vmw_private
*dev_priv
= vmw_priv(dev
);
894 struct ttm_object_file
*tfile
= vmw_fpriv(file_priv
)->tfile
;
895 struct vmw_framebuffer
*vfb
= NULL
;
896 struct vmw_surface
*surface
= NULL
;
897 struct vmw_dma_buffer
*bo
= NULL
;
902 * This code should be conditioned on Screen Objects not being used.
903 * If screen objects are used, we can allocate a GMR to hold the
904 * requested framebuffer.
907 required_size
= mode_cmd
->pitch
* mode_cmd
->height
;
908 if (unlikely(required_size
> (u64
) dev_priv
->vram_size
)) {
909 DRM_ERROR("VRAM size is too small for requested mode.\n");
914 * End conditioned code.
917 ret
= vmw_user_surface_lookup_handle(dev_priv
, tfile
,
918 mode_cmd
->handle
, &surface
);
922 if (!surface
->scanout
)
923 goto err_not_scanout
;
925 ret
= vmw_kms_new_framebuffer_surface(dev_priv
, file_priv
, surface
,
928 /* vmw_user_surface_lookup takes one ref so does new_fb */
929 vmw_surface_unreference(&surface
);
932 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret
);
938 DRM_INFO("%s: trying buffer\n", __func__
);
940 ret
= vmw_user_dmabuf_lookup(tfile
, mode_cmd
->handle
, &bo
);
942 DRM_ERROR("failed to find buffer: %i\n", ret
);
943 return ERR_PTR(-ENOENT
);
946 ret
= vmw_kms_new_framebuffer_dmabuf(dev_priv
, bo
, &vfb
,
949 /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
950 vmw_dmabuf_unreference(&bo
);
953 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret
);
960 DRM_ERROR("surface not marked as scanout\n");
961 /* vmw_user_surface_lookup takes one ref */
962 vmw_surface_unreference(&surface
);
964 return ERR_PTR(-EINVAL
);
967 static struct drm_mode_config_funcs vmw_kms_funcs
= {
968 .fb_create
= vmw_kms_fb_create
,
971 int vmw_kms_init(struct vmw_private
*dev_priv
)
973 struct drm_device
*dev
= dev_priv
->dev
;
976 drm_mode_config_init(dev
);
977 dev
->mode_config
.funcs
= &vmw_kms_funcs
;
978 dev
->mode_config
.min_width
= 1;
979 dev
->mode_config
.min_height
= 1;
980 /* assumed largest fb size */
981 dev
->mode_config
.max_width
= 8192;
982 dev
->mode_config
.max_height
= 8192;
984 ret
= vmw_kms_init_legacy_display_system(dev_priv
);
989 int vmw_kms_close(struct vmw_private
*dev_priv
)
992 * Docs says we should take the lock before calling this function
993 * but since it destroys encoders and our destructor calls
994 * drm_encoder_cleanup which takes the lock we deadlock.
996 drm_mode_config_cleanup(dev_priv
->dev
);
997 vmw_kms_close_legacy_display_system(dev_priv
);
1001 int vmw_kms_cursor_bypass_ioctl(struct drm_device
*dev
, void *data
,
1002 struct drm_file
*file_priv
)
1004 struct drm_vmw_cursor_bypass_arg
*arg
= data
;
1005 struct vmw_display_unit
*du
;
1006 struct drm_mode_object
*obj
;
1007 struct drm_crtc
*crtc
;
1011 mutex_lock(&dev
->mode_config
.mutex
);
1012 if (arg
->flags
& DRM_VMW_CURSOR_BYPASS_ALL
) {
1014 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
1015 du
= vmw_crtc_to_du(crtc
);
1016 du
->hotspot_x
= arg
->xhot
;
1017 du
->hotspot_y
= arg
->yhot
;
1020 mutex_unlock(&dev
->mode_config
.mutex
);
1024 obj
= drm_mode_object_find(dev
, arg
->crtc_id
, DRM_MODE_OBJECT_CRTC
);
1030 crtc
= obj_to_crtc(obj
);
1031 du
= vmw_crtc_to_du(crtc
);
1033 du
->hotspot_x
= arg
->xhot
;
1034 du
->hotspot_y
= arg
->yhot
;
1037 mutex_unlock(&dev
->mode_config
.mutex
);
1042 int vmw_kms_write_svga(struct vmw_private
*vmw_priv
,
1043 unsigned width
, unsigned height
, unsigned pitch
,
1044 unsigned bpp
, unsigned depth
)
1046 if (vmw_priv
->capabilities
& SVGA_CAP_PITCHLOCK
)
1047 vmw_write(vmw_priv
, SVGA_REG_PITCHLOCK
, pitch
);
1048 else if (vmw_fifo_have_pitchlock(vmw_priv
))
1049 iowrite32(pitch
, vmw_priv
->mmio_virt
+ SVGA_FIFO_PITCHLOCK
);
1050 vmw_write(vmw_priv
, SVGA_REG_WIDTH
, width
);
1051 vmw_write(vmw_priv
, SVGA_REG_HEIGHT
, height
);
1052 vmw_write(vmw_priv
, SVGA_REG_BITS_PER_PIXEL
, bpp
);
1054 if (vmw_read(vmw_priv
, SVGA_REG_DEPTH
) != depth
) {
1055 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1056 depth
, bpp
, vmw_read(vmw_priv
, SVGA_REG_DEPTH
));
1063 int vmw_kms_save_vga(struct vmw_private
*vmw_priv
)
1065 struct vmw_vga_topology_state
*save
;
1068 vmw_priv
->vga_width
= vmw_read(vmw_priv
, SVGA_REG_WIDTH
);
1069 vmw_priv
->vga_height
= vmw_read(vmw_priv
, SVGA_REG_HEIGHT
);
1070 vmw_priv
->vga_bpp
= vmw_read(vmw_priv
, SVGA_REG_BITS_PER_PIXEL
);
1071 if (vmw_priv
->capabilities
& SVGA_CAP_PITCHLOCK
)
1072 vmw_priv
->vga_pitchlock
=
1073 vmw_read(vmw_priv
, SVGA_REG_PITCHLOCK
);
1074 else if (vmw_fifo_have_pitchlock(vmw_priv
))
1075 vmw_priv
->vga_pitchlock
= ioread32(vmw_priv
->mmio_virt
+
1076 SVGA_FIFO_PITCHLOCK
);
1078 if (!(vmw_priv
->capabilities
& SVGA_CAP_DISPLAY_TOPOLOGY
))
1081 vmw_priv
->num_displays
= vmw_read(vmw_priv
,
1082 SVGA_REG_NUM_GUEST_DISPLAYS
);
1084 if (vmw_priv
->num_displays
== 0)
1085 vmw_priv
->num_displays
= 1;
1087 for (i
= 0; i
< vmw_priv
->num_displays
; ++i
) {
1088 save
= &vmw_priv
->vga_save
[i
];
1089 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, i
);
1090 save
->primary
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_IS_PRIMARY
);
1091 save
->pos_x
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_POSITION_X
);
1092 save
->pos_y
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_POSITION_Y
);
1093 save
->width
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_WIDTH
);
1094 save
->height
= vmw_read(vmw_priv
, SVGA_REG_DISPLAY_HEIGHT
);
1095 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, SVGA_ID_INVALID
);
1096 if (i
== 0 && vmw_priv
->num_displays
== 1 &&
1097 save
->width
== 0 && save
->height
== 0) {
1100 * It should be fairly safe to assume that these
1101 * values are uninitialized.
1104 save
->width
= vmw_priv
->vga_width
- save
->pos_x
;
1105 save
->height
= vmw_priv
->vga_height
- save
->pos_y
;
1112 int vmw_kms_restore_vga(struct vmw_private
*vmw_priv
)
1114 struct vmw_vga_topology_state
*save
;
1117 vmw_write(vmw_priv
, SVGA_REG_WIDTH
, vmw_priv
->vga_width
);
1118 vmw_write(vmw_priv
, SVGA_REG_HEIGHT
, vmw_priv
->vga_height
);
1119 vmw_write(vmw_priv
, SVGA_REG_BITS_PER_PIXEL
, vmw_priv
->vga_bpp
);
1120 if (vmw_priv
->capabilities
& SVGA_CAP_PITCHLOCK
)
1121 vmw_write(vmw_priv
, SVGA_REG_PITCHLOCK
,
1122 vmw_priv
->vga_pitchlock
);
1123 else if (vmw_fifo_have_pitchlock(vmw_priv
))
1124 iowrite32(vmw_priv
->vga_pitchlock
,
1125 vmw_priv
->mmio_virt
+ SVGA_FIFO_PITCHLOCK
);
1127 if (!(vmw_priv
->capabilities
& SVGA_CAP_DISPLAY_TOPOLOGY
))
1130 for (i
= 0; i
< vmw_priv
->num_displays
; ++i
) {
1131 save
= &vmw_priv
->vga_save
[i
];
1132 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, i
);
1133 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_IS_PRIMARY
, save
->primary
);
1134 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_POSITION_X
, save
->pos_x
);
1135 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_POSITION_Y
, save
->pos_y
);
1136 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_WIDTH
, save
->width
);
1137 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_HEIGHT
, save
->height
);
1138 vmw_write(vmw_priv
, SVGA_REG_DISPLAY_ID
, SVGA_ID_INVALID
);
1144 bool vmw_kms_validate_mode_vram(struct vmw_private
*dev_priv
,
1148 return ((u64
) pitch
* (u64
) height
) < (u64
) dev_priv
->vram_size
;
1151 u32
vmw_get_vblank_counter(struct drm_device
*dev
, int crtc
)
1158 * Small shared kms functions.
1161 int vmw_du_update_layout(struct vmw_private
*dev_priv
, unsigned num
,
1162 struct drm_vmw_rect
*rects
)
1164 struct drm_device
*dev
= dev_priv
->dev
;
1165 struct vmw_display_unit
*du
;
1166 struct drm_connector
*con
;
1169 mutex_lock(&dev
->mode_config
.mutex
);
1172 DRM_INFO("%s: new layout ", __func__
);
1173 for (i
= 0; i
< (int)num
; i
++)
1174 DRM_INFO("(%i, %i %ux%u) ", rects
[i
].x
, rects
[i
].y
,
1175 rects
[i
].w
, rects
[i
].h
);
1181 list_for_each_entry(con
, &dev
->mode_config
.connector_list
, head
) {
1182 du
= vmw_connector_to_du(con
);
1183 if (num
> du
->unit
) {
1184 du
->pref_width
= rects
[du
->unit
].w
;
1185 du
->pref_height
= rects
[du
->unit
].h
;
1186 du
->pref_active
= true;
1188 du
->pref_width
= 800;
1189 du
->pref_height
= 600;
1190 du
->pref_active
= false;
1192 con
->status
= vmw_du_connector_detect(con
, true);
1195 mutex_unlock(&dev
->mode_config
.mutex
);
1200 void vmw_du_crtc_save(struct drm_crtc
*crtc
)
1204 void vmw_du_crtc_restore(struct drm_crtc
*crtc
)
1208 void vmw_du_crtc_gamma_set(struct drm_crtc
*crtc
,
1209 u16
*r
, u16
*g
, u16
*b
,
1210 uint32_t start
, uint32_t size
)
1212 struct vmw_private
*dev_priv
= vmw_priv(crtc
->dev
);
1215 for (i
= 0; i
< size
; i
++) {
1216 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i
,
1218 vmw_write(dev_priv
, SVGA_PALETTE_BASE
+ i
* 3 + 0, r
[i
] >> 8);
1219 vmw_write(dev_priv
, SVGA_PALETTE_BASE
+ i
* 3 + 1, g
[i
] >> 8);
1220 vmw_write(dev_priv
, SVGA_PALETTE_BASE
+ i
* 3 + 2, b
[i
] >> 8);
1224 void vmw_du_connector_dpms(struct drm_connector
*connector
, int mode
)
1228 void vmw_du_connector_save(struct drm_connector
*connector
)
1232 void vmw_du_connector_restore(struct drm_connector
*connector
)
1236 enum drm_connector_status
1237 vmw_du_connector_detect(struct drm_connector
*connector
, bool force
)
1239 uint32_t num_displays
;
1240 struct drm_device
*dev
= connector
->dev
;
1241 struct vmw_private
*dev_priv
= vmw_priv(dev
);
1243 mutex_lock(&dev_priv
->hw_mutex
);
1244 num_displays
= vmw_read(dev_priv
, SVGA_REG_NUM_DISPLAYS
);
1245 mutex_unlock(&dev_priv
->hw_mutex
);
1247 return ((vmw_connector_to_du(connector
)->unit
< num_displays
) ?
1248 connector_status_connected
: connector_status_disconnected
);
1251 static struct drm_display_mode vmw_kms_connector_builtin
[] = {
1253 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
1254 752, 800, 0, 480, 489, 492, 525, 0,
1255 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
1257 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
1258 968, 1056, 0, 600, 601, 605, 628, 0,
1259 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1261 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
1262 1184, 1344, 0, 768, 771, 777, 806, 0,
1263 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
1265 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
1266 1344, 1600, 0, 864, 865, 868, 900, 0,
1267 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1269 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 79500, 1280, 1344,
1270 1472, 1664, 0, 768, 771, 778, 798, 0,
1271 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1273 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 83500, 1280, 1352,
1274 1480, 1680, 0, 800, 803, 809, 831, 0,
1275 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
1277 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1376,
1278 1488, 1800, 0, 960, 961, 964, 1000, 0,
1279 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1280 /* 1280x1024@60Hz */
1281 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1328,
1282 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1283 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1285 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 85500, 1360, 1424,
1286 1536, 1792, 0, 768, 771, 777, 795, 0,
1287 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1288 /* 1440x1050@60Hz */
1289 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 121750, 1400, 1488,
1290 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1291 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1293 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 106500, 1440, 1520,
1294 1672, 1904, 0, 900, 903, 909, 934, 0,
1295 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1296 /* 1600x1200@60Hz */
1297 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 162000, 1600, 1664,
1298 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1299 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1300 /* 1680x1050@60Hz */
1301 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 146250, 1680, 1784,
1302 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1303 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1304 /* 1792x1344@60Hz */
1305 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 204750, 1792, 1920,
1306 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1307 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1308 /* 1853x1392@60Hz */
1309 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 218250, 1856, 1952,
1310 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1311 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1312 /* 1920x1200@60Hz */
1313 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 193250, 1920, 2056,
1314 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1315 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1316 /* 1920x1440@60Hz */
1317 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 234000, 1920, 2048,
1318 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1319 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1320 /* 2560x1600@60Hz */
1321 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 348500, 2560, 2752,
1322 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1323 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1325 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1328 int vmw_du_connector_fill_modes(struct drm_connector
*connector
,
1329 uint32_t max_width
, uint32_t max_height
)
1331 struct vmw_display_unit
*du
= vmw_connector_to_du(connector
);
1332 struct drm_device
*dev
= connector
->dev
;
1333 struct vmw_private
*dev_priv
= vmw_priv(dev
);
1334 struct drm_display_mode
*mode
= NULL
;
1335 struct drm_display_mode
*bmode
;
1336 struct drm_display_mode prefmode
= { DRM_MODE("preferred",
1337 DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
,
1338 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1339 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
)
1343 /* Add preferred mode */
1345 mode
= drm_mode_duplicate(dev
, &prefmode
);
1348 mode
->hdisplay
= du
->pref_width
;
1349 mode
->vdisplay
= du
->pref_height
;
1350 mode
->vrefresh
= drm_mode_vrefresh(mode
);
1351 if (vmw_kms_validate_mode_vram(dev_priv
, mode
->hdisplay
* 2,
1353 drm_mode_probed_add(connector
, mode
);
1355 if (du
->pref_mode
) {
1356 list_del_init(&du
->pref_mode
->head
);
1357 drm_mode_destroy(dev
, du
->pref_mode
);
1360 du
->pref_mode
= mode
;
1364 for (i
= 0; vmw_kms_connector_builtin
[i
].type
!= 0; i
++) {
1365 bmode
= &vmw_kms_connector_builtin
[i
];
1366 if (bmode
->hdisplay
> max_width
||
1367 bmode
->vdisplay
> max_height
)
1370 if (!vmw_kms_validate_mode_vram(dev_priv
, bmode
->hdisplay
* 2,
1374 mode
= drm_mode_duplicate(dev
, bmode
);
1377 mode
->vrefresh
= drm_mode_vrefresh(mode
);
1379 drm_mode_probed_add(connector
, mode
);
1382 drm_mode_connector_list_update(connector
);
1387 int vmw_du_connector_set_property(struct drm_connector
*connector
,
1388 struct drm_property
*property
,