3 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
4 * Copyright (C) 2014 Sebastian Reichel <sre@kernel.org>
6 * Contact: Carlos Chinea <carlos.chinea@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 #include <linux/compiler.h>
24 #include <linux/err.h>
25 #include <linux/ioport.h>
27 #include <linux/clk.h>
28 #include <linux/device.h>
29 #include <linux/platform_device.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/dmaengine.h>
32 #include <linux/delay.h>
33 #include <linux/seq_file.h>
34 #include <linux/scatterlist.h>
35 #include <linux/interrupt.h>
36 #include <linux/spinlock.h>
37 #include <linux/debugfs.h>
38 #include <linux/pm_runtime.h>
39 #include <linux/of_platform.h>
40 #include <linux/hsi/hsi.h>
41 #include <linux/idr.h>
43 #include "omap_ssi_regs.h"
46 /* For automatically allocated device IDs */
47 static DEFINE_IDA(platform_omap_ssi_ida
);
49 #ifdef CONFIG_DEBUG_FS
50 static int ssi_debug_show(struct seq_file
*m
, void *p __maybe_unused
)
52 struct hsi_controller
*ssi
= m
->private;
53 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
54 void __iomem
*sys
= omap_ssi
->sys
;
56 pm_runtime_get_sync(ssi
->device
.parent
);
57 seq_printf(m
, "REVISION\t: 0x%08x\n", readl(sys
+ SSI_REVISION_REG
));
58 seq_printf(m
, "SYSCONFIG\t: 0x%08x\n", readl(sys
+ SSI_SYSCONFIG_REG
));
59 seq_printf(m
, "SYSSTATUS\t: 0x%08x\n", readl(sys
+ SSI_SYSSTATUS_REG
));
60 pm_runtime_put_sync(ssi
->device
.parent
);
65 static int ssi_debug_gdd_show(struct seq_file
*m
, void *p __maybe_unused
)
67 struct hsi_controller
*ssi
= m
->private;
68 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
69 void __iomem
*gdd
= omap_ssi
->gdd
;
70 void __iomem
*sys
= omap_ssi
->sys
;
73 pm_runtime_get_sync(ssi
->device
.parent
);
75 seq_printf(m
, "GDD_MPU_STATUS\t: 0x%08x\n",
76 readl(sys
+ SSI_GDD_MPU_IRQ_STATUS_REG
));
77 seq_printf(m
, "GDD_MPU_ENABLE\t: 0x%08x\n\n",
78 readl(sys
+ SSI_GDD_MPU_IRQ_ENABLE_REG
));
79 seq_printf(m
, "HW_ID\t\t: 0x%08x\n",
80 readl(gdd
+ SSI_GDD_HW_ID_REG
));
81 seq_printf(m
, "PPORT_ID\t: 0x%08x\n",
82 readl(gdd
+ SSI_GDD_PPORT_ID_REG
));
83 seq_printf(m
, "MPORT_ID\t: 0x%08x\n",
84 readl(gdd
+ SSI_GDD_MPORT_ID_REG
));
85 seq_printf(m
, "TEST\t\t: 0x%08x\n",
86 readl(gdd
+ SSI_GDD_TEST_REG
));
87 seq_printf(m
, "GCR\t\t: 0x%08x\n",
88 readl(gdd
+ SSI_GDD_GCR_REG
));
90 for (lch
= 0; lch
< SSI_MAX_GDD_LCH
; lch
++) {
91 seq_printf(m
, "\nGDD LCH %d\n=========\n", lch
);
92 seq_printf(m
, "CSDP\t\t: 0x%04x\n",
93 readw(gdd
+ SSI_GDD_CSDP_REG(lch
)));
94 seq_printf(m
, "CCR\t\t: 0x%04x\n",
95 readw(gdd
+ SSI_GDD_CCR_REG(lch
)));
96 seq_printf(m
, "CICR\t\t: 0x%04x\n",
97 readw(gdd
+ SSI_GDD_CICR_REG(lch
)));
98 seq_printf(m
, "CSR\t\t: 0x%04x\n",
99 readw(gdd
+ SSI_GDD_CSR_REG(lch
)));
100 seq_printf(m
, "CSSA\t\t: 0x%08x\n",
101 readl(gdd
+ SSI_GDD_CSSA_REG(lch
)));
102 seq_printf(m
, "CDSA\t\t: 0x%08x\n",
103 readl(gdd
+ SSI_GDD_CDSA_REG(lch
)));
104 seq_printf(m
, "CEN\t\t: 0x%04x\n",
105 readw(gdd
+ SSI_GDD_CEN_REG(lch
)));
106 seq_printf(m
, "CSAC\t\t: 0x%04x\n",
107 readw(gdd
+ SSI_GDD_CSAC_REG(lch
)));
108 seq_printf(m
, "CDAC\t\t: 0x%04x\n",
109 readw(gdd
+ SSI_GDD_CDAC_REG(lch
)));
110 seq_printf(m
, "CLNK_CTRL\t: 0x%04x\n",
111 readw(gdd
+ SSI_GDD_CLNK_CTRL_REG(lch
)));
114 pm_runtime_put_sync(ssi
->device
.parent
);
119 static int ssi_regs_open(struct inode
*inode
, struct file
*file
)
121 return single_open(file
, ssi_debug_show
, inode
->i_private
);
124 static int ssi_gdd_regs_open(struct inode
*inode
, struct file
*file
)
126 return single_open(file
, ssi_debug_gdd_show
, inode
->i_private
);
129 static const struct file_operations ssi_regs_fops
= {
130 .open
= ssi_regs_open
,
133 .release
= single_release
,
136 static const struct file_operations ssi_gdd_regs_fops
= {
137 .open
= ssi_gdd_regs_open
,
140 .release
= single_release
,
143 static int ssi_debug_add_ctrl(struct hsi_controller
*ssi
)
145 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
149 omap_ssi
->dir
= debugfs_create_dir(dev_name(&ssi
->device
), NULL
);
153 debugfs_create_file("regs", S_IRUGO
, omap_ssi
->dir
, ssi
,
156 dir
= debugfs_create_dir("gdd", omap_ssi
->dir
);
159 debugfs_create_file("regs", S_IRUGO
, dir
, ssi
, &ssi_gdd_regs_fops
);
163 debugfs_remove_recursive(omap_ssi
->dir
);
168 static void ssi_debug_remove_ctrl(struct hsi_controller
*ssi
)
170 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
172 debugfs_remove_recursive(omap_ssi
->dir
);
174 #endif /* CONFIG_DEBUG_FS */
177 * FIXME: Horrible HACK needed until we remove the useless wakeline test
178 * in the CMT. To be removed !!!!
180 void ssi_waketest(struct hsi_client
*cl
, unsigned int enable
)
182 struct hsi_port
*port
= hsi_get_port(cl
);
183 struct omap_ssi_port
*omap_port
= hsi_port_drvdata(port
);
184 struct hsi_controller
*ssi
= to_hsi_controller(port
->device
.parent
);
185 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
187 omap_port
->wktest
= !!enable
;
188 if (omap_port
->wktest
) {
189 pm_runtime_get_sync(ssi
->device
.parent
);
190 writel_relaxed(SSI_WAKE(0),
191 omap_ssi
->sys
+ SSI_SET_WAKE_REG(port
->num
));
193 writel_relaxed(SSI_WAKE(0),
194 omap_ssi
->sys
+ SSI_CLEAR_WAKE_REG(port
->num
));
195 pm_runtime_put_sync(ssi
->device
.parent
);
198 EXPORT_SYMBOL_GPL(ssi_waketest
);
200 static void ssi_gdd_complete(struct hsi_controller
*ssi
, unsigned int lch
)
202 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
203 struct hsi_msg
*msg
= omap_ssi
->gdd_trn
[lch
].msg
;
204 struct hsi_port
*port
= to_hsi_port(msg
->cl
->device
.parent
);
205 struct omap_ssi_port
*omap_port
= hsi_port_drvdata(port
);
210 spin_lock(&omap_ssi
->lock
);
212 val
= readl(omap_ssi
->sys
+ SSI_GDD_MPU_IRQ_ENABLE_REG
);
213 val
&= ~SSI_GDD_LCH(lch
);
214 writel_relaxed(val
, omap_ssi
->sys
+ SSI_GDD_MPU_IRQ_ENABLE_REG
);
216 if (msg
->ttype
== HSI_MSG_READ
) {
217 dir
= DMA_FROM_DEVICE
;
218 val
= SSI_DATAAVAILABLE(msg
->channel
);
219 pm_runtime_put_sync(ssi
->device
.parent
);
222 val
= SSI_DATAACCEPT(msg
->channel
);
223 /* Keep clocks reference for write pio event */
225 dma_unmap_sg(&ssi
->device
, msg
->sgt
.sgl
, msg
->sgt
.nents
, dir
);
226 csr
= readw(omap_ssi
->gdd
+ SSI_GDD_CSR_REG(lch
));
227 omap_ssi
->gdd_trn
[lch
].msg
= NULL
; /* release GDD lch */
228 dev_dbg(&port
->device
, "DMA completed ch %d ttype %d\n",
229 msg
->channel
, msg
->ttype
);
230 spin_unlock(&omap_ssi
->lock
);
231 if (csr
& SSI_CSR_TOUR
) { /* Timeout error */
232 msg
->status
= HSI_STATUS_ERROR
;
234 spin_lock(&omap_port
->lock
);
235 list_del(&msg
->link
); /* Dequeue msg */
236 spin_unlock(&omap_port
->lock
);
240 spin_lock(&omap_port
->lock
);
241 val
|= readl(omap_ssi
->sys
+ SSI_MPU_ENABLE_REG(port
->num
, 0));
242 writel_relaxed(val
, omap_ssi
->sys
+ SSI_MPU_ENABLE_REG(port
->num
, 0));
243 spin_unlock(&omap_port
->lock
);
245 msg
->status
= HSI_STATUS_COMPLETED
;
246 msg
->actual_len
= sg_dma_len(msg
->sgt
.sgl
);
249 static void ssi_gdd_tasklet(unsigned long dev
)
251 struct hsi_controller
*ssi
= (struct hsi_controller
*)dev
;
252 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
253 void __iomem
*sys
= omap_ssi
->sys
;
257 pm_runtime_get_sync(ssi
->device
.parent
);
259 status_reg
= readl(sys
+ SSI_GDD_MPU_IRQ_STATUS_REG
);
260 for (lch
= 0; lch
< SSI_MAX_GDD_LCH
; lch
++) {
261 if (status_reg
& SSI_GDD_LCH(lch
))
262 ssi_gdd_complete(ssi
, lch
);
264 writel_relaxed(status_reg
, sys
+ SSI_GDD_MPU_IRQ_STATUS_REG
);
265 status_reg
= readl(sys
+ SSI_GDD_MPU_IRQ_STATUS_REG
);
267 pm_runtime_put_sync(ssi
->device
.parent
);
270 tasklet_hi_schedule(&omap_ssi
->gdd_tasklet
);
272 enable_irq(omap_ssi
->gdd_irq
);
276 static irqreturn_t
ssi_gdd_isr(int irq
, void *ssi
)
278 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
280 tasklet_hi_schedule(&omap_ssi
->gdd_tasklet
);
281 disable_irq_nosync(irq
);
286 static unsigned long ssi_get_clk_rate(struct hsi_controller
*ssi
)
288 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
289 unsigned long rate
= clk_get_rate(omap_ssi
->fck
);
293 static int ssi_get_iomem(struct platform_device
*pd
,
294 const char *name
, void __iomem
**pbase
, dma_addr_t
*phy
)
296 struct resource
*mem
;
298 struct hsi_controller
*ssi
= platform_get_drvdata(pd
);
300 mem
= platform_get_resource_byname(pd
, IORESOURCE_MEM
, name
);
301 base
= devm_ioremap_resource(&ssi
->device
, mem
);
303 return PTR_ERR(base
);
313 static int ssi_add_controller(struct hsi_controller
*ssi
,
314 struct platform_device
*pd
)
316 struct omap_ssi_controller
*omap_ssi
;
319 omap_ssi
= devm_kzalloc(&ssi
->device
, sizeof(*omap_ssi
), GFP_KERNEL
);
321 dev_err(&pd
->dev
, "not enough memory for omap ssi\n");
325 err
= ida_simple_get(&platform_omap_ssi_ida
, 0, 0, GFP_KERNEL
);
330 ssi
->owner
= THIS_MODULE
;
331 ssi
->device
.parent
= &pd
->dev
;
332 dev_set_name(&ssi
->device
, "ssi%d", ssi
->id
);
333 hsi_controller_set_drvdata(ssi
, omap_ssi
);
334 omap_ssi
->dev
= &ssi
->device
;
335 err
= ssi_get_iomem(pd
, "sys", &omap_ssi
->sys
, NULL
);
338 err
= ssi_get_iomem(pd
, "gdd", &omap_ssi
->gdd
, NULL
);
341 err
= platform_get_irq_byname(pd
, "gdd_mpu");
343 dev_err(&pd
->dev
, "GDD IRQ resource missing\n");
346 omap_ssi
->gdd_irq
= err
;
347 tasklet_init(&omap_ssi
->gdd_tasklet
, ssi_gdd_tasklet
,
349 err
= devm_request_irq(&ssi
->device
, omap_ssi
->gdd_irq
, ssi_gdd_isr
,
352 dev_err(&ssi
->device
, "Request GDD IRQ %d failed (%d)",
353 omap_ssi
->gdd_irq
, err
);
357 omap_ssi
->port
= devm_kzalloc(&ssi
->device
,
358 sizeof(struct omap_ssi_port
*) * ssi
->num_ports
, GFP_KERNEL
);
359 if (!omap_ssi
->port
) {
364 omap_ssi
->fck
= devm_clk_get(&ssi
->device
, "ssi_ssr_fck");
365 if (IS_ERR(omap_ssi
->fck
)) {
366 dev_err(&pd
->dev
, "Could not acquire clock \"ssi_ssr_fck\": %li\n",
367 PTR_ERR(omap_ssi
->fck
));
372 /* TODO: find register, which can be used to detect context loss */
373 omap_ssi
->get_loss
= NULL
;
375 omap_ssi
->max_speed
= UINT_MAX
;
376 spin_lock_init(&omap_ssi
->lock
);
377 err
= hsi_register_controller(ssi
);
385 ida_simple_remove(&platform_omap_ssi_ida
, ssi
->id
);
389 static int ssi_hw_init(struct hsi_controller
*ssi
)
391 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
396 err
= pm_runtime_get_sync(ssi
->device
.parent
);
398 dev_err(&ssi
->device
, "runtime PM failed %d\n", err
);
401 /* Reseting SSI controller */
402 writel_relaxed(SSI_SOFTRESET
, omap_ssi
->sys
+ SSI_SYSCONFIG_REG
);
403 val
= readl(omap_ssi
->sys
+ SSI_SYSSTATUS_REG
);
404 for (i
= 0; ((i
< 20) && !(val
& SSI_RESETDONE
)); i
++) {
406 val
= readl(omap_ssi
->sys
+ SSI_SYSSTATUS_REG
);
408 if (!(val
& SSI_RESETDONE
)) {
409 dev_err(&ssi
->device
, "SSI HW reset failed\n");
410 pm_runtime_put_sync(ssi
->device
.parent
);
414 writel_relaxed(SSI_SWRESET
, omap_ssi
->gdd
+ SSI_GDD_GRST_REG
);
415 /* Get FCK rate in KHz */
416 omap_ssi
->fck_rate
= DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi
), 1000);
417 dev_dbg(&ssi
->device
, "SSI fck rate %lu KHz\n", omap_ssi
->fck_rate
);
418 /* Set default PM settings */
419 val
= SSI_AUTOIDLE
| SSI_SIDLEMODE_SMART
| SSI_MIDLEMODE_SMART
;
420 writel_relaxed(val
, omap_ssi
->sys
+ SSI_SYSCONFIG_REG
);
421 omap_ssi
->sysconfig
= val
;
422 writel_relaxed(SSI_CLK_AUTOGATING_ON
, omap_ssi
->sys
+ SSI_GDD_GCR_REG
);
423 omap_ssi
->gdd_gcr
= SSI_CLK_AUTOGATING_ON
;
424 pm_runtime_put_sync(ssi
->device
.parent
);
429 static void ssi_remove_controller(struct hsi_controller
*ssi
)
431 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
433 tasklet_kill(&omap_ssi
->gdd_tasklet
);
434 hsi_unregister_controller(ssi
);
435 ida_simple_remove(&platform_omap_ssi_ida
, id
);
438 static inline int ssi_of_get_available_ports_count(const struct device_node
*np
)
440 struct device_node
*child
;
443 for_each_available_child_of_node(np
, child
)
444 if (of_device_is_compatible(child
, "ti,omap3-ssi-port"))
450 static int ssi_remove_ports(struct device
*dev
, void *c
)
452 struct platform_device
*pdev
= to_platform_device(dev
);
457 of_node_clear_flag(dev
->of_node
, OF_POPULATED
);
458 of_device_unregister(pdev
);
463 static int ssi_probe(struct platform_device
*pd
)
465 struct platform_device
*childpdev
;
466 struct device_node
*np
= pd
->dev
.of_node
;
467 struct device_node
*child
;
468 struct hsi_controller
*ssi
;
473 dev_err(&pd
->dev
, "missing device tree data\n");
477 num_ports
= ssi_of_get_available_ports_count(np
);
479 ssi
= hsi_alloc_controller(num_ports
, GFP_KERNEL
);
481 dev_err(&pd
->dev
, "No memory for controller\n");
485 platform_set_drvdata(pd
, ssi
);
487 err
= ssi_add_controller(ssi
, pd
);
491 pm_runtime_irq_safe(&pd
->dev
);
492 pm_runtime_enable(&pd
->dev
);
494 err
= ssi_hw_init(ssi
);
497 #ifdef CONFIG_DEBUG_FS
498 err
= ssi_debug_add_ctrl(ssi
);
503 for_each_available_child_of_node(np
, child
) {
504 if (!of_device_is_compatible(child
, "ti,omap3-ssi-port"))
507 childpdev
= of_platform_device_create(child
, NULL
, &pd
->dev
);
510 dev_err(&pd
->dev
, "failed to create ssi controller port\n");
515 dev_info(&pd
->dev
, "ssi controller %d initialized (%d ports)!\n",
519 device_for_each_child(&pd
->dev
, NULL
, ssi_remove_ports
);
521 ssi_remove_controller(ssi
);
523 platform_set_drvdata(pd
, NULL
);
524 pm_runtime_disable(&pd
->dev
);
529 static int ssi_remove(struct platform_device
*pd
)
531 struct hsi_controller
*ssi
= platform_get_drvdata(pd
);
533 /* cleanup of of_platform_populate() call */
534 device_for_each_child(&pd
->dev
, NULL
, ssi_remove_ports
);
536 #ifdef CONFIG_DEBUG_FS
537 ssi_debug_remove_ctrl(ssi
);
539 ssi_remove_controller(ssi
);
540 platform_set_drvdata(pd
, NULL
);
542 pm_runtime_disable(&pd
->dev
);
548 static int omap_ssi_runtime_suspend(struct device
*dev
)
550 struct hsi_controller
*ssi
= dev_get_drvdata(dev
);
551 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
553 dev_dbg(dev
, "runtime suspend!\n");
555 if (omap_ssi
->get_loss
)
556 omap_ssi
->loss_count
=
557 omap_ssi
->get_loss(ssi
->device
.parent
);
562 static int omap_ssi_runtime_resume(struct device
*dev
)
564 struct hsi_controller
*ssi
= dev_get_drvdata(dev
);
565 struct omap_ssi_controller
*omap_ssi
= hsi_controller_drvdata(ssi
);
567 dev_dbg(dev
, "runtime resume!\n");
569 if ((omap_ssi
->get_loss
) && (omap_ssi
->loss_count
==
570 omap_ssi
->get_loss(ssi
->device
.parent
)))
573 writel_relaxed(omap_ssi
->gdd_gcr
, omap_ssi
->gdd
+ SSI_GDD_GCR_REG
);
578 static const struct dev_pm_ops omap_ssi_pm_ops
= {
579 SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend
, omap_ssi_runtime_resume
,
583 #define DEV_PM_OPS (&omap_ssi_pm_ops)
585 #define DEV_PM_OPS NULL
589 static const struct of_device_id omap_ssi_of_match
[] = {
590 { .compatible
= "ti,omap3-ssi", },
593 MODULE_DEVICE_TABLE(of
, omap_ssi_of_match
);
595 #define omap_ssi_of_match NULL
598 static struct platform_driver ssi_pdriver
= {
600 .remove
= ssi_remove
,
604 .of_match_table
= omap_ssi_of_match
,
608 module_platform_driver(ssi_pdriver
);
610 MODULE_ALIAS("platform:omap_ssi");
611 MODULE_AUTHOR("Carlos Chinea <carlos.chinea@nokia.com>");
612 MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
613 MODULE_DESCRIPTION("Synchronous Serial Interface Driver");
614 MODULE_LICENSE("GPL v2");