IB/mlx4: Fix EQ deallocation in legacy mode
[deliverable/linux.git] / drivers / hwmon / coretemp.c
1 /*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
39 #include <linux/moduleparam.h>
40 #include <asm/msr.h>
41 #include <asm/processor.h>
42 #include <asm/cpu_device_id.h>
43
44 #define DRVNAME "coretemp"
45
46 /*
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
49 */
50 static int force_tjmax;
51 module_param_named(tjmax, force_tjmax, int, 0444);
52 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53
54 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
55 #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
56 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
57 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
58 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
59 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
60
61 #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
62 #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
63 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64
65 #ifdef CONFIG_SMP
66 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
67 #else
68 #define for_each_sibling(i, cpu) for (i = 0; false; )
69 #endif
70
71 /*
72 * Per-Core Temperature Data
73 * @last_updated: The time when the current temperature value was updated
74 * earlier (in jiffies).
75 * @cpu_core_id: The CPU Core from which temperature values should be read
76 * This value is passed as "id" field to rdmsr/wrmsr functions.
77 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
78 * from where the temperature values should be read.
79 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
80 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
81 * Otherwise, temp_data holds coretemp data.
82 * @valid: If this is 1, the current temperature is valid.
83 */
84 struct temp_data {
85 int temp;
86 int ttarget;
87 int tjmax;
88 unsigned long last_updated;
89 unsigned int cpu;
90 u32 cpu_core_id;
91 u32 status_reg;
92 int attr_size;
93 bool is_pkg_data;
94 bool valid;
95 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
96 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
97 struct mutex update_lock;
98 };
99
100 /* Platform Data per Physical CPU */
101 struct platform_data {
102 struct device *hwmon_dev;
103 u16 phys_proc_id;
104 struct temp_data *core_data[MAX_CORE_DATA];
105 struct device_attribute name_attr;
106 };
107
108 struct pdev_entry {
109 struct list_head list;
110 struct platform_device *pdev;
111 u16 phys_proc_id;
112 };
113
114 static LIST_HEAD(pdev_list);
115 static DEFINE_MUTEX(pdev_list_mutex);
116
117 static ssize_t show_name(struct device *dev,
118 struct device_attribute *devattr, char *buf)
119 {
120 return sprintf(buf, "%s\n", DRVNAME);
121 }
122
123 static ssize_t show_label(struct device *dev,
124 struct device_attribute *devattr, char *buf)
125 {
126 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
127 struct platform_data *pdata = dev_get_drvdata(dev);
128 struct temp_data *tdata = pdata->core_data[attr->index];
129
130 if (tdata->is_pkg_data)
131 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
132
133 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
134 }
135
136 static ssize_t show_crit_alarm(struct device *dev,
137 struct device_attribute *devattr, char *buf)
138 {
139 u32 eax, edx;
140 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
141 struct platform_data *pdata = dev_get_drvdata(dev);
142 struct temp_data *tdata = pdata->core_data[attr->index];
143
144 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
145
146 return sprintf(buf, "%d\n", (eax >> 5) & 1);
147 }
148
149 static ssize_t show_tjmax(struct device *dev,
150 struct device_attribute *devattr, char *buf)
151 {
152 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
153 struct platform_data *pdata = dev_get_drvdata(dev);
154
155 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
156 }
157
158 static ssize_t show_ttarget(struct device *dev,
159 struct device_attribute *devattr, char *buf)
160 {
161 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
162 struct platform_data *pdata = dev_get_drvdata(dev);
163
164 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
165 }
166
167 static ssize_t show_temp(struct device *dev,
168 struct device_attribute *devattr, char *buf)
169 {
170 u32 eax, edx;
171 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 struct platform_data *pdata = dev_get_drvdata(dev);
173 struct temp_data *tdata = pdata->core_data[attr->index];
174
175 mutex_lock(&tdata->update_lock);
176
177 /* Check whether the time interval has elapsed */
178 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
179 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
180 tdata->valid = 0;
181 /* Check whether the data is valid */
182 if (eax & 0x80000000) {
183 tdata->temp = tdata->tjmax -
184 ((eax >> 16) & 0x7f) * 1000;
185 tdata->valid = 1;
186 }
187 tdata->last_updated = jiffies;
188 }
189
190 mutex_unlock(&tdata->update_lock);
191 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
192 }
193
194 static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
195 struct device *dev)
196 {
197 /* The 100C is default for both mobile and non mobile CPUs */
198
199 int tjmax = 100000;
200 int tjmax_ee = 85000;
201 int usemsr_ee = 1;
202 int err;
203 u32 eax, edx;
204 struct pci_dev *host_bridge;
205
206 /* Early chips have no MSR for TjMax */
207
208 if (c->x86_model == 0xf && c->x86_mask < 4)
209 usemsr_ee = 0;
210
211 /* Atom CPUs */
212
213 if (c->x86_model == 0x1c) {
214 usemsr_ee = 0;
215
216 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
217
218 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
219 && (host_bridge->device == 0xa000 /* NM10 based nettop */
220 || host_bridge->device == 0xa010)) /* NM10 based netbook */
221 tjmax = 100000;
222 else
223 tjmax = 90000;
224
225 pci_dev_put(host_bridge);
226 }
227
228 if (c->x86_model > 0xe && usemsr_ee) {
229 u8 platform_id;
230
231 /*
232 * Now we can detect the mobile CPU using Intel provided table
233 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
234 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
235 */
236 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
237 if (err) {
238 dev_warn(dev,
239 "Unable to access MSR 0x17, assuming desktop"
240 " CPU\n");
241 usemsr_ee = 0;
242 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
243 /*
244 * Trust bit 28 up to Penryn, I could not find any
245 * documentation on that; if you happen to know
246 * someone at Intel please ask
247 */
248 usemsr_ee = 0;
249 } else {
250 /* Platform ID bits 52:50 (EDX starts at bit 32) */
251 platform_id = (edx >> 18) & 0x7;
252
253 /*
254 * Mobile Penryn CPU seems to be platform ID 7 or 5
255 * (guesswork)
256 */
257 if (c->x86_model == 0x17 &&
258 (platform_id == 5 || platform_id == 7)) {
259 /*
260 * If MSR EE bit is set, set it to 90 degrees C,
261 * otherwise 105 degrees C
262 */
263 tjmax_ee = 90000;
264 tjmax = 105000;
265 }
266 }
267 }
268
269 if (usemsr_ee) {
270 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
271 if (err) {
272 dev_warn(dev,
273 "Unable to access MSR 0xEE, for Tjmax, left"
274 " at default\n");
275 } else if (eax & 0x40000000) {
276 tjmax = tjmax_ee;
277 }
278 } else if (tjmax == 100000) {
279 /*
280 * If we don't use msr EE it means we are desktop CPU
281 * (with exeception of Atom)
282 */
283 dev_warn(dev, "Using relative temperature scale!\n");
284 }
285
286 return tjmax;
287 }
288
289 static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
290 struct device *dev)
291 {
292 int err;
293 u32 eax, edx;
294 u32 val;
295
296 /*
297 * A new feature of current Intel(R) processors, the
298 * IA32_TEMPERATURE_TARGET contains the TjMax value
299 */
300 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
301 if (err) {
302 if (c->x86_model > 0xe && c->x86_model != 0x1c)
303 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
304 } else {
305 val = (eax >> 16) & 0xff;
306 /*
307 * If the TjMax is not plausible, an assumption
308 * will be used
309 */
310 if (val) {
311 dev_dbg(dev, "TjMax is %d degrees C\n", val);
312 return val * 1000;
313 }
314 }
315
316 if (force_tjmax) {
317 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
318 force_tjmax);
319 return force_tjmax * 1000;
320 }
321
322 /*
323 * An assumption is made for early CPUs and unreadable MSR.
324 * NOTE: the calculated value may not be correct.
325 */
326 return adjust_tjmax(c, id, dev);
327 }
328
329 static int __devinit create_name_attr(struct platform_data *pdata,
330 struct device *dev)
331 {
332 sysfs_attr_init(&pdata->name_attr.attr);
333 pdata->name_attr.attr.name = "name";
334 pdata->name_attr.attr.mode = S_IRUGO;
335 pdata->name_attr.show = show_name;
336 return device_create_file(dev, &pdata->name_attr);
337 }
338
339 static int __cpuinit create_core_attrs(struct temp_data *tdata,
340 struct device *dev, int attr_no)
341 {
342 int err, i;
343 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
344 struct device_attribute *devattr, char *buf) = {
345 show_label, show_crit_alarm, show_temp, show_tjmax,
346 show_ttarget };
347 static const char *const names[TOTAL_ATTRS] = {
348 "temp%d_label", "temp%d_crit_alarm",
349 "temp%d_input", "temp%d_crit",
350 "temp%d_max" };
351
352 for (i = 0; i < tdata->attr_size; i++) {
353 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
354 attr_no);
355 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
356 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
357 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
358 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
359 tdata->sd_attrs[i].index = attr_no;
360 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
361 if (err)
362 goto exit_free;
363 }
364 return 0;
365
366 exit_free:
367 while (--i >= 0)
368 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
369 return err;
370 }
371
372
373 static int __cpuinit chk_ucode_version(unsigned int cpu)
374 {
375 struct cpuinfo_x86 *c = &cpu_data(cpu);
376
377 /*
378 * Check if we have problem with errata AE18 of Core processors:
379 * Readings might stop update when processor visited too deep sleep,
380 * fixed for stepping D0 (6EC).
381 */
382 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
383 pr_err("Errata AE18 not fixed, update BIOS or "
384 "microcode of the CPU!\n");
385 return -ENODEV;
386 }
387 return 0;
388 }
389
390 static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
391 {
392 u16 phys_proc_id = TO_PHYS_ID(cpu);
393 struct pdev_entry *p;
394
395 mutex_lock(&pdev_list_mutex);
396
397 list_for_each_entry(p, &pdev_list, list)
398 if (p->phys_proc_id == phys_proc_id) {
399 mutex_unlock(&pdev_list_mutex);
400 return p->pdev;
401 }
402
403 mutex_unlock(&pdev_list_mutex);
404 return NULL;
405 }
406
407 static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
408 int pkg_flag)
409 {
410 struct temp_data *tdata;
411
412 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
413 if (!tdata)
414 return NULL;
415
416 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
417 MSR_IA32_THERM_STATUS;
418 tdata->is_pkg_data = pkg_flag;
419 tdata->cpu = cpu;
420 tdata->cpu_core_id = TO_CORE_ID(cpu);
421 tdata->attr_size = MAX_CORE_ATTRS;
422 mutex_init(&tdata->update_lock);
423 return tdata;
424 }
425
426 static int __cpuinit create_core_data(struct platform_device *pdev,
427 unsigned int cpu, int pkg_flag)
428 {
429 struct temp_data *tdata;
430 struct platform_data *pdata = platform_get_drvdata(pdev);
431 struct cpuinfo_x86 *c = &cpu_data(cpu);
432 u32 eax, edx;
433 int err, attr_no;
434
435 /*
436 * Find attr number for sysfs:
437 * We map the attr number to core id of the CPU
438 * The attr number is always core id + 2
439 * The Pkgtemp will always show up as temp1_*, if available
440 */
441 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
442
443 if (attr_no > MAX_CORE_DATA - 1)
444 return -ERANGE;
445
446 /*
447 * Provide a single set of attributes for all HT siblings of a core
448 * to avoid duplicate sensors (the processor ID and core ID of all
449 * HT siblings of a core are the same).
450 * Skip if a HT sibling of this core is already registered.
451 * This is not an error.
452 */
453 if (pdata->core_data[attr_no] != NULL)
454 return 0;
455
456 tdata = init_temp_data(cpu, pkg_flag);
457 if (!tdata)
458 return -ENOMEM;
459
460 /* Test if we can access the status register */
461 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
462 if (err)
463 goto exit_free;
464
465 /* We can access status register. Get Critical Temperature */
466 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
467
468 /*
469 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
470 * The target temperature is available on older CPUs but not in this
471 * register. Atoms don't have the register at all.
472 */
473 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
474 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
475 &eax, &edx);
476 if (!err) {
477 tdata->ttarget
478 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
479 tdata->attr_size++;
480 }
481 }
482
483 pdata->core_data[attr_no] = tdata;
484
485 /* Create sysfs interfaces */
486 err = create_core_attrs(tdata, &pdev->dev, attr_no);
487 if (err)
488 goto exit_free;
489
490 return 0;
491 exit_free:
492 pdata->core_data[attr_no] = NULL;
493 kfree(tdata);
494 return err;
495 }
496
497 static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
498 {
499 struct platform_device *pdev = coretemp_get_pdev(cpu);
500 int err;
501
502 if (!pdev)
503 return;
504
505 err = create_core_data(pdev, cpu, pkg_flag);
506 if (err)
507 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
508 }
509
510 static void coretemp_remove_core(struct platform_data *pdata,
511 struct device *dev, int indx)
512 {
513 int i;
514 struct temp_data *tdata = pdata->core_data[indx];
515
516 /* Remove the sysfs attributes */
517 for (i = 0; i < tdata->attr_size; i++)
518 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
519
520 kfree(pdata->core_data[indx]);
521 pdata->core_data[indx] = NULL;
522 }
523
524 static int __devinit coretemp_probe(struct platform_device *pdev)
525 {
526 struct platform_data *pdata;
527 int err;
528
529 /* Initialize the per-package data structures */
530 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
531 if (!pdata)
532 return -ENOMEM;
533
534 err = create_name_attr(pdata, &pdev->dev);
535 if (err)
536 goto exit_free;
537
538 pdata->phys_proc_id = pdev->id;
539 platform_set_drvdata(pdev, pdata);
540
541 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
542 if (IS_ERR(pdata->hwmon_dev)) {
543 err = PTR_ERR(pdata->hwmon_dev);
544 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
545 goto exit_name;
546 }
547 return 0;
548
549 exit_name:
550 device_remove_file(&pdev->dev, &pdata->name_attr);
551 platform_set_drvdata(pdev, NULL);
552 exit_free:
553 kfree(pdata);
554 return err;
555 }
556
557 static int __devexit coretemp_remove(struct platform_device *pdev)
558 {
559 struct platform_data *pdata = platform_get_drvdata(pdev);
560 int i;
561
562 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
563 if (pdata->core_data[i])
564 coretemp_remove_core(pdata, &pdev->dev, i);
565
566 device_remove_file(&pdev->dev, &pdata->name_attr);
567 hwmon_device_unregister(pdata->hwmon_dev);
568 platform_set_drvdata(pdev, NULL);
569 kfree(pdata);
570 return 0;
571 }
572
573 static struct platform_driver coretemp_driver = {
574 .driver = {
575 .owner = THIS_MODULE,
576 .name = DRVNAME,
577 },
578 .probe = coretemp_probe,
579 .remove = __devexit_p(coretemp_remove),
580 };
581
582 static int __cpuinit coretemp_device_add(unsigned int cpu)
583 {
584 int err;
585 struct platform_device *pdev;
586 struct pdev_entry *pdev_entry;
587
588 mutex_lock(&pdev_list_mutex);
589
590 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
591 if (!pdev) {
592 err = -ENOMEM;
593 pr_err("Device allocation failed\n");
594 goto exit;
595 }
596
597 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
598 if (!pdev_entry) {
599 err = -ENOMEM;
600 goto exit_device_put;
601 }
602
603 err = platform_device_add(pdev);
604 if (err) {
605 pr_err("Device addition failed (%d)\n", err);
606 goto exit_device_free;
607 }
608
609 pdev_entry->pdev = pdev;
610 pdev_entry->phys_proc_id = pdev->id;
611
612 list_add_tail(&pdev_entry->list, &pdev_list);
613 mutex_unlock(&pdev_list_mutex);
614
615 return 0;
616
617 exit_device_free:
618 kfree(pdev_entry);
619 exit_device_put:
620 platform_device_put(pdev);
621 exit:
622 mutex_unlock(&pdev_list_mutex);
623 return err;
624 }
625
626 static void __cpuinit coretemp_device_remove(unsigned int cpu)
627 {
628 struct pdev_entry *p, *n;
629 u16 phys_proc_id = TO_PHYS_ID(cpu);
630
631 mutex_lock(&pdev_list_mutex);
632 list_for_each_entry_safe(p, n, &pdev_list, list) {
633 if (p->phys_proc_id != phys_proc_id)
634 continue;
635 platform_device_unregister(p->pdev);
636 list_del(&p->list);
637 kfree(p);
638 }
639 mutex_unlock(&pdev_list_mutex);
640 }
641
642 static bool __cpuinit is_any_core_online(struct platform_data *pdata)
643 {
644 int i;
645
646 /* Find online cores, except pkgtemp data */
647 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
648 if (pdata->core_data[i] &&
649 !pdata->core_data[i]->is_pkg_data) {
650 return true;
651 }
652 }
653 return false;
654 }
655
656 static void __cpuinit get_core_online(unsigned int cpu)
657 {
658 struct cpuinfo_x86 *c = &cpu_data(cpu);
659 struct platform_device *pdev = coretemp_get_pdev(cpu);
660 int err;
661
662 /*
663 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
664 * sensors. We check this bit only, all the early CPUs
665 * without thermal sensors will be filtered out.
666 */
667 if (!cpu_has(c, X86_FEATURE_DTS))
668 return;
669
670 if (!pdev) {
671 /* Check the microcode version of the CPU */
672 if (chk_ucode_version(cpu))
673 return;
674
675 /*
676 * Alright, we have DTS support.
677 * We are bringing the _first_ core in this pkg
678 * online. So, initialize per-pkg data structures and
679 * then bring this core online.
680 */
681 err = coretemp_device_add(cpu);
682 if (err)
683 return;
684 /*
685 * Check whether pkgtemp support is available.
686 * If so, add interfaces for pkgtemp.
687 */
688 if (cpu_has(c, X86_FEATURE_PTS))
689 coretemp_add_core(cpu, 1);
690 }
691 /*
692 * Physical CPU device already exists.
693 * So, just add interfaces for this core.
694 */
695 coretemp_add_core(cpu, 0);
696 }
697
698 static void __cpuinit put_core_offline(unsigned int cpu)
699 {
700 int i, indx;
701 struct platform_data *pdata;
702 struct platform_device *pdev = coretemp_get_pdev(cpu);
703
704 /* If the physical CPU device does not exist, just return */
705 if (!pdev)
706 return;
707
708 pdata = platform_get_drvdata(pdev);
709
710 indx = TO_ATTR_NO(cpu);
711
712 /* The core id is too big, just return */
713 if (indx > MAX_CORE_DATA - 1)
714 return;
715
716 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
717 coretemp_remove_core(pdata, &pdev->dev, indx);
718
719 /*
720 * If a HT sibling of a core is taken offline, but another HT sibling
721 * of the same core is still online, register the alternate sibling.
722 * This ensures that exactly one set of attributes is provided as long
723 * as at least one HT sibling of a core is online.
724 */
725 for_each_sibling(i, cpu) {
726 if (i != cpu) {
727 get_core_online(i);
728 /*
729 * Display temperature sensor data for one HT sibling
730 * per core only, so abort the loop after one such
731 * sibling has been found.
732 */
733 break;
734 }
735 }
736 /*
737 * If all cores in this pkg are offline, remove the device.
738 * coretemp_device_remove calls unregister_platform_device,
739 * which in turn calls coretemp_remove. This removes the
740 * pkgtemp entry and does other clean ups.
741 */
742 if (!is_any_core_online(pdata))
743 coretemp_device_remove(cpu);
744 }
745
746 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
747 unsigned long action, void *hcpu)
748 {
749 unsigned int cpu = (unsigned long) hcpu;
750
751 switch (action) {
752 case CPU_ONLINE:
753 case CPU_DOWN_FAILED:
754 get_core_online(cpu);
755 break;
756 case CPU_DOWN_PREPARE:
757 put_core_offline(cpu);
758 break;
759 }
760 return NOTIFY_OK;
761 }
762
763 static struct notifier_block coretemp_cpu_notifier __refdata = {
764 .notifier_call = coretemp_cpu_callback,
765 };
766
767 static const struct x86_cpu_id coretemp_ids[] = {
768 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTS },
769 {}
770 };
771 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
772
773 static int __init coretemp_init(void)
774 {
775 int i, err = -ENODEV;
776
777 /*
778 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
779 * sensors. We check this bit only, all the early CPUs
780 * without thermal sensors will be filtered out.
781 */
782 if (!x86_match_cpu(coretemp_ids))
783 return -ENODEV;
784
785 err = platform_driver_register(&coretemp_driver);
786 if (err)
787 goto exit;
788
789 for_each_online_cpu(i)
790 get_core_online(i);
791
792 #ifndef CONFIG_HOTPLUG_CPU
793 if (list_empty(&pdev_list)) {
794 err = -ENODEV;
795 goto exit_driver_unreg;
796 }
797 #endif
798
799 register_hotcpu_notifier(&coretemp_cpu_notifier);
800 return 0;
801
802 #ifndef CONFIG_HOTPLUG_CPU
803 exit_driver_unreg:
804 platform_driver_unregister(&coretemp_driver);
805 #endif
806 exit:
807 return err;
808 }
809
810 static void __exit coretemp_exit(void)
811 {
812 struct pdev_entry *p, *n;
813
814 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
815 mutex_lock(&pdev_list_mutex);
816 list_for_each_entry_safe(p, n, &pdev_list, list) {
817 platform_device_unregister(p->pdev);
818 list_del(&p->list);
819 kfree(p);
820 }
821 mutex_unlock(&pdev_list_mutex);
822 platform_driver_unregister(&coretemp_driver);
823 }
824
825 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
826 MODULE_DESCRIPTION("Intel Core temperature monitor");
827 MODULE_LICENSE("GPL");
828
829 module_init(coretemp_init)
830 module_exit(coretemp_exit)
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