drivers/hwmon/coretemp.c

   1 /*
   2  * coretemp.c - Linux kernel module for hardware monitoring
   3  *
   4  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
   5  *
   6  * Inspired from many hwmon drivers
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20  * 02110-1301 USA.
  21  */
  22
  23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <linux/slab.h>
  28 #include <linux/jiffies.h>
  29 #include <linux/hwmon.h>
  30 #include <linux/sysfs.h>
  31 #include <linux/hwmon-sysfs.h>
  32 #include <linux/err.h>
  33 #include <linux/mutex.h>
  34 #include <linux/list.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/cpu.h>
  37 #include <linux/smp.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/pci.h>
  40 #include <asm/msr.h>
  41 #include <asm/processor.h>
  42 #include <asm/cpu_device_id.h>
  43
  44 #define DRVNAME "coretemp"
  45
  46 /*
  47  * force_tjmax only matters when TjMax can't be read from the CPU itself.
  48  * When set, it replaces the driver's suboptimal heuristic.
  49  */
  50 static int force_tjmax;
  51 module_param_named(tjmax, force_tjmax, int, 0444);
  52 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
  53
  54 #define BASE_SYSFS_ATTR_NO      2       /* Sysfs Base attr no for coretemp */
  55 #define NUM_REAL_CORES          32      /* Number of Real cores per cpu */
  56 #define CORETEMP_NAME_LENGTH    19      /* String Length of attrs */
  57 #define MAX_CORE_ATTRS          4       /* Maximum no of basic attrs */
  58 #define TOTAL_ATTRS             (MAX_CORE_ATTRS + 1)
  59 #define MAX_CORE_DATA           (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
  60
  61 #define TO_PHYS_ID(cpu)         (cpu_data(cpu).phys_proc_id)
  62 #define TO_CORE_ID(cpu)         (cpu_data(cpu).cpu_core_id)
  63 #define TO_ATTR_NO(cpu)         (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
  64
  65 #ifdef CONFIG_SMP
  66 #define for_each_sibling(i, cpu)        for_each_cpu(i, cpu_sibling_mask(cpu))
  67 #else
  68 #define for_each_sibling(i, cpu)        for (i = 0; false; )
  69 #endif
  70
  71 /*
  72  * Per-Core Temperature Data
  73  * @last_updated: The time when the current temperature value was updated
  74  *              earlier (in jiffies).
  75  * @cpu_core_id: The CPU Core from which temperature values should be read
  76  *              This value is passed as "id" field to rdmsr/wrmsr functions.
  77  * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
  78  *              from where the temperature values should be read.
  79  * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
  80  * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
  81  *              Otherwise, temp_data holds coretemp data.
  82  * @valid: If this is 1, the current temperature is valid.
  83  */
  84 struct temp_data {
  85         int temp;
  86         int ttarget;
  87         int tjmax;
  88         unsigned long last_updated;
  89         unsigned int cpu;
  90         u32 cpu_core_id;
  91         u32 status_reg;
  92         int attr_size;
  93         bool is_pkg_data;
  94         bool valid;
  95         struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
  96         char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
  97         struct attribute *attrs[TOTAL_ATTRS + 1];
  98         struct attribute_group attr_group;
  99         struct mutex update_lock;
 100 };
 101
 102 /* Platform Data per Physical CPU */
 103 struct platform_data {
 104         struct device *hwmon_dev;
 105         u16 phys_proc_id;
 106         struct temp_data *core_data[MAX_CORE_DATA];
 107         struct device_attribute name_attr;
 108 };
 109
 110 struct pdev_entry {
 111         struct list_head list;
 112         struct platform_device *pdev;
 113         u16 phys_proc_id;
 114 };
 115
 116 static LIST_HEAD(pdev_list);
 117 static DEFINE_MUTEX(pdev_list_mutex);
 118
 119 static ssize_t show_label(struct device *dev,
 120                                 struct device_attribute *devattr, char *buf)
 121 {
 122         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 123         struct platform_data *pdata = dev_get_drvdata(dev);
 124         struct temp_data *tdata = pdata->core_data[attr->index];
 125
 126         if (tdata->is_pkg_data)
 127                 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
 128
 129         return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
 130 }
 131
 132 static ssize_t show_crit_alarm(struct device *dev,
 133                                 struct device_attribute *devattr, char *buf)
 134 {
 135         u32 eax, edx;
 136         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 137         struct platform_data *pdata = dev_get_drvdata(dev);
 138         struct temp_data *tdata = pdata->core_data[attr->index];
 139
 140         rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
 141
 142         return sprintf(buf, "%d\n", (eax >> 5) & 1);
 143 }
 144
 145 static ssize_t show_tjmax(struct device *dev,
 146                         struct device_attribute *devattr, char *buf)
 147 {
 148         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 149         struct platform_data *pdata = dev_get_drvdata(dev);
 150
 151         return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
 152 }
 153
 154 static ssize_t show_ttarget(struct device *dev,
 155                                 struct device_attribute *devattr, char *buf)
 156 {
 157         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 158         struct platform_data *pdata = dev_get_drvdata(dev);
 159
 160         return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
 161 }
 162
 163 static ssize_t show_temp(struct device *dev,
 164                         struct device_attribute *devattr, char *buf)
 165 {
 166         u32 eax, edx;
 167         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
 168         struct platform_data *pdata = dev_get_drvdata(dev);
 169         struct temp_data *tdata = pdata->core_data[attr->index];
 170
 171         mutex_lock(&tdata->update_lock);
 172
 173         /* Check whether the time interval has elapsed */
 174         if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
 175                 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
 176                 /*
 177                  * Ignore the valid bit. In all observed cases the register
 178                  * value is either low or zero if the valid bit is 0.
 179                  * Return it instead of reporting an error which doesn't
 180                  * really help at all.
 181                  */
 182                 tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
 183                 tdata->valid = 1;
 184                 tdata->last_updated = jiffies;
 185         }
 186
 187         mutex_unlock(&tdata->update_lock);
 188         return sprintf(buf, "%d\n", tdata->temp);
 189 }
 190
 191 struct tjmax_pci {
 192         unsigned int device;
 193         int tjmax;
 194 };
 195
 196 static const struct tjmax_pci tjmax_pci_table[] = {
 197         { 0x0708, 110000 },     /* CE41x0 (Sodaville ) */
 198         { 0x0c72, 102000 },     /* Atom S1240 (Centerton) */
 199         { 0x0c73, 95000 },      /* Atom S1220 (Centerton) */
 200         { 0x0c75, 95000 },      /* Atom S1260 (Centerton) */
 201 };
 202
 203 struct tjmax {
 204         char const *id;
 205         int tjmax;
 206 };
 207
 208 static const struct tjmax tjmax_table[] = {
 209         { "CPU  230", 100000 },         /* Model 0x1c, stepping 2       */
 210         { "CPU  330", 125000 },         /* Model 0x1c, stepping 2       */
 211 };
 212
 213 struct tjmax_model {
 214         u8 model;
 215         u8 mask;
 216         int tjmax;
 217 };
 218
 219 #define ANY 0xff
 220
 221 static const struct tjmax_model tjmax_model_table[] = {
 222         { 0x1c, 10, 100000 },   /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
 223         { 0x1c, ANY, 90000 },   /* Z5xx, N2xx, possibly others
 224                                  * Note: Also matches 230 and 330,
 225                                  * which are covered by tjmax_table
 226                                  */
 227         { 0x26, ANY, 90000 },   /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
 228                                  * Note: TjMax for E6xxT is 110C, but CPU type
 229                                  * is undetectable by software
 230                                  */
 231         { 0x27, ANY, 90000 },   /* Atom Medfield (Z2460) */
 232         { 0x35, ANY, 90000 },   /* Atom Clover Trail/Cloverview (Z27x0) */
 233         { 0x36, ANY, 100000 },  /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
 234                                  * Also matches S12x0 (stepping 9), covered by
 235                                  * PCI table
 236                                  */
 237 };
 238
 239 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
 240 {
 241         /* The 100C is default for both mobile and non mobile CPUs */
 242
 243         int tjmax = 100000;
 244         int tjmax_ee = 85000;
 245         int usemsr_ee = 1;
 246         int err;
 247         u32 eax, edx;
 248         int i;
 249         struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
 250
 251         /*
 252          * Explicit tjmax table entries override heuristics.
 253          * First try PCI host bridge IDs, followed by model ID strings
 254          * and model/stepping information.
 255          */
 256         if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
 257                 for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
 258                         if (host_bridge->device == tjmax_pci_table[i].device)
 259                                 return tjmax_pci_table[i].tjmax;
 260                 }
 261         }
 262
 263         for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
 264                 if (strstr(c->x86_model_id, tjmax_table[i].id))
 265                         return tjmax_table[i].tjmax;
 266         }
 267
 268         for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
 269                 const struct tjmax_model *tm = &tjmax_model_table[i];
 270                 if (c->x86_model == tm->model &&
 271                     (tm->mask == ANY || c->x86_mask == tm->mask))
 272                         return tm->tjmax;
 273         }
 274
 275         /* Early chips have no MSR for TjMax */
 276
 277         if (c->x86_model == 0xf && c->x86_mask < 4)
 278                 usemsr_ee = 0;
 279
 280         if (c->x86_model > 0xe && usemsr_ee) {
 281                 u8 platform_id;
 282
 283                 /*
 284                  * Now we can detect the mobile CPU using Intel provided table
 285                  * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
 286                  * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
 287                  */
 288                 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
 289                 if (err) {
 290                         dev_warn(dev,
 291                                  "Unable to access MSR 0x17, assuming desktop"
 292                                  " CPU\n");
 293                         usemsr_ee = 0;
 294                 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
 295                         /*
 296                          * Trust bit 28 up to Penryn, I could not find any
 297                          * documentation on that; if you happen to know
 298                          * someone at Intel please ask
 299                          */
 300                         usemsr_ee = 0;
 301                 } else {
 302                         /* Platform ID bits 52:50 (EDX starts at bit 32) */
 303                         platform_id = (edx >> 18) & 0x7;
 304
 305                         /*
 306                          * Mobile Penryn CPU seems to be platform ID 7 or 5
 307                          * (guesswork)
 308                          */
 309                         if (c->x86_model == 0x17 &&
 310                             (platform_id == 5 || platform_id == 7)) {
 311                                 /*
 312                                  * If MSR EE bit is set, set it to 90 degrees C,
 313                                  * otherwise 105 degrees C
 314                                  */
 315                                 tjmax_ee = 90000;
 316                                 tjmax = 105000;
 317                         }
 318                 }
 319         }
 320
 321         if (usemsr_ee) {
 322                 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
 323                 if (err) {
 324                         dev_warn(dev,
 325                                  "Unable to access MSR 0xEE, for Tjmax, left"
 326                                  " at default\n");
 327                 } else if (eax & 0x40000000) {
 328                         tjmax = tjmax_ee;
 329                 }
 330         } else if (tjmax == 100000) {
 331                 /*
 332                  * If we don't use msr EE it means we are desktop CPU
 333                  * (with exeception of Atom)
 334                  */
 335                 dev_warn(dev, "Using relative temperature scale!\n");
 336         }
 337
 338         return tjmax;
 339 }
 340
 341 static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
 342 {
 343         u8 model = c->x86_model;
 344
 345         return model > 0xe &&
 346                model != 0x1c &&
 347                model != 0x26 &&
 348                model != 0x27 &&
 349                model != 0x35 &&
 350                model != 0x36;
 351 }
 352
 353 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
 354 {
 355         int err;
 356         u32 eax, edx;
 357         u32 val;
 358
 359         /*
 360          * A new feature of current Intel(R) processors, the
 361          * IA32_TEMPERATURE_TARGET contains the TjMax value
 362          */
 363         err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
 364         if (err) {
 365                 if (cpu_has_tjmax(c))
 366                         dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
 367         } else {
 368                 val = (eax >> 16) & 0xff;
 369                 /*
 370                  * If the TjMax is not plausible, an assumption
 371                  * will be used
 372                  */
 373                 if (val) {
 374                         dev_dbg(dev, "TjMax is %d degrees C\n", val);
 375                         return val * 1000;
 376                 }
 377         }
 378
 379         if (force_tjmax) {
 380                 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
 381                            force_tjmax);
 382                 return force_tjmax * 1000;
 383         }
 384
 385         /*
 386          * An assumption is made for early CPUs and unreadable MSR.
 387          * NOTE: the calculated value may not be correct.
 388          */
 389         return adjust_tjmax(c, id, dev);
 390 }
 391
 392 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
 393                              int attr_no)
 394 {
 395         int i;
 396         static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
 397                         struct device_attribute *devattr, char *buf) = {
 398                         show_label, show_crit_alarm, show_temp, show_tjmax,
 399                         show_ttarget };
 400         static const char *const suffixes[TOTAL_ATTRS] = {
 401                 "label", "crit_alarm", "input", "crit", "max"
 402         };
 403
 404         for (i = 0; i < tdata->attr_size; i++) {
 405                 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
 406                          "temp%d_%s", attr_no, suffixes[i]);
 407                 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
 408                 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
 409                 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
 410                 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
 411                 tdata->sd_attrs[i].index = attr_no;
 412                 tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr;
 413         }
 414         tdata->attr_group.attrs = tdata->attrs;
 415         return sysfs_create_group(&dev->kobj, &tdata->attr_group);
 416 }
 417
 418
 419 static int chk_ucode_version(unsigned int cpu)
 420 {
 421         struct cpuinfo_x86 *c = &cpu_data(cpu);
 422
 423         /*
 424          * Check if we have problem with errata AE18 of Core processors:
 425          * Readings might stop update when processor visited too deep sleep,
 426          * fixed for stepping D0 (6EC).
 427          */
 428         if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
 429                 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
 430                 return -ENODEV;
 431         }
 432         return 0;
 433 }
 434
 435 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
 436 {
 437         u16 phys_proc_id = TO_PHYS_ID(cpu);
 438         struct pdev_entry *p;
 439
 440         mutex_lock(&pdev_list_mutex);
 441
 442         list_for_each_entry(p, &pdev_list, list)
 443                 if (p->phys_proc_id == phys_proc_id) {
 444                         mutex_unlock(&pdev_list_mutex);
 445                         return p->pdev;
 446                 }
 447
 448         mutex_unlock(&pdev_list_mutex);
 449         return NULL;
 450 }
 451
 452 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
 453 {
 454         struct temp_data *tdata;
 455
 456         tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
 457         if (!tdata)
 458                 return NULL;
 459
 460         tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
 461                                                         MSR_IA32_THERM_STATUS;
 462         tdata->is_pkg_data = pkg_flag;
 463         tdata->cpu = cpu;
 464         tdata->cpu_core_id = TO_CORE_ID(cpu);
 465         tdata->attr_size = MAX_CORE_ATTRS;
 466         mutex_init(&tdata->update_lock);
 467         return tdata;
 468 }
 469
 470 static int create_core_data(struct platform_device *pdev, unsigned int cpu,
 471                             int pkg_flag)
 472 {
 473         struct temp_data *tdata;
 474         struct platform_data *pdata = platform_get_drvdata(pdev);
 475         struct cpuinfo_x86 *c = &cpu_data(cpu);
 476         u32 eax, edx;
 477         int err, attr_no;
 478
 479         /*
 480          * Find attr number for sysfs:
 481          * We map the attr number to core id of the CPU
 482          * The attr number is always core id + 2
 483          * The Pkgtemp will always show up as temp1_*, if available
 484          */
 485         attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
 486
 487         if (attr_no > MAX_CORE_DATA - 1)
 488                 return -ERANGE;
 489
 490         /*
 491          * Provide a single set of attributes for all HT siblings of a core
 492          * to avoid duplicate sensors (the processor ID and core ID of all
 493          * HT siblings of a core are the same).
 494          * Skip if a HT sibling of this core is already registered.
 495          * This is not an error.
 496          */
 497         if (pdata->core_data[attr_no] != NULL)
 498                 return 0;
 499
 500         tdata = init_temp_data(cpu, pkg_flag);
 501         if (!tdata)
 502                 return -ENOMEM;
 503
 504         /* Test if we can access the status register */
 505         err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
 506         if (err)
 507                 goto exit_free;
 508
 509         /* We can access status register. Get Critical Temperature */
 510         tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
 511
 512         /*
 513          * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
 514          * The target temperature is available on older CPUs but not in this
 515          * register. Atoms don't have the register at all.
 516          */
 517         if (c->x86_model > 0xe && c->x86_model != 0x1c) {
 518                 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
 519                                         &eax, &edx);
 520                 if (!err) {
 521                         tdata->ttarget
 522                           = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
 523                         tdata->attr_size++;
 524                 }
 525         }
 526
 527         pdata->core_data[attr_no] = tdata;
 528
 529         /* Create sysfs interfaces */
 530         err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no);
 531         if (err)
 532                 goto exit_free;
 533
 534         return 0;
 535 exit_free:
 536         pdata->core_data[attr_no] = NULL;
 537         kfree(tdata);
 538         return err;
 539 }
 540
 541 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
 542 {
 543         struct platform_device *pdev = coretemp_get_pdev(cpu);
 544         int err;
 545
 546         if (!pdev)
 547                 return;
 548
 549         err = create_core_data(pdev, cpu, pkg_flag);
 550         if (err)
 551                 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
 552 }
 553
 554 static void coretemp_remove_core(struct platform_data *pdata,
 555                                  int indx)
 556 {
 557         struct temp_data *tdata = pdata->core_data[indx];
 558
 559         /* Remove the sysfs attributes */
 560         sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group);
 561
 562         kfree(pdata->core_data[indx]);
 563         pdata->core_data[indx] = NULL;
 564 }
 565
 566 static int coretemp_probe(struct platform_device *pdev)
 567 {
 568         struct device *dev = &pdev->dev;
 569         struct platform_data *pdata;
 570
 571         /* Initialize the per-package data structures */
 572         pdata = devm_kzalloc(dev, sizeof(struct platform_data), GFP_KERNEL);
 573         if (!pdata)
 574                 return -ENOMEM;
 575
 576         pdata->phys_proc_id = pdev->id;
 577         platform_set_drvdata(pdev, pdata);
 578
 579         pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME,
 580                                                                   pdata, NULL);
 581         return PTR_ERR_OR_ZERO(pdata->hwmon_dev);
 582 }
 583
 584 static int coretemp_remove(struct platform_device *pdev)
 585 {
 586         struct platform_data *pdata = platform_get_drvdata(pdev);
 587         int i;
 588
 589         for (i = MAX_CORE_DATA - 1; i >= 0; --i)
 590                 if (pdata->core_data[i])
 591                         coretemp_remove_core(pdata, i);
 592
 593         return 0;
 594 }
 595
 596 static struct platform_driver coretemp_driver = {
 597         .driver = {
 598                 .name = DRVNAME,
 599         },
 600         .probe = coretemp_probe,
 601         .remove = coretemp_remove,
 602 };
 603
 604 static int coretemp_device_add(unsigned int cpu)
 605 {
 606         int err;
 607         struct platform_device *pdev;
 608         struct pdev_entry *pdev_entry;
 609
 610         mutex_lock(&pdev_list_mutex);
 611
 612         pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
 613         if (!pdev) {
 614                 err = -ENOMEM;
 615                 pr_err("Device allocation failed\n");
 616                 goto exit;
 617         }
 618
 619         pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
 620         if (!pdev_entry) {
 621                 err = -ENOMEM;
 622                 goto exit_device_put;
 623         }
 624
 625         err = platform_device_add(pdev);
 626         if (err) {
 627                 pr_err("Device addition failed (%d)\n", err);
 628                 goto exit_device_free;
 629         }
 630
 631         pdev_entry->pdev = pdev;
 632         pdev_entry->phys_proc_id = pdev->id;
 633
 634         list_add_tail(&pdev_entry->list, &pdev_list);
 635         mutex_unlock(&pdev_list_mutex);
 636
 637         return 0;
 638
 639 exit_device_free:
 640         kfree(pdev_entry);
 641 exit_device_put:
 642         platform_device_put(pdev);
 643 exit:
 644         mutex_unlock(&pdev_list_mutex);
 645         return err;
 646 }
 647
 648 static void coretemp_device_remove(unsigned int cpu)
 649 {
 650         struct pdev_entry *p, *n;
 651         u16 phys_proc_id = TO_PHYS_ID(cpu);
 652
 653         mutex_lock(&pdev_list_mutex);
 654         list_for_each_entry_safe(p, n, &pdev_list, list) {
 655                 if (p->phys_proc_id != phys_proc_id)
 656                         continue;
 657                 platform_device_unregister(p->pdev);
 658                 list_del(&p->list);
 659                 kfree(p);
 660         }
 661         mutex_unlock(&pdev_list_mutex);
 662 }
 663
 664 static bool is_any_core_online(struct platform_data *pdata)
 665 {
 666         int i;
 667
 668         /* Find online cores, except pkgtemp data */
 669         for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
 670                 if (pdata->core_data[i] &&
 671                         !pdata->core_data[i]->is_pkg_data) {
 672                         return true;
 673                 }
 674         }
 675         return false;
 676 }
 677
 678 static void get_core_online(unsigned int cpu)
 679 {
 680         struct cpuinfo_x86 *c = &cpu_data(cpu);
 681         struct platform_device *pdev = coretemp_get_pdev(cpu);
 682         int err;
 683
 684         /*
 685          * CPUID.06H.EAX[0] indicates whether the CPU has thermal
 686          * sensors. We check this bit only, all the early CPUs
 687          * without thermal sensors will be filtered out.
 688          */
 689         if (!cpu_has(c, X86_FEATURE_DTHERM))
 690                 return;
 691
 692         if (!pdev) {
 693                 /* Check the microcode version of the CPU */
 694                 if (chk_ucode_version(cpu))
 695                         return;
 696
 697                 /*
 698                  * Alright, we have DTS support.
 699                  * We are bringing the _first_ core in this pkg
 700                  * online. So, initialize per-pkg data structures and
 701                  * then bring this core online.
 702                  */
 703                 err = coretemp_device_add(cpu);
 704                 if (err)
 705                         return;
 706                 /*
 707                  * Check whether pkgtemp support is available.
 708                  * If so, add interfaces for pkgtemp.
 709                  */
 710                 if (cpu_has(c, X86_FEATURE_PTS))
 711                         coretemp_add_core(cpu, 1);
 712         }
 713         /*
 714          * Physical CPU device already exists.
 715          * So, just add interfaces for this core.
 716          */
 717         coretemp_add_core(cpu, 0);
 718 }
 719
 720 static void put_core_offline(unsigned int cpu)
 721 {
 722         int i, indx;
 723         struct platform_data *pdata;
 724         struct platform_device *pdev = coretemp_get_pdev(cpu);
 725
 726         /* If the physical CPU device does not exist, just return */
 727         if (!pdev)
 728                 return;
 729
 730         pdata = platform_get_drvdata(pdev);
 731
 732         indx = TO_ATTR_NO(cpu);
 733
 734         /* The core id is too big, just return */
 735         if (indx > MAX_CORE_DATA - 1)
 736                 return;
 737
 738         if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
 739                 coretemp_remove_core(pdata, indx);
 740
 741         /*
 742          * If a HT sibling of a core is taken offline, but another HT sibling
 743          * of the same core is still online, register the alternate sibling.
 744          * This ensures that exactly one set of attributes is provided as long
 745          * as at least one HT sibling of a core is online.
 746          */
 747         for_each_sibling(i, cpu) {
 748                 if (i != cpu) {
 749                         get_core_online(i);
 750                         /*
 751                          * Display temperature sensor data for one HT sibling
 752                          * per core only, so abort the loop after one such
 753                          * sibling has been found.
 754                          */
 755                         break;
 756                 }
 757         }
 758         /*
 759          * If all cores in this pkg are offline, remove the device.
 760          * coretemp_device_remove calls unregister_platform_device,
 761          * which in turn calls coretemp_remove. This removes the
 762          * pkgtemp entry and does other clean ups.
 763          */
 764         if (!is_any_core_online(pdata))
 765                 coretemp_device_remove(cpu);
 766 }
 767
 768 static int coretemp_cpu_callback(struct notifier_block *nfb,
 769                                  unsigned long action, void *hcpu)
 770 {
 771         unsigned int cpu = (unsigned long) hcpu;
 772
 773         switch (action) {
 774         case CPU_ONLINE:
 775         case CPU_DOWN_FAILED:
 776                 get_core_online(cpu);
 777                 break;
 778         case CPU_DOWN_PREPARE:
 779                 put_core_offline(cpu);
 780                 break;
 781         }
 782         return NOTIFY_OK;
 783 }
 784
 785 static struct notifier_block coretemp_cpu_notifier __refdata = {
 786         .notifier_call = coretemp_cpu_callback,
 787 };
 788
 789 static const struct x86_cpu_id __initconst coretemp_ids[] = {
 790         { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
 791         {}
 792 };
 793 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
 794
 795 static int __init coretemp_init(void)
 796 {
 797         int i, err;
 798
 799         /*
 800          * CPUID.06H.EAX[0] indicates whether the CPU has thermal
 801          * sensors. We check this bit only, all the early CPUs
 802          * without thermal sensors will be filtered out.
 803          */
 804         if (!x86_match_cpu(coretemp_ids))
 805                 return -ENODEV;
 806
 807         err = platform_driver_register(&coretemp_driver);
 808         if (err)
 809                 goto exit;
 810
 811         cpu_notifier_register_begin();
 812         for_each_online_cpu(i)
 813                 get_core_online(i);
 814
 815 #ifndef CONFIG_HOTPLUG_CPU
 816         if (list_empty(&pdev_list)) {
 817                 cpu_notifier_register_done();
 818                 err = -ENODEV;
 819                 goto exit_driver_unreg;
 820         }
 821 #endif
 822
 823         __register_hotcpu_notifier(&coretemp_cpu_notifier);
 824         cpu_notifier_register_done();
 825         return 0;
 826
 827 #ifndef CONFIG_HOTPLUG_CPU
 828 exit_driver_unreg:
 829         platform_driver_unregister(&coretemp_driver);
 830 #endif
 831 exit:
 832         return err;
 833 }
 834
 835 static void __exit coretemp_exit(void)
 836 {
 837         struct pdev_entry *p, *n;
 838
 839         cpu_notifier_register_begin();
 840         __unregister_hotcpu_notifier(&coretemp_cpu_notifier);
 841         mutex_lock(&pdev_list_mutex);
 842         list_for_each_entry_safe(p, n, &pdev_list, list) {
 843                 platform_device_unregister(p->pdev);
 844                 list_del(&p->list);
 845                 kfree(p);
 846         }
 847         mutex_unlock(&pdev_list_mutex);
 848         cpu_notifier_register_done();
 849         platform_driver_unregister(&coretemp_driver);
 850 }
 851
 852 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
 853 MODULE_DESCRIPTION("Intel Core temperature monitor");
 854 MODULE_LICENSE("GPL");
 855
 856 module_init(coretemp_init)
 857 module_exit(coretemp_exit)