projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
hwmon/f71805f: Support DC fan speed control mode
[deliverable/linux.git] / drivers / hwmon / f71805f.c
1 /*
2 * f71805f.c - driver for the Fintek F71805F/FG Super-I/O chip integrated
3 * hardware monitoring features
4 * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
5 *
6 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
7 * complete hardware monitoring features: voltage, fan and temperature
8 * sensors, and manual and automatic fan speed control.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/platform_device.h>
30 #include <linux/hwmon.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/sysfs.h>
35 #include <asm/io.h>
36
37 static struct platform_device *pdev;
38
39 #define DRVNAME "f71805f"
40
41 /*
42 * Super-I/O constants and functions
43 */
44
45 #define F71805F_LD_HWM 0x04
46
47 #define SIO_REG_LDSEL 0x07 /* Logical device select */
48 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
49 #define SIO_REG_DEVREV 0x22 /* Device revision */
50 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
51 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
52 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
53
54 #define SIO_FINTEK_ID 0x1934
55 #define SIO_F71805F_ID 0x0406
56
57 static inline int
58 superio_inb(int base, int reg)
59 {
60 outb(reg, base);
61 return inb(base + 1);
62 }
63
64 static int
65 superio_inw(int base, int reg)
66 {
67 int val;
68 outb(reg++, base);
69 val = inb(base + 1) << 8;
70 outb(reg, base);
71 val |= inb(base + 1);
72 return val;
73 }
74
75 static inline void
76 superio_select(int base, int ld)
77 {
78 outb(SIO_REG_LDSEL, base);
79 outb(ld, base + 1);
80 }
81
82 static inline void
83 superio_enter(int base)
84 {
85 outb(0x87, base);
86 outb(0x87, base);
87 }
88
89 static inline void
90 superio_exit(int base)
91 {
92 outb(0xaa, base);
93 }
94
95 /*
96 * ISA constants
97 */
98
99 #define REGION_LENGTH 2
100 #define ADDR_REG_OFFSET 0
101 #define DATA_REG_OFFSET 1
102
103 /*
104 * Registers
105 */
106
107 /* in nr from 0 to 8 (8-bit values) */
108 #define F71805F_REG_IN(nr) (0x10 + (nr))
109 #define F71805F_REG_IN_HIGH(nr) (0x40 + 2 * (nr))
110 #define F71805F_REG_IN_LOW(nr) (0x41 + 2 * (nr))
111 /* fan nr from 0 to 2 (12-bit values, two registers) */
112 #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
113 #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
114 #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
115 #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
116 #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
117 /* temp nr from 0 to 2 (8-bit values) */
118 #define F71805F_REG_TEMP(nr) (0x1B + (nr))
119 #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
120 #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
121 #define F71805F_REG_TEMP_MODE 0x01
122
123 #define F71805F_REG_START 0x00
124 /* status nr from 0 to 2 */
125 #define F71805F_REG_STATUS(nr) (0x36 + (nr))
126
127 /* individual register bits */
128 #define FAN_CTRL_SKIP 0x80
129 #define FAN_CTRL_DC_MODE 0x10
130 #define FAN_CTRL_MODE_MASK 0x03
131 #define FAN_CTRL_MODE_SPEED 0x00
132 #define FAN_CTRL_MODE_TEMPERATURE 0x01
133 #define FAN_CTRL_MODE_MANUAL 0x02
134
135 /*
136 * Data structures and manipulation thereof
137 */
138
139 struct f71805f_data {
140 unsigned short addr;
141 const char *name;
142 struct mutex lock;
143 struct class_device *class_dev;
144
145 struct mutex update_lock;
146 char valid; /* !=0 if following fields are valid */
147 unsigned long last_updated; /* In jiffies */
148 unsigned long last_limits; /* In jiffies */
149
150 /* Register values */
151 u8 in[9];
152 u8 in_high[9];
153 u8 in_low[9];
154 u16 fan[3];
155 u16 fan_low[3];
156 u8 fan_ctrl[3];
157 u8 pwm[3];
158 u8 pwm_freq[3];
159 u8 temp[3];
160 u8 temp_high[3];
161 u8 temp_hyst[3];
162 u8 temp_mode;
163 unsigned long alarms;
164 };
165
166 static inline long in_from_reg(u8 reg)
167 {
168 return (reg * 8);
169 }
170
171 /* The 2 least significant bits are not used */
172 static inline u8 in_to_reg(long val)
173 {
174 if (val <= 0)
175 return 0;
176 if (val >= 2016)
177 return 0xfc;
178 return (((val + 16) / 32) << 2);
179 }
180
181 /* in0 is downscaled by a factor 2 internally */
182 static inline long in0_from_reg(u8 reg)
183 {
184 return (reg * 16);
185 }
186
187 static inline u8 in0_to_reg(long val)
188 {
189 if (val <= 0)
190 return 0;
191 if (val >= 4032)
192 return 0xfc;
193 return (((val + 32) / 64) << 2);
194 }
195
196 /* The 4 most significant bits are not used */
197 static inline long fan_from_reg(u16 reg)
198 {
199 reg &= 0xfff;
200 if (!reg || reg == 0xfff)
201 return 0;
202 return (1500000 / reg);
203 }
204
205 static inline u16 fan_to_reg(long rpm)
206 {
207 /* If the low limit is set below what the chip can measure,
208 store the largest possible 12-bit value in the registers,
209 so that no alarm will ever trigger. */
210 if (rpm < 367)
211 return 0xfff;
212 return (1500000 / rpm);
213 }
214
215 static inline unsigned long pwm_freq_from_reg(u8 reg)
216 {
217 unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
218
219 reg &= 0x7f;
220 if (reg == 0)
221 reg++;
222 return clock / (reg << 8);
223 }
224
225 static inline u8 pwm_freq_to_reg(unsigned long val)
226 {
227 if (val >= 187500) /* The highest we can do */
228 return 0x80;
229 if (val >= 1475) /* Use 48 MHz clock */
230 return 0x80 | (48000000UL / (val << 8));
231 if (val < 31) /* The lowest we can do */
232 return 0x7f;
233 else /* Use 1 MHz clock */
234 return 1000000UL / (val << 8);
235 }
236
237 static inline int pwm_mode_from_reg(u8 reg)
238 {
239 return !(reg & FAN_CTRL_DC_MODE);
240 }
241
242 static inline long temp_from_reg(u8 reg)
243 {
244 return (reg * 1000);
245 }
246
247 static inline u8 temp_to_reg(long val)
248 {
249 if (val < 0)
250 val = 0;
251 else if (val > 1000 * 0xff)
252 val = 0xff;
253 return ((val + 500) / 1000);
254 }
255
256 /*
257 * Device I/O access
258 */
259
260 static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
261 {
262 u8 val;
263
264 mutex_lock(&data->lock);
265 outb(reg, data->addr + ADDR_REG_OFFSET);
266 val = inb(data->addr + DATA_REG_OFFSET);
267 mutex_unlock(&data->lock);
268
269 return val;
270 }
271
272 static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
273 {
274 mutex_lock(&data->lock);
275 outb(reg, data->addr + ADDR_REG_OFFSET);
276 outb(val, data->addr + DATA_REG_OFFSET);
277 mutex_unlock(&data->lock);
278 }
279
280 /* It is important to read the MSB first, because doing so latches the
281 value of the LSB, so we are sure both bytes belong to the same value. */
282 static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
283 {
284 u16 val;
285
286 mutex_lock(&data->lock);
287 outb(reg, data->addr + ADDR_REG_OFFSET);
288 val = inb(data->addr + DATA_REG_OFFSET) << 8;
289 outb(++reg, data->addr + ADDR_REG_OFFSET);
290 val |= inb(data->addr + DATA_REG_OFFSET);
291 mutex_unlock(&data->lock);
292
293 return val;
294 }
295
296 static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
297 {
298 mutex_lock(&data->lock);
299 outb(reg, data->addr + ADDR_REG_OFFSET);
300 outb(val >> 8, data->addr + DATA_REG_OFFSET);
301 outb(++reg, data->addr + ADDR_REG_OFFSET);
302 outb(val & 0xff, data->addr + DATA_REG_OFFSET);
303 mutex_unlock(&data->lock);
304 }
305
306 static struct f71805f_data *f71805f_update_device(struct device *dev)
307 {
308 struct f71805f_data *data = dev_get_drvdata(dev);
309 int nr;
310
311 mutex_lock(&data->update_lock);
312
313 /* Limit registers cache is refreshed after 60 seconds */
314 if (time_after(jiffies, data->last_updated + 60 * HZ)
315 || !data->valid) {
316 for (nr = 0; nr < 9; nr++) {
317 data->in_high[nr] = f71805f_read8(data,
318 F71805F_REG_IN_HIGH(nr));
319 data->in_low[nr] = f71805f_read8(data,
320 F71805F_REG_IN_LOW(nr));
321 }
322 for (nr = 0; nr < 3; nr++) {
323 if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
324 continue;
325 data->fan_low[nr] = f71805f_read16(data,
326 F71805F_REG_FAN_LOW(nr));
327 data->pwm_freq[nr] = f71805f_read8(data,
328 F71805F_REG_PWM_FREQ(nr));
329 }
330 for (nr = 0; nr < 3; nr++) {
331 data->temp_high[nr] = f71805f_read8(data,
332 F71805F_REG_TEMP_HIGH(nr));
333 data->temp_hyst[nr] = f71805f_read8(data,
334 F71805F_REG_TEMP_HYST(nr));
335 }
336 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
337
338 data->last_limits = jiffies;
339 }
340
341 /* Measurement registers cache is refreshed after 1 second */
342 if (time_after(jiffies, data->last_updated + HZ)
343 || !data->valid) {
344 for (nr = 0; nr < 9; nr++) {
345 data->in[nr] = f71805f_read8(data,
346 F71805F_REG_IN(nr));
347 }
348 for (nr = 0; nr < 3; nr++) {
349 if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
350 continue;
351 data->fan[nr] = f71805f_read16(data,
352 F71805F_REG_FAN(nr));
353 data->fan_ctrl[nr] = f71805f_read8(data,
354 F71805F_REG_FAN_CTRL(nr));
355 data->pwm[nr] = f71805f_read8(data,
356 F71805F_REG_PWM_DUTY(nr));
357 }
358 for (nr = 0; nr < 3; nr++) {
359 data->temp[nr] = f71805f_read8(data,
360 F71805F_REG_TEMP(nr));
361 }
362 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
363 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
364 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
365
366 data->last_updated = jiffies;
367 data->valid = 1;
368 }
369
370 mutex_unlock(&data->update_lock);
371
372 return data;
373 }
374
375 /*
376 * Sysfs interface
377 */
378
379 static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
380 char *buf)
381 {
382 struct f71805f_data *data = f71805f_update_device(dev);
383
384 return sprintf(buf, "%ld\n", in0_from_reg(data->in[0]));
385 }
386
387 static ssize_t show_in0_max(struct device *dev, struct device_attribute
388 *devattr, char *buf)
389 {
390 struct f71805f_data *data = f71805f_update_device(dev);
391
392 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[0]));
393 }
394
395 static ssize_t show_in0_min(struct device *dev, struct device_attribute
396 *devattr, char *buf)
397 {
398 struct f71805f_data *data = f71805f_update_device(dev);
399
400 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[0]));
401 }
402
403 static ssize_t set_in0_max(struct device *dev, struct device_attribute
404 *devattr, const char *buf, size_t count)
405 {
406 struct f71805f_data *data = dev_get_drvdata(dev);
407 long val = simple_strtol(buf, NULL, 10);
408
409 mutex_lock(&data->update_lock);
410 data->in_high[0] = in0_to_reg(val);
411 f71805f_write8(data, F71805F_REG_IN_HIGH(0), data->in_high[0]);
412 mutex_unlock(&data->update_lock);
413
414 return count;
415 }
416
417 static ssize_t set_in0_min(struct device *dev, struct device_attribute
418 *devattr, const char *buf, size_t count)
419 {
420 struct f71805f_data *data = dev_get_drvdata(dev);
421 long val = simple_strtol(buf, NULL, 10);
422
423 mutex_lock(&data->update_lock);
424 data->in_low[0] = in0_to_reg(val);
425 f71805f_write8(data, F71805F_REG_IN_LOW(0), data->in_low[0]);
426 mutex_unlock(&data->update_lock);
427
428 return count;
429 }
430
431 static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
432 char *buf)
433 {
434 struct f71805f_data *data = f71805f_update_device(dev);
435 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
436 int nr = attr->index;
437
438 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
439 }
440
441 static ssize_t show_in_max(struct device *dev, struct device_attribute
442 *devattr, char *buf)
443 {
444 struct f71805f_data *data = f71805f_update_device(dev);
445 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
446 int nr = attr->index;
447
448 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
449 }
450
451 static ssize_t show_in_min(struct device *dev, struct device_attribute
452 *devattr, char *buf)
453 {
454 struct f71805f_data *data = f71805f_update_device(dev);
455 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
456 int nr = attr->index;
457
458 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
459 }
460
461 static ssize_t set_in_max(struct device *dev, struct device_attribute
462 *devattr, const char *buf, size_t count)
463 {
464 struct f71805f_data *data = dev_get_drvdata(dev);
465 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
466 int nr = attr->index;
467 long val = simple_strtol(buf, NULL, 10);
468
469 mutex_lock(&data->update_lock);
470 data->in_high[nr] = in_to_reg(val);
471 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
472 mutex_unlock(&data->update_lock);
473
474 return count;
475 }
476
477 static ssize_t set_in_min(struct device *dev, struct device_attribute
478 *devattr, const char *buf, size_t count)
479 {
480 struct f71805f_data *data = dev_get_drvdata(dev);
481 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
482 int nr = attr->index;
483 long val = simple_strtol(buf, NULL, 10);
484
485 mutex_lock(&data->update_lock);
486 data->in_low[nr] = in_to_reg(val);
487 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
488 mutex_unlock(&data->update_lock);
489
490 return count;
491 }
492
493 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
494 char *buf)
495 {
496 struct f71805f_data *data = f71805f_update_device(dev);
497 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
498 int nr = attr->index;
499
500 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
501 }
502
503 static ssize_t show_fan_min(struct device *dev, struct device_attribute
504 *devattr, char *buf)
505 {
506 struct f71805f_data *data = f71805f_update_device(dev);
507 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
508 int nr = attr->index;
509
510 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
511 }
512
513 static ssize_t set_fan_min(struct device *dev, struct device_attribute
514 *devattr, const char *buf, size_t count)
515 {
516 struct f71805f_data *data = dev_get_drvdata(dev);
517 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
518 int nr = attr->index;
519 long val = simple_strtol(buf, NULL, 10);
520
521 mutex_lock(&data->update_lock);
522 data->fan_low[nr] = fan_to_reg(val);
523 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
524 mutex_unlock(&data->update_lock);
525
526 return count;
527 }
528
529 static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
530 char *buf)
531 {
532 struct f71805f_data *data = f71805f_update_device(dev);
533 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
534 int nr = attr->index;
535
536 return sprintf(buf, "%d\n", (int)data->pwm[nr]);
537 }
538
539 static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
540 *devattr, char *buf)
541 {
542 struct f71805f_data *data = f71805f_update_device(dev);
543 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
544 int nr = attr->index;
545 int mode;
546
547 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
548 case FAN_CTRL_MODE_SPEED:
549 mode = 3;
550 break;
551 case FAN_CTRL_MODE_TEMPERATURE:
552 mode = 2;
553 break;
554 default: /* MANUAL */
555 mode = 1;
556 }
557
558 return sprintf(buf, "%d\n", mode);
559 }
560
561 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
562 *devattr, char *buf)
563 {
564 struct f71805f_data *data = f71805f_update_device(dev);
565 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
566 int nr = attr->index;
567
568 return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
569 }
570
571 static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
572 *devattr, char *buf)
573 {
574 struct f71805f_data *data = f71805f_update_device(dev);
575 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
576 int nr = attr->index;
577
578 return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
579 }
580
581 static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
582 const char *buf, size_t count)
583 {
584 struct f71805f_data *data = dev_get_drvdata(dev);
585 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
586 int nr = attr->index;
587 unsigned long val = simple_strtoul(buf, NULL, 10);
588
589 if (val > 255)
590 return -EINVAL;
591
592 mutex_lock(&data->update_lock);
593 data->pwm[nr] = val;
594 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
595 mutex_unlock(&data->update_lock);
596
597 return count;
598 }
599
600 static struct attribute *f71805f_attr_pwm[];
601
602 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
603 *devattr, const char *buf, size_t count)
604 {
605 struct f71805f_data *data = dev_get_drvdata(dev);
606 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
607 int nr = attr->index;
608 unsigned long val = simple_strtoul(buf, NULL, 10);
609 u8 reg;
610
611 if (val < 1 || val > 3)
612 return -EINVAL;
613
614 if (val > 1) { /* Automatic mode, user can't set PWM value */
615 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
616 S_IRUGO))
617 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
618 }
619
620 mutex_lock(&data->update_lock);
621 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
622 & ~FAN_CTRL_MODE_MASK;
623 switch (val) {
624 case 1:
625 reg |= FAN_CTRL_MODE_MANUAL;
626 break;
627 case 2:
628 reg |= FAN_CTRL_MODE_TEMPERATURE;
629 break;
630 case 3:
631 reg |= FAN_CTRL_MODE_SPEED;
632 break;
633 }
634 data->fan_ctrl[nr] = reg;
635 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
636 mutex_unlock(&data->update_lock);
637
638 if (val == 1) { /* Manual mode, user can set PWM value */
639 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
640 S_IRUGO | S_IWUSR))
641 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
642 }
643
644 return count;
645 }
646
647 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
648 *devattr, const char *buf, size_t count)
649 {
650 struct f71805f_data *data = dev_get_drvdata(dev);
651 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
652 int nr = attr->index;
653 unsigned long val = simple_strtoul(buf, NULL, 10);
654
655 mutex_lock(&data->update_lock);
656 data->pwm_freq[nr] = pwm_freq_to_reg(val);
657 f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
658 mutex_unlock(&data->update_lock);
659
660 return count;
661 }
662
663 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
664 char *buf)
665 {
666 struct f71805f_data *data = f71805f_update_device(dev);
667 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
668 int nr = attr->index;
669
670 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
671 }
672
673 static ssize_t show_temp_max(struct device *dev, struct device_attribute
674 *devattr, char *buf)
675 {
676 struct f71805f_data *data = f71805f_update_device(dev);
677 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
678 int nr = attr->index;
679
680 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
681 }
682
683 static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
684 *devattr, char *buf)
685 {
686 struct f71805f_data *data = f71805f_update_device(dev);
687 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
688 int nr = attr->index;
689
690 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
691 }
692
693 static ssize_t show_temp_type(struct device *dev, struct device_attribute
694 *devattr, char *buf)
695 {
696 struct f71805f_data *data = f71805f_update_device(dev);
697 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
698 int nr = attr->index;
699
700 /* 3 is diode, 4 is thermistor */
701 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
702 }
703
704 static ssize_t set_temp_max(struct device *dev, struct device_attribute
705 *devattr, const char *buf, size_t count)
706 {
707 struct f71805f_data *data = dev_get_drvdata(dev);
708 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
709 int nr = attr->index;
710 long val = simple_strtol(buf, NULL, 10);
711
712 mutex_lock(&data->update_lock);
713 data->temp_high[nr] = temp_to_reg(val);
714 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
715 mutex_unlock(&data->update_lock);
716
717 return count;
718 }
719
720 static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
721 *devattr, const char *buf, size_t count)
722 {
723 struct f71805f_data *data = dev_get_drvdata(dev);
724 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
725 int nr = attr->index;
726 long val = simple_strtol(buf, NULL, 10);
727
728 mutex_lock(&data->update_lock);
729 data->temp_hyst[nr] = temp_to_reg(val);
730 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
731 mutex_unlock(&data->update_lock);
732
733 return count;
734 }
735
736 static ssize_t show_alarms_in(struct device *dev, struct device_attribute
737 *devattr, char *buf)
738 {
739 struct f71805f_data *data = f71805f_update_device(dev);
740
741 return sprintf(buf, "%lu\n", data->alarms & 0x1ff);
742 }
743
744 static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
745 *devattr, char *buf)
746 {
747 struct f71805f_data *data = f71805f_update_device(dev);
748
749 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
750 }
751
752 static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
753 *devattr, char *buf)
754 {
755 struct f71805f_data *data = f71805f_update_device(dev);
756
757 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
758 }
759
760 static ssize_t show_alarm(struct device *dev, struct device_attribute
761 *devattr, char *buf)
762 {
763 struct f71805f_data *data = f71805f_update_device(dev);
764 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
765 int bitnr = attr->index;
766
767 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
768 }
769
770 static ssize_t show_name(struct device *dev, struct device_attribute
771 *devattr, char *buf)
772 {
773 struct f71805f_data *data = dev_get_drvdata(dev);
774
775 return sprintf(buf, "%s\n", data->name);
776 }
777
778 static DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL);
779 static DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR, show_in0_max, set_in0_max);
780 static DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR, show_in0_min, set_in0_min);
781 static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
782 static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
783 show_in_max, set_in_max, 1);
784 static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
785 show_in_min, set_in_min, 1);
786 static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
787 static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
788 show_in_max, set_in_max, 2);
789 static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
790 show_in_min, set_in_min, 2);
791 static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
792 static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
793 show_in_max, set_in_max, 3);
794 static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
795 show_in_min, set_in_min, 3);
796 static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
797 static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
798 show_in_max, set_in_max, 4);
799 static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
800 show_in_min, set_in_min, 4);
801 static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
802 static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
803 show_in_max, set_in_max, 5);
804 static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
805 show_in_min, set_in_min, 5);
806 static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
807 static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
808 show_in_max, set_in_max, 6);
809 static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
810 show_in_min, set_in_min, 6);
811 static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
812 static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
813 show_in_max, set_in_max, 7);
814 static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
815 show_in_min, set_in_min, 7);
816 static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
817 static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
818 show_in_max, set_in_max, 8);
819 static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
820 show_in_min, set_in_min, 8);
821
822 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
823 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
824 show_fan_min, set_fan_min, 0);
825 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
826 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
827 show_fan_min, set_fan_min, 1);
828 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
829 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
830 show_fan_min, set_fan_min, 2);
831
832 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
833 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
834 show_temp_max, set_temp_max, 0);
835 static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
836 show_temp_hyst, set_temp_hyst, 0);
837 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
838 static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
839 static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
840 show_temp_max, set_temp_max, 1);
841 static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
842 show_temp_hyst, set_temp_hyst, 1);
843 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
844 static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
845 static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
846 show_temp_max, set_temp_max, 2);
847 static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
848 show_temp_hyst, set_temp_hyst, 2);
849 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
850
851 /* pwm (value) files are created read-only, write permission is
852 then added or removed dynamically as needed */
853 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
854 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
855 show_pwm_enable, set_pwm_enable, 0);
856 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
857 show_pwm_freq, set_pwm_freq, 0);
858 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
859 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
860 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
861 show_pwm_enable, set_pwm_enable, 1);
862 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
863 show_pwm_freq, set_pwm_freq, 1);
864 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
865 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
866 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
867 show_pwm_enable, set_pwm_enable, 2);
868 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
869 show_pwm_freq, set_pwm_freq, 2);
870 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
871
872 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
873 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
874 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
875 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
876 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
877 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
878 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
879 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
880 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
881 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
882 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
883 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
884 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
885 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
886 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
887 static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
888 static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
889 static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
890
891 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
892
893 static struct attribute *f71805f_attributes[] = {
894 &dev_attr_in0_input.attr,
895 &dev_attr_in0_max.attr,
896 &dev_attr_in0_min.attr,
897 &sensor_dev_attr_in1_input.dev_attr.attr,
898 &sensor_dev_attr_in1_max.dev_attr.attr,
899 &sensor_dev_attr_in1_min.dev_attr.attr,
900 &sensor_dev_attr_in2_input.dev_attr.attr,
901 &sensor_dev_attr_in2_max.dev_attr.attr,
902 &sensor_dev_attr_in2_min.dev_attr.attr,
903 &sensor_dev_attr_in3_input.dev_attr.attr,
904 &sensor_dev_attr_in3_max.dev_attr.attr,
905 &sensor_dev_attr_in3_min.dev_attr.attr,
906 &sensor_dev_attr_in4_input.dev_attr.attr,
907 &sensor_dev_attr_in4_max.dev_attr.attr,
908 &sensor_dev_attr_in4_min.dev_attr.attr,
909 &sensor_dev_attr_in5_input.dev_attr.attr,
910 &sensor_dev_attr_in5_max.dev_attr.attr,
911 &sensor_dev_attr_in5_min.dev_attr.attr,
912 &sensor_dev_attr_in6_input.dev_attr.attr,
913 &sensor_dev_attr_in6_max.dev_attr.attr,
914 &sensor_dev_attr_in6_min.dev_attr.attr,
915 &sensor_dev_attr_in7_input.dev_attr.attr,
916 &sensor_dev_attr_in7_max.dev_attr.attr,
917 &sensor_dev_attr_in7_min.dev_attr.attr,
918 &sensor_dev_attr_in8_input.dev_attr.attr,
919 &sensor_dev_attr_in8_max.dev_attr.attr,
920 &sensor_dev_attr_in8_min.dev_attr.attr,
921
922 &sensor_dev_attr_temp1_input.dev_attr.attr,
923 &sensor_dev_attr_temp1_max.dev_attr.attr,
924 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
925 &sensor_dev_attr_temp1_type.dev_attr.attr,
926 &sensor_dev_attr_temp2_input.dev_attr.attr,
927 &sensor_dev_attr_temp2_max.dev_attr.attr,
928 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
929 &sensor_dev_attr_temp2_type.dev_attr.attr,
930 &sensor_dev_attr_temp3_input.dev_attr.attr,
931 &sensor_dev_attr_temp3_max.dev_attr.attr,
932 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
933 &sensor_dev_attr_temp3_type.dev_attr.attr,
934
935 &sensor_dev_attr_in0_alarm.dev_attr.attr,
936 &sensor_dev_attr_in1_alarm.dev_attr.attr,
937 &sensor_dev_attr_in2_alarm.dev_attr.attr,
938 &sensor_dev_attr_in3_alarm.dev_attr.attr,
939 &sensor_dev_attr_in4_alarm.dev_attr.attr,
940 &sensor_dev_attr_in5_alarm.dev_attr.attr,
941 &sensor_dev_attr_in6_alarm.dev_attr.attr,
942 &sensor_dev_attr_in7_alarm.dev_attr.attr,
943 &sensor_dev_attr_in8_alarm.dev_attr.attr,
944 &dev_attr_alarms_in.attr,
945 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
946 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
947 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
948 &dev_attr_alarms_temp.attr,
949 &dev_attr_alarms_fan.attr,
950
951 &dev_attr_name.attr,
952 NULL
953 };
954
955 static const struct attribute_group f71805f_group = {
956 .attrs = f71805f_attributes,
957 };
958
959 static struct attribute *f71805f_attributes_fan[3][7] = {
960 {
961 &sensor_dev_attr_fan1_input.dev_attr.attr,
962 &sensor_dev_attr_fan1_min.dev_attr.attr,
963 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
964 &sensor_dev_attr_pwm1.dev_attr.attr,
965 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
966 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
967 NULL
968 }, {
969 &sensor_dev_attr_fan2_input.dev_attr.attr,
970 &sensor_dev_attr_fan2_min.dev_attr.attr,
971 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
972 &sensor_dev_attr_pwm2.dev_attr.attr,
973 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
974 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
975 NULL
976 }, {
977 &sensor_dev_attr_fan3_input.dev_attr.attr,
978 &sensor_dev_attr_fan3_min.dev_attr.attr,
979 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
980 &sensor_dev_attr_pwm3.dev_attr.attr,
981 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
982 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
983 NULL
984 }
985 };
986
987 static const struct attribute_group f71805f_group_fan[3] = {
988 { .attrs = f71805f_attributes_fan[0] },
989 { .attrs = f71805f_attributes_fan[1] },
990 { .attrs = f71805f_attributes_fan[2] },
991 };
992
993 /* We don't include pwm_freq files in the arrays above, because they must be
994 created conditionally (only if pwm_mode is 1 == PWM) */
995 static struct attribute *f71805f_attributes_pwm_freq[] = {
996 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
997 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
998 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
999 NULL
1000 };
1001
1002 static const struct attribute_group f71805f_group_pwm_freq = {
1003 .attrs = f71805f_attributes_pwm_freq,
1004 };
1005
1006 /* We also need an indexed access to pwmN files to toggle writability */
1007 static struct attribute *f71805f_attr_pwm[] = {
1008 &sensor_dev_attr_pwm1.dev_attr.attr,
1009 &sensor_dev_attr_pwm2.dev_attr.attr,
1010 &sensor_dev_attr_pwm3.dev_attr.attr,
1011 };
1012
1013 /*
1014 * Device registration and initialization
1015 */
1016
1017 static void __devinit f71805f_init_device(struct f71805f_data *data)
1018 {
1019 u8 reg;
1020 int i;
1021
1022 reg = f71805f_read8(data, F71805F_REG_START);
1023 if ((reg & 0x41) != 0x01) {
1024 printk(KERN_DEBUG DRVNAME ": Starting monitoring "
1025 "operations\n");
1026 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
1027 }
1028
1029 /* Fan monitoring can be disabled. If it is, we won't be polling
1030 the register values, and won't create the related sysfs files. */
1031 for (i = 0; i < 3; i++) {
1032 data->fan_ctrl[i] = f71805f_read8(data,
1033 F71805F_REG_FAN_CTRL(i));
1034 }
1035 }
1036
1037 static int __devinit f71805f_probe(struct platform_device *pdev)
1038 {
1039 struct f71805f_data *data;
1040 struct resource *res;
1041 int i, err;
1042
1043 if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
1044 err = -ENOMEM;
1045 printk(KERN_ERR DRVNAME ": Out of memory\n");
1046 goto exit;
1047 }
1048
1049 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1050 data->addr = res->start;
1051 mutex_init(&data->lock);
1052 data->name = "f71805f";
1053 mutex_init(&data->update_lock);
1054
1055 platform_set_drvdata(pdev, data);
1056
1057 /* Initialize the F71805F chip */
1058 f71805f_init_device(data);
1059
1060 /* Register sysfs interface files */
1061 if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group)))
1062 goto exit_free;
1063 for (i = 0; i < 3; i++) {
1064 if (data->fan_ctrl[i] & FAN_CTRL_SKIP)
1065 continue;
1066 if ((err = sysfs_create_group(&pdev->dev.kobj,
1067 &f71805f_group_fan[i])))
1068 goto exit_remove_files;
1069 /* If control mode is PWM, create pwm_freq file */
1070 if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
1071 if ((err = sysfs_create_file(&pdev->dev.kobj,
1072 f71805f_attributes_pwm_freq[i])))
1073 goto exit_remove_files;
1074 }
1075 /* If PWM is in manual mode, add write permission */
1076 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
1077 if ((err = sysfs_chmod_file(&pdev->dev.kobj,
1078 f71805f_attr_pwm[i],
1079 S_IRUGO | S_IWUSR))) {
1080 dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
1081 i + 1);
1082 goto exit_remove_files;
1083 }
1084 }
1085 }
1086
1087 data->class_dev = hwmon_device_register(&pdev->dev);
1088 if (IS_ERR(data->class_dev)) {
1089 err = PTR_ERR(data->class_dev);
1090 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1091 goto exit_remove_files;
1092 }
1093
1094 return 0;
1095
1096 exit_remove_files:
1097 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1098 for (i = 0; i < 3; i++)
1099 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
1100 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1101 exit_free:
1102 platform_set_drvdata(pdev, NULL);
1103 kfree(data);
1104 exit:
1105 return err;
1106 }
1107
1108 static int __devexit f71805f_remove(struct platform_device *pdev)
1109 {
1110 struct f71805f_data *data = platform_get_drvdata(pdev);
1111 int i;
1112
1113 platform_set_drvdata(pdev, NULL);
1114 hwmon_device_unregister(data->class_dev);
1115 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1116 for (i = 0; i < 3; i++)
1117 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
1118 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1119 kfree(data);
1120
1121 return 0;
1122 }
1123
1124 static struct platform_driver f71805f_driver = {
1125 .driver = {
1126 .owner = THIS_MODULE,
1127 .name = DRVNAME,
1128 },
1129 .probe = f71805f_probe,
1130 .remove = __devexit_p(f71805f_remove),
1131 };
1132
1133 static int __init f71805f_device_add(unsigned short address)
1134 {
1135 struct resource res = {
1136 .start = address,
1137 .end = address + REGION_LENGTH - 1,
1138 .flags = IORESOURCE_IO,
1139 };
1140 int err;
1141
1142 pdev = platform_device_alloc(DRVNAME, address);
1143 if (!pdev) {
1144 err = -ENOMEM;
1145 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1146 goto exit;
1147 }
1148
1149 res.name = pdev->name;
1150 err = platform_device_add_resources(pdev, &res, 1);
1151 if (err) {
1152 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1153 "(%d)\n", err);
1154 goto exit_device_put;
1155 }
1156
1157 err = platform_device_add(pdev);
1158 if (err) {
1159 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1160 err);
1161 goto exit_device_put;
1162 }
1163
1164 return 0;
1165
1166 exit_device_put:
1167 platform_device_put(pdev);
1168 exit:
1169 return err;
1170 }
1171
1172 static int __init f71805f_find(int sioaddr, unsigned short *address)
1173 {
1174 int err = -ENODEV;
1175 u16 devid;
1176
1177 superio_enter(sioaddr);
1178
1179 devid = superio_inw(sioaddr, SIO_REG_MANID);
1180 if (devid != SIO_FINTEK_ID)
1181 goto exit;
1182
1183 devid = superio_inw(sioaddr, SIO_REG_DEVID);
1184 if (devid != SIO_F71805F_ID) {
1185 printk(KERN_INFO DRVNAME ": Unsupported Fintek device, "
1186 "skipping\n");
1187 goto exit;
1188 }
1189
1190 superio_select(sioaddr, F71805F_LD_HWM);
1191 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
1192 printk(KERN_WARNING DRVNAME ": Device not activated, "
1193 "skipping\n");
1194 goto exit;
1195 }
1196
1197 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1198 if (*address == 0) {
1199 printk(KERN_WARNING DRVNAME ": Base address not set, "
1200 "skipping\n");
1201 goto exit;
1202 }
1203
1204 err = 0;
1205 printk(KERN_INFO DRVNAME ": Found F71805F chip at %#x, revision %u\n",
1206 *address, superio_inb(sioaddr, SIO_REG_DEVREV));
1207
1208 exit:
1209 superio_exit(sioaddr);
1210 return err;
1211 }
1212
1213 static int __init f71805f_init(void)
1214 {
1215 int err;
1216 unsigned short address;
1217
1218 if (f71805f_find(0x2e, &address)
1219 && f71805f_find(0x4e, &address))
1220 return -ENODEV;
1221
1222 err = platform_driver_register(&f71805f_driver);
1223 if (err)
1224 goto exit;
1225
1226 /* Sets global pdev as a side effect */
1227 err = f71805f_device_add(address);
1228 if (err)
1229 goto exit_driver;
1230
1231 return 0;
1232
1233 exit_driver:
1234 platform_driver_unregister(&f71805f_driver);
1235 exit:
1236 return err;
1237 }
1238
1239 static void __exit f71805f_exit(void)
1240 {
1241 platform_device_unregister(pdev);
1242 platform_driver_unregister(&f71805f_driver);
1243 }
1244
1245 MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
1246 MODULE_LICENSE("GPL");
1247 MODULE_DESCRIPTION("F71805F hardware monitoring driver");
1248
1249 module_init(f71805f_init);
1250 module_exit(f71805f_exit);
Linux kernel - Deliverables
This page took 0.08366 seconds and 6 git commands to generate.