drivers/hwmon/fam15h_power.c

   1 /*
   2  * fam15h_power.c - AMD Family 15h processor power monitoring
   3  *
   4  * Copyright (c) 2011 Advanced Micro Devices, Inc.
   5  * Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
   6  *
   7  *
   8  * This driver is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This driver is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  15  * See the GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <linux/err.h>
  22 #include <linux/hwmon.h>
  23 #include <linux/hwmon-sysfs.h>
  24 #include <linux/init.h>
  25 #include <linux/module.h>
  26 #include <linux/pci.h>
  27 #include <linux/bitops.h>
  28 #include <asm/processor.h>
  29 #include <asm/msr.h>
  30
  31 MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
  32 MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
  33 MODULE_LICENSE("GPL");
  34
  35 /* D18F3 */
  36 #define REG_NORTHBRIDGE_CAP             0xe8
  37
  38 /* D18F4 */
  39 #define REG_PROCESSOR_TDP               0x1b8
  40
  41 /* D18F5 */
  42 #define REG_TDP_RUNNING_AVERAGE         0xe0
  43 #define REG_TDP_LIMIT3                  0xe8
  44
  45 #define FAM15H_MIN_NUM_ATTRS            2
  46 #define FAM15H_NUM_GROUPS               2
  47
  48 #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
  49
  50 #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4
  51
  52 struct fam15h_power_data {
  53         struct pci_dev *pdev;
  54         unsigned int tdp_to_watts;
  55         unsigned int base_tdp;
  56         unsigned int processor_pwr_watts;
  57         unsigned int cpu_pwr_sample_ratio;
  58         const struct attribute_group *groups[FAM15H_NUM_GROUPS];
  59         struct attribute_group group;
  60         /* maximum accumulated power of a compute unit */
  61         u64 max_cu_acc_power;
  62 };
  63
  64 static ssize_t show_power(struct device *dev,
  65                           struct device_attribute *attr, char *buf)
  66 {
  67         u32 val, tdp_limit, running_avg_range;
  68         s32 running_avg_capture;
  69         u64 curr_pwr_watts;
  70         struct fam15h_power_data *data = dev_get_drvdata(dev);
  71         struct pci_dev *f4 = data->pdev;
  72
  73         pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
  74                                   REG_TDP_RUNNING_AVERAGE, &val);
  75
  76         /*
  77          * On Carrizo and later platforms, TdpRunAvgAccCap bit field
  78          * is extended to 4:31 from 4:25.
  79          */
  80         if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60) {
  81                 running_avg_capture = val >> 4;
  82                 running_avg_capture = sign_extend32(running_avg_capture, 27);
  83         } else {
  84                 running_avg_capture = (val >> 4) & 0x3fffff;
  85                 running_avg_capture = sign_extend32(running_avg_capture, 21);
  86         }
  87
  88         running_avg_range = (val & 0xf) + 1;
  89
  90         pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
  91                                   REG_TDP_LIMIT3, &val);
  92
  93         tdp_limit = val >> 16;
  94         curr_pwr_watts = ((u64)(tdp_limit +
  95                                 data->base_tdp)) << running_avg_range;
  96         curr_pwr_watts -= running_avg_capture;
  97         curr_pwr_watts *= data->tdp_to_watts;
  98
  99         /*
 100          * Convert to microWatt
 101          *
 102          * power is in Watt provided as fixed point integer with
 103          * scaling factor 1/(2^16).  For conversion we use
 104          * (10^6)/(2^16) = 15625/(2^10)
 105          */
 106         curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
 107         return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
 108 }
 109 static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
 110
 111 static ssize_t show_power_crit(struct device *dev,
 112                                struct device_attribute *attr, char *buf)
 113 {
 114         struct fam15h_power_data *data = dev_get_drvdata(dev);
 115
 116         return sprintf(buf, "%u\n", data->processor_pwr_watts);
 117 }
 118 static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
 119
 120 static int fam15h_power_init_attrs(struct pci_dev *pdev,
 121                                    struct fam15h_power_data *data)
 122 {
 123         int n = FAM15H_MIN_NUM_ATTRS;
 124         struct attribute **fam15h_power_attrs;
 125         struct cpuinfo_x86 *c = &boot_cpu_data;
 126
 127         if (c->x86 == 0x15 &&
 128             (c->x86_model <= 0xf ||
 129              (c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
 130                 n += 1;
 131
 132         fam15h_power_attrs = devm_kcalloc(&pdev->dev, n,
 133                                           sizeof(*fam15h_power_attrs),
 134                                           GFP_KERNEL);
 135
 136         if (!fam15h_power_attrs)
 137                 return -ENOMEM;
 138
 139         n = 0;
 140         fam15h_power_attrs[n++] = &dev_attr_power1_crit.attr;
 141         if (c->x86 == 0x15 &&
 142             (c->x86_model <= 0xf ||
 143              (c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
 144                 fam15h_power_attrs[n++] = &dev_attr_power1_input.attr;
 145
 146         data->group.attrs = fam15h_power_attrs;
 147
 148         return 0;
 149 }
 150
 151 static bool should_load_on_this_node(struct pci_dev *f4)
 152 {
 153         u32 val;
 154
 155         pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
 156                                   REG_NORTHBRIDGE_CAP, &val);
 157         if ((val & BIT(29)) && ((val >> 30) & 3))
 158                 return false;
 159
 160         return true;
 161 }
 162
 163 /*
 164  * Newer BKDG versions have an updated recommendation on how to properly
 165  * initialize the running average range (was: 0xE, now: 0x9). This avoids
 166  * counter saturations resulting in bogus power readings.
 167  * We correct this value ourselves to cope with older BIOSes.
 168  */
 169 static const struct pci_device_id affected_device[] = {
 170         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
 171         { 0 }
 172 };
 173
 174 static void tweak_runavg_range(struct pci_dev *pdev)
 175 {
 176         u32 val;
 177
 178         /*
 179          * let this quirk apply only to the current version of the
 180          * northbridge, since future versions may change the behavior
 181          */
 182         if (!pci_match_id(affected_device, pdev))
 183                 return;
 184
 185         pci_bus_read_config_dword(pdev->bus,
 186                 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
 187                 REG_TDP_RUNNING_AVERAGE, &val);
 188         if ((val & 0xf) != 0xe)
 189                 return;
 190
 191         val &= ~0xf;
 192         val |=  0x9;
 193         pci_bus_write_config_dword(pdev->bus,
 194                 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
 195                 REG_TDP_RUNNING_AVERAGE, val);
 196 }
 197
 198 #ifdef CONFIG_PM
 199 static int fam15h_power_resume(struct pci_dev *pdev)
 200 {
 201         tweak_runavg_range(pdev);
 202         return 0;
 203 }
 204 #else
 205 #define fam15h_power_resume NULL
 206 #endif
 207
 208 static int fam15h_power_init_data(struct pci_dev *f4,
 209                                   struct fam15h_power_data *data)
 210 {
 211         u32 val, eax, ebx, ecx, edx;
 212         u64 tmp;
 213         int ret;
 214
 215         pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
 216         data->base_tdp = val >> 16;
 217         tmp = val & 0xffff;
 218
 219         pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
 220                                   REG_TDP_LIMIT3, &val);
 221
 222         data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
 223         tmp *= data->tdp_to_watts;
 224
 225         /* result not allowed to be >= 256W */
 226         if ((tmp >> 16) >= 256)
 227                 dev_warn(&f4->dev,
 228                          "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
 229                          (unsigned int) (tmp >> 16));
 230
 231         /* convert to microWatt */
 232         data->processor_pwr_watts = (tmp * 15625) >> 10;
 233
 234         ret = fam15h_power_init_attrs(f4, data);
 235         if (ret)
 236                 return ret;
 237
 238         cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
 239
 240         /* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */
 241         if (!(edx & BIT(12)))
 242                 return 0;
 243
 244         /*
 245          * determine the ratio of the compute unit power accumulator
 246          * sample period to the PTSC counter period by executing CPUID
 247          * Fn8000_0007:ECX
 248          */
 249         data->cpu_pwr_sample_ratio = ecx;
 250
 251         if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &tmp)) {
 252                 pr_err("Failed to read max compute unit power accumulator MSR\n");
 253                 return -ENODEV;
 254         }
 255
 256         data->max_cu_acc_power = tmp;
 257
 258         return 0;
 259 }
 260
 261 static int fam15h_power_probe(struct pci_dev *pdev,
 262                               const struct pci_device_id *id)
 263 {
 264         struct fam15h_power_data *data;
 265         struct device *dev = &pdev->dev;
 266         struct device *hwmon_dev;
 267         int ret;
 268
 269         /*
 270          * though we ignore every other northbridge, we still have to
 271          * do the tweaking on _each_ node in MCM processors as the counters
 272          * are working hand-in-hand
 273          */
 274         tweak_runavg_range(pdev);
 275
 276         if (!should_load_on_this_node(pdev))
 277                 return -ENODEV;
 278
 279         data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
 280         if (!data)
 281                 return -ENOMEM;
 282
 283         ret = fam15h_power_init_data(pdev, data);
 284         if (ret)
 285                 return ret;
 286
 287         data->pdev = pdev;
 288
 289         data->groups[0] = &data->group;
 290
 291         hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
 292                                                            data,
 293                                                            &data->groups[0]);
 294         return PTR_ERR_OR_ZERO(hwmon_dev);
 295 }
 296
 297 static const struct pci_device_id fam15h_power_id_table[] = {
 298         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
 299         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
 300         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
 301         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M70H_NB_F4) },
 302         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
 303         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
 304         {}
 305 };
 306 MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
 307
 308 static struct pci_driver fam15h_power_driver = {
 309         .name = "fam15h_power",
 310         .id_table = fam15h_power_id_table,
 311         .probe = fam15h_power_probe,
 312         .resume = fam15h_power_resume,
 313 };
 314
 315 module_pci_driver(fam15h_power_driver);