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Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / hwmon / it87.c
1 /*
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8620E Super I/O chip w/LPC interface
15 * IT8623E Super I/O chip w/LPC interface
16 * IT8705F Super I/O chip w/LPC interface
17 * IT8712F Super I/O chip w/LPC interface
18 * IT8716F Super I/O chip w/LPC interface
19 * IT8718F Super I/O chip w/LPC interface
20 * IT8720F Super I/O chip w/LPC interface
21 * IT8721F Super I/O chip w/LPC interface
22 * IT8726F Super I/O chip w/LPC interface
23 * IT8728F Super I/O chip w/LPC interface
24 * IT8758E Super I/O chip w/LPC interface
25 * IT8771E Super I/O chip w/LPC interface
26 * IT8772E Super I/O chip w/LPC interface
27 * IT8781F Super I/O chip w/LPC interface
28 * IT8782F Super I/O chip w/LPC interface
29 * IT8783E/F Super I/O chip w/LPC interface
30 * IT8786E Super I/O chip w/LPC interface
31 * IT8790E Super I/O chip w/LPC interface
32 * Sis950 A clone of the IT8705F
33 *
34 * Copyright (C) 2001 Chris Gauthron
35 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
36 *
37 * This program is free software; you can redistribute it and/or modify
38 * it under the terms of the GNU General Public License as published by
39 * the Free Software Foundation; either version 2 of the License, or
40 * (at your option) any later version.
41 *
42 * This program is distributed in the hope that it will be useful,
43 * but WITHOUT ANY WARRANTY; without even the implied warranty of
44 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
45 * GNU General Public License for more details.
46 *
47 * You should have received a copy of the GNU General Public License
48 * along with this program; if not, write to the Free Software
49 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
50 */
51
52 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
53
54 #include <linux/module.h>
55 #include <linux/init.h>
56 #include <linux/slab.h>
57 #include <linux/jiffies.h>
58 #include <linux/platform_device.h>
59 #include <linux/hwmon.h>
60 #include <linux/hwmon-sysfs.h>
61 #include <linux/hwmon-vid.h>
62 #include <linux/err.h>
63 #include <linux/mutex.h>
64 #include <linux/sysfs.h>
65 #include <linux/string.h>
66 #include <linux/dmi.h>
67 #include <linux/acpi.h>
68 #include <linux/io.h>
69
70 #define DRVNAME "it87"
71
72 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771,
73 it8772, it8781, it8782, it8783, it8786, it8790, it8603, it8620 };
74
75 static unsigned short force_id;
76 module_param(force_id, ushort, 0);
77 MODULE_PARM_DESC(force_id, "Override the detected device ID");
78
79 static struct platform_device *pdev;
80
81 #define REG 0x2e /* The register to read/write */
82 #define DEV 0x07 /* Register: Logical device select */
83 #define VAL 0x2f /* The value to read/write */
84 #define PME 0x04 /* The device with the fan registers in it */
85
86 /* The device with the IT8718F/IT8720F VID value in it */
87 #define GPIO 0x07
88
89 #define DEVID 0x20 /* Register: Device ID */
90 #define DEVREV 0x22 /* Register: Device Revision */
91
92 static inline int superio_inb(int reg)
93 {
94 outb(reg, REG);
95 return inb(VAL);
96 }
97
98 static inline void superio_outb(int reg, int val)
99 {
100 outb(reg, REG);
101 outb(val, VAL);
102 }
103
104 static int superio_inw(int reg)
105 {
106 int val;
107 outb(reg++, REG);
108 val = inb(VAL) << 8;
109 outb(reg, REG);
110 val |= inb(VAL);
111 return val;
112 }
113
114 static inline void superio_select(int ldn)
115 {
116 outb(DEV, REG);
117 outb(ldn, VAL);
118 }
119
120 static inline int superio_enter(void)
121 {
122 /*
123 * Try to reserve REG and REG + 1 for exclusive access.
124 */
125 if (!request_muxed_region(REG, 2, DRVNAME))
126 return -EBUSY;
127
128 outb(0x87, REG);
129 outb(0x01, REG);
130 outb(0x55, REG);
131 outb(0x55, REG);
132 return 0;
133 }
134
135 static inline void superio_exit(void)
136 {
137 outb(0x02, REG);
138 outb(0x02, VAL);
139 release_region(REG, 2);
140 }
141
142 /* Logical device 4 registers */
143 #define IT8712F_DEVID 0x8712
144 #define IT8705F_DEVID 0x8705
145 #define IT8716F_DEVID 0x8716
146 #define IT8718F_DEVID 0x8718
147 #define IT8720F_DEVID 0x8720
148 #define IT8721F_DEVID 0x8721
149 #define IT8726F_DEVID 0x8726
150 #define IT8728F_DEVID 0x8728
151 #define IT8771E_DEVID 0x8771
152 #define IT8772E_DEVID 0x8772
153 #define IT8781F_DEVID 0x8781
154 #define IT8782F_DEVID 0x8782
155 #define IT8783E_DEVID 0x8783
156 #define IT8786E_DEVID 0x8786
157 #define IT8790E_DEVID 0x8790
158 #define IT8603E_DEVID 0x8603
159 #define IT8620E_DEVID 0x8620
160 #define IT8623E_DEVID 0x8623
161 #define IT87_ACT_REG 0x30
162 #define IT87_BASE_REG 0x60
163
164 /* Logical device 7 registers (IT8712F and later) */
165 #define IT87_SIO_GPIO1_REG 0x25
166 #define IT87_SIO_GPIO2_REG 0x26
167 #define IT87_SIO_GPIO3_REG 0x27
168 #define IT87_SIO_GPIO5_REG 0x29
169 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
170 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
171 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
172 #define IT87_SIO_VID_REG 0xfc /* VID value */
173 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
174
175 /* Update battery voltage after every reading if true */
176 static bool update_vbat;
177
178 /* Not all BIOSes properly configure the PWM registers */
179 static bool fix_pwm_polarity;
180
181 /* Many IT87 constants specified below */
182
183 /* Length of ISA address segment */
184 #define IT87_EXTENT 8
185
186 /* Length of ISA address segment for Environmental Controller */
187 #define IT87_EC_EXTENT 2
188
189 /* Offset of EC registers from ISA base address */
190 #define IT87_EC_OFFSET 5
191
192 /* Where are the ISA address/data registers relative to the EC base address */
193 #define IT87_ADDR_REG_OFFSET 0
194 #define IT87_DATA_REG_OFFSET 1
195
196 /*----- The IT87 registers -----*/
197
198 #define IT87_REG_CONFIG 0x00
199
200 #define IT87_REG_ALARM1 0x01
201 #define IT87_REG_ALARM2 0x02
202 #define IT87_REG_ALARM3 0x03
203
204 /*
205 * The IT8718F and IT8720F have the VID value in a different register, in
206 * Super-I/O configuration space.
207 */
208 #define IT87_REG_VID 0x0a
209 /*
210 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
211 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
212 * mode.
213 */
214 #define IT87_REG_FAN_DIV 0x0b
215 #define IT87_REG_FAN_16BIT 0x0c
216
217 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
218
219 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
220 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
221 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
222 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
223 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
224
225 #define IT87_REG_FAN_MAIN_CTRL 0x13
226 #define IT87_REG_FAN_CTL 0x14
227 #define IT87_REG_PWM(nr) (0x15 + (nr))
228 #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
229
230 #define IT87_REG_VIN(nr) (0x20 + (nr))
231 #define IT87_REG_TEMP(nr) (0x29 + (nr))
232
233 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
234 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
235 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
236 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
237
238 #define IT87_REG_VIN_ENABLE 0x50
239 #define IT87_REG_TEMP_ENABLE 0x51
240 #define IT87_REG_TEMP_EXTRA 0x55
241 #define IT87_REG_BEEP_ENABLE 0x5c
242
243 #define IT87_REG_CHIPID 0x58
244
245 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
246 #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
247
248 struct it87_devices {
249 const char *name;
250 const char * const suffix;
251 u16 features;
252 u8 peci_mask;
253 u8 old_peci_mask;
254 };
255
256 #define FEAT_12MV_ADC (1 << 0)
257 #define FEAT_NEWER_AUTOPWM (1 << 1)
258 #define FEAT_OLD_AUTOPWM (1 << 2)
259 #define FEAT_16BIT_FANS (1 << 3)
260 #define FEAT_TEMP_OFFSET (1 << 4)
261 #define FEAT_TEMP_PECI (1 << 5)
262 #define FEAT_TEMP_OLD_PECI (1 << 6)
263 #define FEAT_FAN16_CONFIG (1 << 7) /* Need to enable 16-bit fans */
264 #define FEAT_FIVE_FANS (1 << 8) /* Supports five fans */
265 #define FEAT_VID (1 << 9) /* Set if chip supports VID */
266 #define FEAT_IN7_INTERNAL (1 << 10) /* Set if in7 is internal */
267 #define FEAT_SIX_FANS (1 << 11) /* Supports six fans */
268
269 static const struct it87_devices it87_devices[] = {
270 [it87] = {
271 .name = "it87",
272 .suffix = "F",
273 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
274 },
275 [it8712] = {
276 .name = "it8712",
277 .suffix = "F",
278 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
279 /* may need to overwrite */
280 },
281 [it8716] = {
282 .name = "it8716",
283 .suffix = "F",
284 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
285 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
286 },
287 [it8718] = {
288 .name = "it8718",
289 .suffix = "F",
290 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
291 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
292 .old_peci_mask = 0x4,
293 },
294 [it8720] = {
295 .name = "it8720",
296 .suffix = "F",
297 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
298 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
299 .old_peci_mask = 0x4,
300 },
301 [it8721] = {
302 .name = "it8721",
303 .suffix = "F",
304 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
305 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
306 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL,
307 .peci_mask = 0x05,
308 .old_peci_mask = 0x02, /* Actually reports PCH */
309 },
310 [it8728] = {
311 .name = "it8728",
312 .suffix = "F",
313 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
314 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
315 | FEAT_IN7_INTERNAL,
316 .peci_mask = 0x07,
317 },
318 [it8771] = {
319 .name = "it8771",
320 .suffix = "E",
321 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
322 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
323 /* PECI: guesswork */
324 /* 12mV ADC (OHM) */
325 /* 16 bit fans (OHM) */
326 /* three fans, always 16 bit (guesswork) */
327 .peci_mask = 0x07,
328 },
329 [it8772] = {
330 .name = "it8772",
331 .suffix = "E",
332 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
333 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
334 /* PECI (coreboot) */
335 /* 12mV ADC (HWSensors4, OHM) */
336 /* 16 bit fans (HWSensors4, OHM) */
337 /* three fans, always 16 bit (datasheet) */
338 .peci_mask = 0x07,
339 },
340 [it8781] = {
341 .name = "it8781",
342 .suffix = "F",
343 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
344 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
345 .old_peci_mask = 0x4,
346 },
347 [it8782] = {
348 .name = "it8782",
349 .suffix = "F",
350 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
351 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
352 .old_peci_mask = 0x4,
353 },
354 [it8783] = {
355 .name = "it8783",
356 .suffix = "E/F",
357 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
358 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
359 .old_peci_mask = 0x4,
360 },
361 [it8786] = {
362 .name = "it8786",
363 .suffix = "E",
364 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
365 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
366 .peci_mask = 0x07,
367 },
368 [it8790] = {
369 .name = "it8790",
370 .suffix = "E",
371 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
372 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
373 .peci_mask = 0x07,
374 },
375 [it8603] = {
376 .name = "it8603",
377 .suffix = "E",
378 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
379 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
380 .peci_mask = 0x07,
381 },
382 [it8620] = {
383 .name = "it8620",
384 .suffix = "E",
385 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
386 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
387 | FEAT_IN7_INTERNAL,
388 .peci_mask = 0x07,
389 },
390 };
391
392 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
393 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
394 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
395 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
396 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
397 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
398 ((data)->peci_mask & (1 << nr)))
399 #define has_temp_old_peci(data, nr) \
400 (((data)->features & FEAT_TEMP_OLD_PECI) && \
401 ((data)->old_peci_mask & (1 << nr)))
402 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
403 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
404 FEAT_SIX_FANS))
405 #define has_vid(data) ((data)->features & FEAT_VID)
406 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
407 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
408
409 struct it87_sio_data {
410 enum chips type;
411 /* Values read from Super-I/O config space */
412 u8 revision;
413 u8 vid_value;
414 u8 beep_pin;
415 u8 internal; /* Internal sensors can be labeled */
416 /* Features skipped based on config or DMI */
417 u16 skip_in;
418 u8 skip_vid;
419 u8 skip_fan;
420 u8 skip_pwm;
421 u8 skip_temp;
422 };
423
424 /*
425 * For each registered chip, we need to keep some data in memory.
426 * The structure is dynamically allocated.
427 */
428 struct it87_data {
429 struct device *hwmon_dev;
430 enum chips type;
431 u16 features;
432 u8 peci_mask;
433 u8 old_peci_mask;
434
435 unsigned short addr;
436 const char *name;
437 struct mutex update_lock;
438 char valid; /* !=0 if following fields are valid */
439 unsigned long last_updated; /* In jiffies */
440
441 u16 in_scaled; /* Internal voltage sensors are scaled */
442 u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */
443 u8 has_fan; /* Bitfield, fans enabled */
444 u16 fan[6][2]; /* Register values, [nr][0]=fan, [1]=min */
445 u8 has_temp; /* Bitfield, temp sensors enabled */
446 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
447 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
448 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
449 u8 fan_div[3]; /* Register encoding, shifted right */
450 u8 vid; /* Register encoding, combined */
451 u8 vrm;
452 u32 alarms; /* Register encoding, combined */
453 u8 beeps; /* Register encoding */
454 u8 fan_main_ctrl; /* Register value */
455 u8 fan_ctl; /* Register value */
456
457 /*
458 * The following 3 arrays correspond to the same registers up to
459 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
460 * 7, and we want to preserve settings on mode changes, so we have
461 * to track all values separately.
462 * Starting with the IT8721F, the manual PWM duty cycles are stored
463 * in separate registers (8-bit values), so the separate tracking
464 * is no longer needed, but it is still done to keep the driver
465 * simple.
466 */
467 u8 pwm_ctrl[3]; /* Register value */
468 u8 pwm_duty[3]; /* Manual PWM value set by user */
469 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
470
471 /* Automatic fan speed control registers */
472 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
473 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
474 };
475
476 static int adc_lsb(const struct it87_data *data, int nr)
477 {
478 int lsb = has_12mv_adc(data) ? 12 : 16;
479 if (data->in_scaled & (1 << nr))
480 lsb <<= 1;
481 return lsb;
482 }
483
484 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
485 {
486 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
487 return clamp_val(val, 0, 255);
488 }
489
490 static int in_from_reg(const struct it87_data *data, int nr, int val)
491 {
492 return val * adc_lsb(data, nr);
493 }
494
495 static inline u8 FAN_TO_REG(long rpm, int div)
496 {
497 if (rpm == 0)
498 return 255;
499 rpm = clamp_val(rpm, 1, 1000000);
500 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
501 }
502
503 static inline u16 FAN16_TO_REG(long rpm)
504 {
505 if (rpm == 0)
506 return 0xffff;
507 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
508 }
509
510 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
511 1350000 / ((val) * (div)))
512 /* The divider is fixed to 2 in 16-bit mode */
513 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
514 1350000 / ((val) * 2))
515
516 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
517 ((val) + 500) / 1000), -128, 127))
518 #define TEMP_FROM_REG(val) ((val) * 1000)
519
520 static u8 pwm_to_reg(const struct it87_data *data, long val)
521 {
522 if (has_newer_autopwm(data))
523 return val;
524 else
525 return val >> 1;
526 }
527
528 static int pwm_from_reg(const struct it87_data *data, u8 reg)
529 {
530 if (has_newer_autopwm(data))
531 return reg;
532 else
533 return (reg & 0x7f) << 1;
534 }
535
536
537 static int DIV_TO_REG(int val)
538 {
539 int answer = 0;
540 while (answer < 7 && (val >>= 1))
541 answer++;
542 return answer;
543 }
544 #define DIV_FROM_REG(val) (1 << (val))
545
546 /*
547 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
548 * depending on the chip type, to calculate the actual PWM frequency.
549 *
550 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
551 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
552 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
553 * sometimes just one. It is unknown if this is a datasheet error or real,
554 * so this is ignored for now.
555 */
556 static const unsigned int pwm_freq[8] = {
557 48000000,
558 24000000,
559 12000000,
560 8000000,
561 6000000,
562 3000000,
563 1500000,
564 750000,
565 };
566
567 static int it87_probe(struct platform_device *pdev);
568 static int it87_remove(struct platform_device *pdev);
569
570 static int it87_read_value(struct it87_data *data, u8 reg);
571 static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
572 static struct it87_data *it87_update_device(struct device *dev);
573 static int it87_check_pwm(struct device *dev);
574 static void it87_init_device(struct platform_device *pdev);
575
576
577 static struct platform_driver it87_driver = {
578 .driver = {
579 .name = DRVNAME,
580 },
581 .probe = it87_probe,
582 .remove = it87_remove,
583 };
584
585 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
586 char *buf)
587 {
588 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
589 int nr = sattr->nr;
590 int index = sattr->index;
591
592 struct it87_data *data = it87_update_device(dev);
593 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
594 }
595
596 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
597 const char *buf, size_t count)
598 {
599 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
600 int nr = sattr->nr;
601 int index = sattr->index;
602
603 struct it87_data *data = dev_get_drvdata(dev);
604 unsigned long val;
605
606 if (kstrtoul(buf, 10, &val) < 0)
607 return -EINVAL;
608
609 mutex_lock(&data->update_lock);
610 data->in[nr][index] = in_to_reg(data, nr, val);
611 it87_write_value(data,
612 index == 1 ? IT87_REG_VIN_MIN(nr)
613 : IT87_REG_VIN_MAX(nr),
614 data->in[nr][index]);
615 mutex_unlock(&data->update_lock);
616 return count;
617 }
618
619 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
620 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
621 0, 1);
622 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
623 0, 2);
624
625 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
626 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
627 1, 1);
628 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
629 1, 2);
630
631 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
632 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
633 2, 1);
634 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
635 2, 2);
636
637 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
638 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
639 3, 1);
640 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
641 3, 2);
642
643 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
644 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
645 4, 1);
646 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
647 4, 2);
648
649 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
650 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
651 5, 1);
652 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
653 5, 2);
654
655 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
656 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
657 6, 1);
658 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
659 6, 2);
660
661 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
662 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
663 7, 1);
664 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
665 7, 2);
666
667 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
668 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
669
670 /* 3 temperatures */
671 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
672 char *buf)
673 {
674 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
675 int nr = sattr->nr;
676 int index = sattr->index;
677 struct it87_data *data = it87_update_device(dev);
678
679 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
680 }
681
682 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
683 const char *buf, size_t count)
684 {
685 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
686 int nr = sattr->nr;
687 int index = sattr->index;
688 struct it87_data *data = dev_get_drvdata(dev);
689 long val;
690 u8 reg, regval;
691
692 if (kstrtol(buf, 10, &val) < 0)
693 return -EINVAL;
694
695 mutex_lock(&data->update_lock);
696
697 switch (index) {
698 default:
699 case 1:
700 reg = IT87_REG_TEMP_LOW(nr);
701 break;
702 case 2:
703 reg = IT87_REG_TEMP_HIGH(nr);
704 break;
705 case 3:
706 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
707 if (!(regval & 0x80)) {
708 regval |= 0x80;
709 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
710 }
711 data->valid = 0;
712 reg = IT87_REG_TEMP_OFFSET[nr];
713 break;
714 }
715
716 data->temp[nr][index] = TEMP_TO_REG(val);
717 it87_write_value(data, reg, data->temp[nr][index]);
718 mutex_unlock(&data->update_lock);
719 return count;
720 }
721
722 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
723 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
724 0, 1);
725 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
726 0, 2);
727 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
728 set_temp, 0, 3);
729 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
730 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
731 1, 1);
732 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
733 1, 2);
734 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
735 set_temp, 1, 3);
736 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
737 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
738 2, 1);
739 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
740 2, 2);
741 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
742 set_temp, 2, 3);
743
744 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
745 char *buf)
746 {
747 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
748 int nr = sensor_attr->index;
749 struct it87_data *data = it87_update_device(dev);
750 u8 reg = data->sensor; /* In case value is updated while used */
751 u8 extra = data->extra;
752
753 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
754 || (has_temp_old_peci(data, nr) && (extra & 0x80)))
755 return sprintf(buf, "6\n"); /* Intel PECI */
756 if (reg & (1 << nr))
757 return sprintf(buf, "3\n"); /* thermal diode */
758 if (reg & (8 << nr))
759 return sprintf(buf, "4\n"); /* thermistor */
760 return sprintf(buf, "0\n"); /* disabled */
761 }
762
763 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
764 const char *buf, size_t count)
765 {
766 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
767 int nr = sensor_attr->index;
768
769 struct it87_data *data = dev_get_drvdata(dev);
770 long val;
771 u8 reg, extra;
772
773 if (kstrtol(buf, 10, &val) < 0)
774 return -EINVAL;
775
776 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
777 reg &= ~(1 << nr);
778 reg &= ~(8 << nr);
779 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
780 reg &= 0x3f;
781 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
782 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
783 extra &= 0x7f;
784 if (val == 2) { /* backwards compatibility */
785 dev_warn(dev,
786 "Sensor type 2 is deprecated, please use 4 instead\n");
787 val = 4;
788 }
789 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
790 if (val == 3)
791 reg |= 1 << nr;
792 else if (val == 4)
793 reg |= 8 << nr;
794 else if (has_temp_peci(data, nr) && val == 6)
795 reg |= (nr + 1) << 6;
796 else if (has_temp_old_peci(data, nr) && val == 6)
797 extra |= 0x80;
798 else if (val != 0)
799 return -EINVAL;
800
801 mutex_lock(&data->update_lock);
802 data->sensor = reg;
803 data->extra = extra;
804 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
805 if (has_temp_old_peci(data, nr))
806 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
807 data->valid = 0; /* Force cache refresh */
808 mutex_unlock(&data->update_lock);
809 return count;
810 }
811
812 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
813 set_temp_type, 0);
814 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
815 set_temp_type, 1);
816 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
817 set_temp_type, 2);
818
819 /* 3 Fans */
820
821 static int pwm_mode(const struct it87_data *data, int nr)
822 {
823 int ctrl = data->fan_main_ctrl & (1 << nr);
824
825 if (ctrl == 0 && data->type != it8603) /* Full speed */
826 return 0;
827 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
828 return 2;
829 else /* Manual mode */
830 return 1;
831 }
832
833 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
834 char *buf)
835 {
836 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
837 int nr = sattr->nr;
838 int index = sattr->index;
839 int speed;
840 struct it87_data *data = it87_update_device(dev);
841
842 speed = has_16bit_fans(data) ?
843 FAN16_FROM_REG(data->fan[nr][index]) :
844 FAN_FROM_REG(data->fan[nr][index],
845 DIV_FROM_REG(data->fan_div[nr]));
846 return sprintf(buf, "%d\n", speed);
847 }
848
849 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
850 char *buf)
851 {
852 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
853 int nr = sensor_attr->index;
854
855 struct it87_data *data = it87_update_device(dev);
856 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
857 }
858 static ssize_t show_pwm_enable(struct device *dev,
859 struct device_attribute *attr, char *buf)
860 {
861 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
862 int nr = sensor_attr->index;
863
864 struct it87_data *data = it87_update_device(dev);
865 return sprintf(buf, "%d\n", pwm_mode(data, nr));
866 }
867 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
868 char *buf)
869 {
870 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
871 int nr = sensor_attr->index;
872
873 struct it87_data *data = it87_update_device(dev);
874 return sprintf(buf, "%d\n",
875 pwm_from_reg(data, data->pwm_duty[nr]));
876 }
877 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
878 char *buf)
879 {
880 struct it87_data *data = it87_update_device(dev);
881 int index = (data->fan_ctl >> 4) & 0x07;
882 unsigned int freq;
883
884 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
885
886 return sprintf(buf, "%u\n", freq);
887 }
888
889 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
890 const char *buf, size_t count)
891 {
892 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
893 int nr = sattr->nr;
894 int index = sattr->index;
895
896 struct it87_data *data = dev_get_drvdata(dev);
897 long val;
898 u8 reg;
899
900 if (kstrtol(buf, 10, &val) < 0)
901 return -EINVAL;
902
903 mutex_lock(&data->update_lock);
904
905 if (has_16bit_fans(data)) {
906 data->fan[nr][index] = FAN16_TO_REG(val);
907 it87_write_value(data, IT87_REG_FAN_MIN[nr],
908 data->fan[nr][index] & 0xff);
909 it87_write_value(data, IT87_REG_FANX_MIN[nr],
910 data->fan[nr][index] >> 8);
911 } else {
912 reg = it87_read_value(data, IT87_REG_FAN_DIV);
913 switch (nr) {
914 case 0:
915 data->fan_div[nr] = reg & 0x07;
916 break;
917 case 1:
918 data->fan_div[nr] = (reg >> 3) & 0x07;
919 break;
920 case 2:
921 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
922 break;
923 }
924 data->fan[nr][index] =
925 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
926 it87_write_value(data, IT87_REG_FAN_MIN[nr],
927 data->fan[nr][index]);
928 }
929
930 mutex_unlock(&data->update_lock);
931 return count;
932 }
933
934 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
935 const char *buf, size_t count)
936 {
937 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
938 int nr = sensor_attr->index;
939
940 struct it87_data *data = dev_get_drvdata(dev);
941 unsigned long val;
942 int min;
943 u8 old;
944
945 if (kstrtoul(buf, 10, &val) < 0)
946 return -EINVAL;
947
948 mutex_lock(&data->update_lock);
949 old = it87_read_value(data, IT87_REG_FAN_DIV);
950
951 /* Save fan min limit */
952 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
953
954 switch (nr) {
955 case 0:
956 case 1:
957 data->fan_div[nr] = DIV_TO_REG(val);
958 break;
959 case 2:
960 if (val < 8)
961 data->fan_div[nr] = 1;
962 else
963 data->fan_div[nr] = 3;
964 }
965 val = old & 0x80;
966 val |= (data->fan_div[0] & 0x07);
967 val |= (data->fan_div[1] & 0x07) << 3;
968 if (data->fan_div[2] == 3)
969 val |= 0x1 << 6;
970 it87_write_value(data, IT87_REG_FAN_DIV, val);
971
972 /* Restore fan min limit */
973 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
974 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
975
976 mutex_unlock(&data->update_lock);
977 return count;
978 }
979
980 /* Returns 0 if OK, -EINVAL otherwise */
981 static int check_trip_points(struct device *dev, int nr)
982 {
983 const struct it87_data *data = dev_get_drvdata(dev);
984 int i, err = 0;
985
986 if (has_old_autopwm(data)) {
987 for (i = 0; i < 3; i++) {
988 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
989 err = -EINVAL;
990 }
991 for (i = 0; i < 2; i++) {
992 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
993 err = -EINVAL;
994 }
995 }
996
997 if (err) {
998 dev_err(dev,
999 "Inconsistent trip points, not switching to automatic mode\n");
1000 dev_err(dev, "Adjust the trip points and try again\n");
1001 }
1002 return err;
1003 }
1004
1005 static ssize_t set_pwm_enable(struct device *dev,
1006 struct device_attribute *attr, const char *buf, size_t count)
1007 {
1008 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1009 int nr = sensor_attr->index;
1010
1011 struct it87_data *data = dev_get_drvdata(dev);
1012 long val;
1013
1014 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1015 return -EINVAL;
1016
1017 /* Check trip points before switching to automatic mode */
1018 if (val == 2) {
1019 if (check_trip_points(dev, nr) < 0)
1020 return -EINVAL;
1021 }
1022
1023 /* IT8603E does not have on/off mode */
1024 if (val == 0 && data->type == it8603)
1025 return -EINVAL;
1026
1027 mutex_lock(&data->update_lock);
1028
1029 if (val == 0) {
1030 int tmp;
1031 /* make sure the fan is on when in on/off mode */
1032 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1033 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1034 /* set on/off mode */
1035 data->fan_main_ctrl &= ~(1 << nr);
1036 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1037 data->fan_main_ctrl);
1038 } else {
1039 if (val == 1) /* Manual mode */
1040 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1041 data->pwm_temp_map[nr] :
1042 data->pwm_duty[nr];
1043 else /* Automatic mode */
1044 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1045 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1046
1047 if (data->type != it8603) {
1048 /* set SmartGuardian mode */
1049 data->fan_main_ctrl |= (1 << nr);
1050 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1051 data->fan_main_ctrl);
1052 }
1053 }
1054
1055 mutex_unlock(&data->update_lock);
1056 return count;
1057 }
1058 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1059 const char *buf, size_t count)
1060 {
1061 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1062 int nr = sensor_attr->index;
1063
1064 struct it87_data *data = dev_get_drvdata(dev);
1065 long val;
1066
1067 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1068 return -EINVAL;
1069
1070 mutex_lock(&data->update_lock);
1071 if (has_newer_autopwm(data)) {
1072 /*
1073 * If we are in automatic mode, the PWM duty cycle register
1074 * is read-only so we can't write the value.
1075 */
1076 if (data->pwm_ctrl[nr] & 0x80) {
1077 mutex_unlock(&data->update_lock);
1078 return -EBUSY;
1079 }
1080 data->pwm_duty[nr] = pwm_to_reg(data, val);
1081 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
1082 data->pwm_duty[nr]);
1083 } else {
1084 data->pwm_duty[nr] = pwm_to_reg(data, val);
1085 /*
1086 * If we are in manual mode, write the duty cycle immediately;
1087 * otherwise, just store it for later use.
1088 */
1089 if (!(data->pwm_ctrl[nr] & 0x80)) {
1090 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1091 it87_write_value(data, IT87_REG_PWM(nr),
1092 data->pwm_ctrl[nr]);
1093 }
1094 }
1095 mutex_unlock(&data->update_lock);
1096 return count;
1097 }
1098 static ssize_t set_pwm_freq(struct device *dev,
1099 struct device_attribute *attr, const char *buf, size_t count)
1100 {
1101 struct it87_data *data = dev_get_drvdata(dev);
1102 unsigned long val;
1103 int i;
1104
1105 if (kstrtoul(buf, 10, &val) < 0)
1106 return -EINVAL;
1107
1108 val = clamp_val(val, 0, 1000000);
1109 val *= has_newer_autopwm(data) ? 256 : 128;
1110
1111 /* Search for the nearest available frequency */
1112 for (i = 0; i < 7; i++) {
1113 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
1114 break;
1115 }
1116
1117 mutex_lock(&data->update_lock);
1118 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1119 data->fan_ctl |= i << 4;
1120 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1121 mutex_unlock(&data->update_lock);
1122
1123 return count;
1124 }
1125 static ssize_t show_pwm_temp_map(struct device *dev,
1126 struct device_attribute *attr, char *buf)
1127 {
1128 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1129 int nr = sensor_attr->index;
1130
1131 struct it87_data *data = it87_update_device(dev);
1132 int map;
1133
1134 if (data->pwm_temp_map[nr] < 3)
1135 map = 1 << data->pwm_temp_map[nr];
1136 else
1137 map = 0; /* Should never happen */
1138 return sprintf(buf, "%d\n", map);
1139 }
1140 static ssize_t set_pwm_temp_map(struct device *dev,
1141 struct device_attribute *attr, const char *buf, size_t count)
1142 {
1143 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1144 int nr = sensor_attr->index;
1145
1146 struct it87_data *data = dev_get_drvdata(dev);
1147 long val;
1148 u8 reg;
1149
1150 /*
1151 * This check can go away if we ever support automatic fan speed
1152 * control on newer chips.
1153 */
1154 if (!has_old_autopwm(data)) {
1155 dev_notice(dev, "Mapping change disabled for safety reasons\n");
1156 return -EINVAL;
1157 }
1158
1159 if (kstrtol(buf, 10, &val) < 0)
1160 return -EINVAL;
1161
1162 switch (val) {
1163 case (1 << 0):
1164 reg = 0x00;
1165 break;
1166 case (1 << 1):
1167 reg = 0x01;
1168 break;
1169 case (1 << 2):
1170 reg = 0x02;
1171 break;
1172 default:
1173 return -EINVAL;
1174 }
1175
1176 mutex_lock(&data->update_lock);
1177 data->pwm_temp_map[nr] = reg;
1178 /*
1179 * If we are in automatic mode, write the temp mapping immediately;
1180 * otherwise, just store it for later use.
1181 */
1182 if (data->pwm_ctrl[nr] & 0x80) {
1183 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1184 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1185 }
1186 mutex_unlock(&data->update_lock);
1187 return count;
1188 }
1189
1190 static ssize_t show_auto_pwm(struct device *dev,
1191 struct device_attribute *attr, char *buf)
1192 {
1193 struct it87_data *data = it87_update_device(dev);
1194 struct sensor_device_attribute_2 *sensor_attr =
1195 to_sensor_dev_attr_2(attr);
1196 int nr = sensor_attr->nr;
1197 int point = sensor_attr->index;
1198
1199 return sprintf(buf, "%d\n",
1200 pwm_from_reg(data, data->auto_pwm[nr][point]));
1201 }
1202
1203 static ssize_t set_auto_pwm(struct device *dev,
1204 struct device_attribute *attr, const char *buf, size_t count)
1205 {
1206 struct it87_data *data = dev_get_drvdata(dev);
1207 struct sensor_device_attribute_2 *sensor_attr =
1208 to_sensor_dev_attr_2(attr);
1209 int nr = sensor_attr->nr;
1210 int point = sensor_attr->index;
1211 long val;
1212
1213 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1214 return -EINVAL;
1215
1216 mutex_lock(&data->update_lock);
1217 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1218 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1219 data->auto_pwm[nr][point]);
1220 mutex_unlock(&data->update_lock);
1221 return count;
1222 }
1223
1224 static ssize_t show_auto_temp(struct device *dev,
1225 struct device_attribute *attr, char *buf)
1226 {
1227 struct it87_data *data = it87_update_device(dev);
1228 struct sensor_device_attribute_2 *sensor_attr =
1229 to_sensor_dev_attr_2(attr);
1230 int nr = sensor_attr->nr;
1231 int point = sensor_attr->index;
1232
1233 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1234 }
1235
1236 static ssize_t set_auto_temp(struct device *dev,
1237 struct device_attribute *attr, const char *buf, size_t count)
1238 {
1239 struct it87_data *data = dev_get_drvdata(dev);
1240 struct sensor_device_attribute_2 *sensor_attr =
1241 to_sensor_dev_attr_2(attr);
1242 int nr = sensor_attr->nr;
1243 int point = sensor_attr->index;
1244 long val;
1245
1246 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1247 return -EINVAL;
1248
1249 mutex_lock(&data->update_lock);
1250 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1251 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1252 data->auto_temp[nr][point]);
1253 mutex_unlock(&data->update_lock);
1254 return count;
1255 }
1256
1257 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1258 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1259 0, 1);
1260 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1261 set_fan_div, 0);
1262
1263 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1264 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1265 1, 1);
1266 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1267 set_fan_div, 1);
1268
1269 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1270 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1271 2, 1);
1272 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1273 set_fan_div, 2);
1274
1275 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1276 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1277 3, 1);
1278
1279 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1280 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1281 4, 1);
1282
1283 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1284 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1285 5, 1);
1286
1287 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1288 show_pwm_enable, set_pwm_enable, 0);
1289 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1290 static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1291 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1292 show_pwm_temp_map, set_pwm_temp_map, 0);
1293 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1294 show_auto_pwm, set_auto_pwm, 0, 0);
1295 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1296 show_auto_pwm, set_auto_pwm, 0, 1);
1297 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1298 show_auto_pwm, set_auto_pwm, 0, 2);
1299 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1300 show_auto_pwm, NULL, 0, 3);
1301 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1302 show_auto_temp, set_auto_temp, 0, 1);
1303 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1304 show_auto_temp, set_auto_temp, 0, 0);
1305 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1306 show_auto_temp, set_auto_temp, 0, 2);
1307 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1308 show_auto_temp, set_auto_temp, 0, 3);
1309 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1310 show_auto_temp, set_auto_temp, 0, 4);
1311
1312 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1313 show_pwm_enable, set_pwm_enable, 1);
1314 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1315 static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL);
1316 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1317 show_pwm_temp_map, set_pwm_temp_map, 1);
1318 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1319 show_auto_pwm, set_auto_pwm, 1, 0);
1320 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1321 show_auto_pwm, set_auto_pwm, 1, 1);
1322 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1323 show_auto_pwm, set_auto_pwm, 1, 2);
1324 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1325 show_auto_pwm, NULL, 1, 3);
1326 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1327 show_auto_temp, set_auto_temp, 1, 1);
1328 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1329 show_auto_temp, set_auto_temp, 1, 0);
1330 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1331 show_auto_temp, set_auto_temp, 1, 2);
1332 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1333 show_auto_temp, set_auto_temp, 1, 3);
1334 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1335 show_auto_temp, set_auto_temp, 1, 4);
1336
1337 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1338 show_pwm_enable, set_pwm_enable, 2);
1339 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1340 static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL);
1341 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1342 show_pwm_temp_map, set_pwm_temp_map, 2);
1343 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1344 show_auto_pwm, set_auto_pwm, 2, 0);
1345 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1346 show_auto_pwm, set_auto_pwm, 2, 1);
1347 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1348 show_auto_pwm, set_auto_pwm, 2, 2);
1349 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1350 show_auto_pwm, NULL, 2, 3);
1351 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1352 show_auto_temp, set_auto_temp, 2, 1);
1353 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1354 show_auto_temp, set_auto_temp, 2, 0);
1355 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1356 show_auto_temp, set_auto_temp, 2, 2);
1357 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1358 show_auto_temp, set_auto_temp, 2, 3);
1359 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1360 show_auto_temp, set_auto_temp, 2, 4);
1361
1362 /* Alarms */
1363 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1364 char *buf)
1365 {
1366 struct it87_data *data = it87_update_device(dev);
1367 return sprintf(buf, "%u\n", data->alarms);
1368 }
1369 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1370
1371 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1372 char *buf)
1373 {
1374 int bitnr = to_sensor_dev_attr(attr)->index;
1375 struct it87_data *data = it87_update_device(dev);
1376 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1377 }
1378
1379 static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1380 *attr, const char *buf, size_t count)
1381 {
1382 struct it87_data *data = dev_get_drvdata(dev);
1383 long val;
1384 int config;
1385
1386 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1387 return -EINVAL;
1388
1389 mutex_lock(&data->update_lock);
1390 config = it87_read_value(data, IT87_REG_CONFIG);
1391 if (config < 0) {
1392 count = config;
1393 } else {
1394 config |= 1 << 5;
1395 it87_write_value(data, IT87_REG_CONFIG, config);
1396 /* Invalidate cache to force re-read */
1397 data->valid = 0;
1398 }
1399 mutex_unlock(&data->update_lock);
1400
1401 return count;
1402 }
1403
1404 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1405 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1406 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1407 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1408 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1409 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1410 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1411 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1412 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1413 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1414 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1415 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1416 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1417 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1418 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1419 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1420 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1421 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1422 show_alarm, clear_intrusion, 4);
1423
1424 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1425 char *buf)
1426 {
1427 int bitnr = to_sensor_dev_attr(attr)->index;
1428 struct it87_data *data = it87_update_device(dev);
1429 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1430 }
1431 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1432 const char *buf, size_t count)
1433 {
1434 int bitnr = to_sensor_dev_attr(attr)->index;
1435 struct it87_data *data = dev_get_drvdata(dev);
1436 long val;
1437
1438 if (kstrtol(buf, 10, &val) < 0
1439 || (val != 0 && val != 1))
1440 return -EINVAL;
1441
1442 mutex_lock(&data->update_lock);
1443 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1444 if (val)
1445 data->beeps |= (1 << bitnr);
1446 else
1447 data->beeps &= ~(1 << bitnr);
1448 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1449 mutex_unlock(&data->update_lock);
1450 return count;
1451 }
1452
1453 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1454 show_beep, set_beep, 1);
1455 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1456 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1457 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1458 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1459 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1460 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1461 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1462 /* fanX_beep writability is set later */
1463 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1464 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1465 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1466 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1467 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1468 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1469 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1470 show_beep, set_beep, 2);
1471 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1472 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1473
1474 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1475 char *buf)
1476 {
1477 struct it87_data *data = dev_get_drvdata(dev);
1478 return sprintf(buf, "%u\n", data->vrm);
1479 }
1480 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1481 const char *buf, size_t count)
1482 {
1483 struct it87_data *data = dev_get_drvdata(dev);
1484 unsigned long val;
1485
1486 if (kstrtoul(buf, 10, &val) < 0)
1487 return -EINVAL;
1488
1489 data->vrm = val;
1490
1491 return count;
1492 }
1493 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1494
1495 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1496 char *buf)
1497 {
1498 struct it87_data *data = it87_update_device(dev);
1499 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1500 }
1501 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1502
1503 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1504 char *buf)
1505 {
1506 static const char * const labels[] = {
1507 "+5V",
1508 "5VSB",
1509 "Vbat",
1510 };
1511 static const char * const labels_it8721[] = {
1512 "+3.3V",
1513 "3VSB",
1514 "Vbat",
1515 };
1516 struct it87_data *data = dev_get_drvdata(dev);
1517 int nr = to_sensor_dev_attr(attr)->index;
1518
1519 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1520 : labels[nr]);
1521 }
1522 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1523 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1524 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1525 /* special AVCC3 IT8603E in9 */
1526 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1527
1528 static ssize_t show_name(struct device *dev, struct device_attribute
1529 *devattr, char *buf)
1530 {
1531 struct it87_data *data = dev_get_drvdata(dev);
1532 return sprintf(buf, "%s\n", data->name);
1533 }
1534 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1535
1536 static struct attribute *it87_attributes_in[10][5] = {
1537 {
1538 &sensor_dev_attr_in0_input.dev_attr.attr,
1539 &sensor_dev_attr_in0_min.dev_attr.attr,
1540 &sensor_dev_attr_in0_max.dev_attr.attr,
1541 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1542 NULL
1543 }, {
1544 &sensor_dev_attr_in1_input.dev_attr.attr,
1545 &sensor_dev_attr_in1_min.dev_attr.attr,
1546 &sensor_dev_attr_in1_max.dev_attr.attr,
1547 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1548 NULL
1549 }, {
1550 &sensor_dev_attr_in2_input.dev_attr.attr,
1551 &sensor_dev_attr_in2_min.dev_attr.attr,
1552 &sensor_dev_attr_in2_max.dev_attr.attr,
1553 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1554 NULL
1555 }, {
1556 &sensor_dev_attr_in3_input.dev_attr.attr,
1557 &sensor_dev_attr_in3_min.dev_attr.attr,
1558 &sensor_dev_attr_in3_max.dev_attr.attr,
1559 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1560 NULL
1561 }, {
1562 &sensor_dev_attr_in4_input.dev_attr.attr,
1563 &sensor_dev_attr_in4_min.dev_attr.attr,
1564 &sensor_dev_attr_in4_max.dev_attr.attr,
1565 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1566 NULL
1567 }, {
1568 &sensor_dev_attr_in5_input.dev_attr.attr,
1569 &sensor_dev_attr_in5_min.dev_attr.attr,
1570 &sensor_dev_attr_in5_max.dev_attr.attr,
1571 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1572 NULL
1573 }, {
1574 &sensor_dev_attr_in6_input.dev_attr.attr,
1575 &sensor_dev_attr_in6_min.dev_attr.attr,
1576 &sensor_dev_attr_in6_max.dev_attr.attr,
1577 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1578 NULL
1579 }, {
1580 &sensor_dev_attr_in7_input.dev_attr.attr,
1581 &sensor_dev_attr_in7_min.dev_attr.attr,
1582 &sensor_dev_attr_in7_max.dev_attr.attr,
1583 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1584 NULL
1585 }, {
1586 &sensor_dev_attr_in8_input.dev_attr.attr,
1587 NULL
1588 }, {
1589 &sensor_dev_attr_in9_input.dev_attr.attr,
1590 NULL
1591 } };
1592
1593 static const struct attribute_group it87_group_in[10] = {
1594 { .attrs = it87_attributes_in[0] },
1595 { .attrs = it87_attributes_in[1] },
1596 { .attrs = it87_attributes_in[2] },
1597 { .attrs = it87_attributes_in[3] },
1598 { .attrs = it87_attributes_in[4] },
1599 { .attrs = it87_attributes_in[5] },
1600 { .attrs = it87_attributes_in[6] },
1601 { .attrs = it87_attributes_in[7] },
1602 { .attrs = it87_attributes_in[8] },
1603 { .attrs = it87_attributes_in[9] },
1604 };
1605
1606 static struct attribute *it87_attributes_temp[3][6] = {
1607 {
1608 &sensor_dev_attr_temp1_input.dev_attr.attr,
1609 &sensor_dev_attr_temp1_max.dev_attr.attr,
1610 &sensor_dev_attr_temp1_min.dev_attr.attr,
1611 &sensor_dev_attr_temp1_type.dev_attr.attr,
1612 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1613 NULL
1614 } , {
1615 &sensor_dev_attr_temp2_input.dev_attr.attr,
1616 &sensor_dev_attr_temp2_max.dev_attr.attr,
1617 &sensor_dev_attr_temp2_min.dev_attr.attr,
1618 &sensor_dev_attr_temp2_type.dev_attr.attr,
1619 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1620 NULL
1621 } , {
1622 &sensor_dev_attr_temp3_input.dev_attr.attr,
1623 &sensor_dev_attr_temp3_max.dev_attr.attr,
1624 &sensor_dev_attr_temp3_min.dev_attr.attr,
1625 &sensor_dev_attr_temp3_type.dev_attr.attr,
1626 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1627 NULL
1628 } };
1629
1630 static const struct attribute_group it87_group_temp[3] = {
1631 { .attrs = it87_attributes_temp[0] },
1632 { .attrs = it87_attributes_temp[1] },
1633 { .attrs = it87_attributes_temp[2] },
1634 };
1635
1636 static struct attribute *it87_attributes_temp_offset[] = {
1637 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1638 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1639 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1640 };
1641
1642 static struct attribute *it87_attributes[] = {
1643 &dev_attr_alarms.attr,
1644 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1645 &dev_attr_name.attr,
1646 NULL
1647 };
1648
1649 static const struct attribute_group it87_group = {
1650 .attrs = it87_attributes,
1651 };
1652
1653 static struct attribute *it87_attributes_in_beep[] = {
1654 &sensor_dev_attr_in0_beep.dev_attr.attr,
1655 &sensor_dev_attr_in1_beep.dev_attr.attr,
1656 &sensor_dev_attr_in2_beep.dev_attr.attr,
1657 &sensor_dev_attr_in3_beep.dev_attr.attr,
1658 &sensor_dev_attr_in4_beep.dev_attr.attr,
1659 &sensor_dev_attr_in5_beep.dev_attr.attr,
1660 &sensor_dev_attr_in6_beep.dev_attr.attr,
1661 &sensor_dev_attr_in7_beep.dev_attr.attr,
1662 NULL,
1663 NULL,
1664 };
1665
1666 static struct attribute *it87_attributes_temp_beep[] = {
1667 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1668 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1669 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1670 };
1671
1672 static struct attribute *it87_attributes_fan[6][3+1] = { {
1673 &sensor_dev_attr_fan1_input.dev_attr.attr,
1674 &sensor_dev_attr_fan1_min.dev_attr.attr,
1675 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1676 NULL
1677 }, {
1678 &sensor_dev_attr_fan2_input.dev_attr.attr,
1679 &sensor_dev_attr_fan2_min.dev_attr.attr,
1680 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1681 NULL
1682 }, {
1683 &sensor_dev_attr_fan3_input.dev_attr.attr,
1684 &sensor_dev_attr_fan3_min.dev_attr.attr,
1685 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1686 NULL
1687 }, {
1688 &sensor_dev_attr_fan4_input.dev_attr.attr,
1689 &sensor_dev_attr_fan4_min.dev_attr.attr,
1690 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1691 NULL
1692 }, {
1693 &sensor_dev_attr_fan5_input.dev_attr.attr,
1694 &sensor_dev_attr_fan5_min.dev_attr.attr,
1695 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1696 NULL
1697 }, {
1698 &sensor_dev_attr_fan6_input.dev_attr.attr,
1699 &sensor_dev_attr_fan6_min.dev_attr.attr,
1700 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1701 NULL
1702 } };
1703
1704 static const struct attribute_group it87_group_fan[6] = {
1705 { .attrs = it87_attributes_fan[0] },
1706 { .attrs = it87_attributes_fan[1] },
1707 { .attrs = it87_attributes_fan[2] },
1708 { .attrs = it87_attributes_fan[3] },
1709 { .attrs = it87_attributes_fan[4] },
1710 { .attrs = it87_attributes_fan[5] },
1711 };
1712
1713 static const struct attribute *it87_attributes_fan_div[] = {
1714 &sensor_dev_attr_fan1_div.dev_attr.attr,
1715 &sensor_dev_attr_fan2_div.dev_attr.attr,
1716 &sensor_dev_attr_fan3_div.dev_attr.attr,
1717 };
1718
1719 static struct attribute *it87_attributes_pwm[3][4+1] = { {
1720 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1721 &sensor_dev_attr_pwm1.dev_attr.attr,
1722 &dev_attr_pwm1_freq.attr,
1723 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1724 NULL
1725 }, {
1726 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1727 &sensor_dev_attr_pwm2.dev_attr.attr,
1728 &dev_attr_pwm2_freq.attr,
1729 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1730 NULL
1731 }, {
1732 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1733 &sensor_dev_attr_pwm3.dev_attr.attr,
1734 &dev_attr_pwm3_freq.attr,
1735 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1736 NULL
1737 } };
1738
1739 static const struct attribute_group it87_group_pwm[3] = {
1740 { .attrs = it87_attributes_pwm[0] },
1741 { .attrs = it87_attributes_pwm[1] },
1742 { .attrs = it87_attributes_pwm[2] },
1743 };
1744
1745 static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1746 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1747 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1748 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1749 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1750 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1751 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1752 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1753 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1754 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1755 NULL
1756 }, {
1757 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1758 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1759 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1760 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1761 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1762 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1763 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1764 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1765 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1766 NULL
1767 }, {
1768 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1769 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1770 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1771 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1772 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1773 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1774 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1775 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1776 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1777 NULL
1778 } };
1779
1780 static const struct attribute_group it87_group_autopwm[3] = {
1781 { .attrs = it87_attributes_autopwm[0] },
1782 { .attrs = it87_attributes_autopwm[1] },
1783 { .attrs = it87_attributes_autopwm[2] },
1784 };
1785
1786 static struct attribute *it87_attributes_fan_beep[] = {
1787 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1788 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1789 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1790 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1791 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1792 &sensor_dev_attr_fan6_beep.dev_attr.attr,
1793 };
1794
1795 static struct attribute *it87_attributes_vid[] = {
1796 &dev_attr_vrm.attr,
1797 &dev_attr_cpu0_vid.attr,
1798 NULL
1799 };
1800
1801 static const struct attribute_group it87_group_vid = {
1802 .attrs = it87_attributes_vid,
1803 };
1804
1805 static struct attribute *it87_attributes_label[] = {
1806 &sensor_dev_attr_in3_label.dev_attr.attr,
1807 &sensor_dev_attr_in7_label.dev_attr.attr,
1808 &sensor_dev_attr_in8_label.dev_attr.attr,
1809 &sensor_dev_attr_in9_label.dev_attr.attr,
1810 NULL
1811 };
1812
1813 static const struct attribute_group it87_group_label = {
1814 .attrs = it87_attributes_label,
1815 };
1816
1817 /* SuperIO detection - will change isa_address if a chip is found */
1818 static int __init it87_find(unsigned short *address,
1819 struct it87_sio_data *sio_data)
1820 {
1821 int err;
1822 u16 chip_type;
1823 const char *board_vendor, *board_name;
1824 const struct it87_devices *config;
1825
1826 err = superio_enter();
1827 if (err)
1828 return err;
1829
1830 err = -ENODEV;
1831 chip_type = force_id ? force_id : superio_inw(DEVID);
1832
1833 switch (chip_type) {
1834 case IT8705F_DEVID:
1835 sio_data->type = it87;
1836 break;
1837 case IT8712F_DEVID:
1838 sio_data->type = it8712;
1839 break;
1840 case IT8716F_DEVID:
1841 case IT8726F_DEVID:
1842 sio_data->type = it8716;
1843 break;
1844 case IT8718F_DEVID:
1845 sio_data->type = it8718;
1846 break;
1847 case IT8720F_DEVID:
1848 sio_data->type = it8720;
1849 break;
1850 case IT8721F_DEVID:
1851 sio_data->type = it8721;
1852 break;
1853 case IT8728F_DEVID:
1854 sio_data->type = it8728;
1855 break;
1856 case IT8771E_DEVID:
1857 sio_data->type = it8771;
1858 break;
1859 case IT8772E_DEVID:
1860 sio_data->type = it8772;
1861 break;
1862 case IT8781F_DEVID:
1863 sio_data->type = it8781;
1864 break;
1865 case IT8782F_DEVID:
1866 sio_data->type = it8782;
1867 break;
1868 case IT8783E_DEVID:
1869 sio_data->type = it8783;
1870 break;
1871 case IT8786E_DEVID:
1872 sio_data->type = it8786;
1873 break;
1874 case IT8790E_DEVID:
1875 sio_data->type = it8790;
1876 break;
1877 case IT8603E_DEVID:
1878 case IT8623E_DEVID:
1879 sio_data->type = it8603;
1880 break;
1881 case IT8620E_DEVID:
1882 sio_data->type = it8620;
1883 break;
1884 case 0xffff: /* No device at all */
1885 goto exit;
1886 default:
1887 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
1888 goto exit;
1889 }
1890
1891 superio_select(PME);
1892 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
1893 pr_info("Device not activated, skipping\n");
1894 goto exit;
1895 }
1896
1897 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1898 if (*address == 0) {
1899 pr_info("Base address not set, skipping\n");
1900 goto exit;
1901 }
1902
1903 err = 0;
1904 sio_data->revision = superio_inb(DEVREV) & 0x0f;
1905 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
1906 it87_devices[sio_data->type].suffix,
1907 *address, sio_data->revision);
1908
1909 config = &it87_devices[sio_data->type];
1910
1911 /* in7 (VSB or VCCH5V) is always internal on some chips */
1912 if (has_in7_internal(config))
1913 sio_data->internal |= (1 << 1);
1914
1915 /* in8 (Vbat) is always internal */
1916 sio_data->internal |= (1 << 2);
1917
1918 /* Only the IT8603E has in9 */
1919 if (sio_data->type != it8603)
1920 sio_data->skip_in |= (1 << 9);
1921
1922 if (!has_vid(config))
1923 sio_data->skip_vid = 1;
1924
1925 /* Read GPIO config and VID value from LDN 7 (GPIO) */
1926 if (sio_data->type == it87) {
1927 /* The IT8705F has a different LD number for GPIO */
1928 superio_select(5);
1929 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1930 } else if (sio_data->type == it8783) {
1931 int reg25, reg27, reg2a, reg2c, regef;
1932
1933 superio_select(GPIO);
1934
1935 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1936 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1937 reg2a = superio_inb(IT87_SIO_PINX1_REG);
1938 reg2c = superio_inb(IT87_SIO_PINX2_REG);
1939 regef = superio_inb(IT87_SIO_SPI_REG);
1940
1941 /* Check if fan3 is there or not */
1942 if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2)))
1943 sio_data->skip_fan |= (1 << 2);
1944 if ((reg25 & (1 << 4))
1945 || (!(reg2a & (1 << 1)) && (regef & (1 << 0))))
1946 sio_data->skip_pwm |= (1 << 2);
1947
1948 /* Check if fan2 is there or not */
1949 if (reg27 & (1 << 7))
1950 sio_data->skip_fan |= (1 << 1);
1951 if (reg27 & (1 << 3))
1952 sio_data->skip_pwm |= (1 << 1);
1953
1954 /* VIN5 */
1955 if ((reg27 & (1 << 0)) || (reg2c & (1 << 2)))
1956 sio_data->skip_in |= (1 << 5); /* No VIN5 */
1957
1958 /* VIN6 */
1959 if (reg27 & (1 << 1))
1960 sio_data->skip_in |= (1 << 6); /* No VIN6 */
1961
1962 /*
1963 * VIN7
1964 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1965 */
1966 if (reg27 & (1 << 2)) {
1967 /*
1968 * The data sheet is a bit unclear regarding the
1969 * internal voltage divider for VCCH5V. It says
1970 * "This bit enables and switches VIN7 (pin 91) to the
1971 * internal voltage divider for VCCH5V".
1972 * This is different to other chips, where the internal
1973 * voltage divider would connect VIN7 to an internal
1974 * voltage source. Maybe that is the case here as well.
1975 *
1976 * Since we don't know for sure, re-route it if that is
1977 * not the case, and ask the user to report if the
1978 * resulting voltage is sane.
1979 */
1980 if (!(reg2c & (1 << 1))) {
1981 reg2c |= (1 << 1);
1982 superio_outb(IT87_SIO_PINX2_REG, reg2c);
1983 pr_notice("Routing internal VCCH5V to in7.\n");
1984 }
1985 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1986 pr_notice("Please report if it displays a reasonable voltage.\n");
1987 }
1988
1989 if (reg2c & (1 << 0))
1990 sio_data->internal |= (1 << 0);
1991 if (reg2c & (1 << 1))
1992 sio_data->internal |= (1 << 1);
1993
1994 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1995 } else if (sio_data->type == it8603) {
1996 int reg27, reg29;
1997
1998 superio_select(GPIO);
1999
2000 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
2001
2002 /* Check if fan3 is there or not */
2003 if (reg27 & (1 << 6))
2004 sio_data->skip_pwm |= (1 << 2);
2005 if (reg27 & (1 << 7))
2006 sio_data->skip_fan |= (1 << 2);
2007
2008 /* Check if fan2 is there or not */
2009 reg29 = superio_inb(IT87_SIO_GPIO5_REG);
2010 if (reg29 & (1 << 1))
2011 sio_data->skip_pwm |= (1 << 1);
2012 if (reg29 & (1 << 2))
2013 sio_data->skip_fan |= (1 << 1);
2014
2015 sio_data->skip_in |= (1 << 5); /* No VIN5 */
2016 sio_data->skip_in |= (1 << 6); /* No VIN6 */
2017
2018 sio_data->internal |= (1 << 3); /* in9 is AVCC */
2019
2020 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2021 } else if (sio_data->type == it8620) {
2022 int reg;
2023
2024 superio_select(GPIO);
2025
2026 /* Check for fan4, fan5 */
2027 reg = superio_inb(IT87_SIO_GPIO2_REG);
2028 if (!(reg & (1 << 5)))
2029 sio_data->skip_fan |= (1 << 3);
2030 if (!(reg & (1 << 4)))
2031 sio_data->skip_fan |= (1 << 4);
2032
2033 /* Check for pwm3, fan3 */
2034 reg = superio_inb(IT87_SIO_GPIO3_REG);
2035 if (reg & (1 << 6))
2036 sio_data->skip_pwm |= (1 << 2);
2037 if (reg & (1 << 7))
2038 sio_data->skip_fan |= (1 << 2);
2039
2040 /* Check for pwm2, fan2 */
2041 reg = superio_inb(IT87_SIO_GPIO5_REG);
2042 if (reg & (1 << 1))
2043 sio_data->skip_pwm |= (1 << 1);
2044 if (reg & (1 << 2))
2045 sio_data->skip_fan |= (1 << 1);
2046
2047 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2048 } else {
2049 int reg;
2050 bool uart6;
2051
2052 superio_select(GPIO);
2053
2054 reg = superio_inb(IT87_SIO_GPIO3_REG);
2055 if (!sio_data->skip_vid) {
2056 /* We need at least 4 VID pins */
2057 if (reg & 0x0f) {
2058 pr_info("VID is disabled (pins used for GPIO)\n");
2059 sio_data->skip_vid = 1;
2060 }
2061 }
2062
2063 /* Check if fan3 is there or not */
2064 if (reg & (1 << 6))
2065 sio_data->skip_pwm |= (1 << 2);
2066 if (reg & (1 << 7))
2067 sio_data->skip_fan |= (1 << 2);
2068
2069 /* Check if fan2 is there or not */
2070 reg = superio_inb(IT87_SIO_GPIO5_REG);
2071 if (reg & (1 << 1))
2072 sio_data->skip_pwm |= (1 << 1);
2073 if (reg & (1 << 2))
2074 sio_data->skip_fan |= (1 << 1);
2075
2076 if ((sio_data->type == it8718 || sio_data->type == it8720)
2077 && !(sio_data->skip_vid))
2078 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
2079
2080 reg = superio_inb(IT87_SIO_PINX2_REG);
2081
2082 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
2083
2084 /*
2085 * The IT8720F has no VIN7 pin, so VCCH should always be
2086 * routed internally to VIN7 with an internal divider.
2087 * Curiously, there still is a configuration bit to control
2088 * this, which means it can be set incorrectly. And even
2089 * more curiously, many boards out there are improperly
2090 * configured, even though the IT8720F datasheet claims
2091 * that the internal routing of VCCH to VIN7 is the default
2092 * setting. So we force the internal routing in this case.
2093 *
2094 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2095 * If UART6 is enabled, re-route VIN7 to the internal divider
2096 * if that is not already the case.
2097 */
2098 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
2099 reg |= (1 << 1);
2100 superio_outb(IT87_SIO_PINX2_REG, reg);
2101 pr_notice("Routing internal VCCH to in7\n");
2102 }
2103 if (reg & (1 << 0))
2104 sio_data->internal |= (1 << 0);
2105 if (reg & (1 << 1))
2106 sio_data->internal |= (1 << 1);
2107
2108 /*
2109 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2110 * While VIN7 can be routed to the internal voltage divider,
2111 * VIN5 and VIN6 are not available if UART6 is enabled.
2112 *
2113 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2114 * is the temperature source. Since we can not read the
2115 * temperature source here, skip_temp is preliminary.
2116 */
2117 if (uart6) {
2118 sio_data->skip_in |= (1 << 5) | (1 << 6);
2119 sio_data->skip_temp |= (1 << 2);
2120 }
2121
2122 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2123 }
2124 if (sio_data->beep_pin)
2125 pr_info("Beeping is supported\n");
2126
2127 /* Disable specific features based on DMI strings */
2128 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2129 board_name = dmi_get_system_info(DMI_BOARD_NAME);
2130 if (board_vendor && board_name) {
2131 if (strcmp(board_vendor, "nVIDIA") == 0
2132 && strcmp(board_name, "FN68PT") == 0) {
2133 /*
2134 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2135 * connected to a fan, but to something else. One user
2136 * has reported instant system power-off when changing
2137 * the PWM2 duty cycle, so we disable it.
2138 * I use the board name string as the trigger in case
2139 * the same board is ever used in other systems.
2140 */
2141 pr_info("Disabling pwm2 due to hardware constraints\n");
2142 sio_data->skip_pwm = (1 << 1);
2143 }
2144 }
2145
2146 exit:
2147 superio_exit();
2148 return err;
2149 }
2150
2151 static void it87_remove_files(struct device *dev)
2152 {
2153 struct it87_data *data = platform_get_drvdata(pdev);
2154 struct it87_sio_data *sio_data = dev_get_platdata(dev);
2155 int i;
2156
2157 sysfs_remove_group(&dev->kobj, &it87_group);
2158 for (i = 0; i < 10; i++) {
2159 if (sio_data->skip_in & (1 << i))
2160 continue;
2161 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
2162 if (it87_attributes_in_beep[i])
2163 sysfs_remove_file(&dev->kobj,
2164 it87_attributes_in_beep[i]);
2165 }
2166 for (i = 0; i < 3; i++) {
2167 if (!(data->has_temp & (1 << i)))
2168 continue;
2169 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
2170 if (has_temp_offset(data))
2171 sysfs_remove_file(&dev->kobj,
2172 it87_attributes_temp_offset[i]);
2173 if (sio_data->beep_pin)
2174 sysfs_remove_file(&dev->kobj,
2175 it87_attributes_temp_beep[i]);
2176 }
2177 for (i = 0; i < 6; i++) {
2178 if (!(data->has_fan & (1 << i)))
2179 continue;
2180 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
2181 if (sio_data->beep_pin)
2182 sysfs_remove_file(&dev->kobj,
2183 it87_attributes_fan_beep[i]);
2184 if (i < 3 && !has_16bit_fans(data))
2185 sysfs_remove_file(&dev->kobj,
2186 it87_attributes_fan_div[i]);
2187 }
2188 for (i = 0; i < 3; i++) {
2189 if (sio_data->skip_pwm & (1 << i))
2190 continue;
2191 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
2192 if (has_old_autopwm(data))
2193 sysfs_remove_group(&dev->kobj,
2194 &it87_group_autopwm[i]);
2195 }
2196 if (!sio_data->skip_vid)
2197 sysfs_remove_group(&dev->kobj, &it87_group_vid);
2198 sysfs_remove_group(&dev->kobj, &it87_group_label);
2199 }
2200
2201 static int it87_probe(struct platform_device *pdev)
2202 {
2203 struct it87_data *data;
2204 struct resource *res;
2205 struct device *dev = &pdev->dev;
2206 struct it87_sio_data *sio_data = dev_get_platdata(dev);
2207 int err = 0, i;
2208 int enable_pwm_interface;
2209 int fan_beep_need_rw;
2210
2211 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2212 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2213 DRVNAME)) {
2214 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2215 (unsigned long)res->start,
2216 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2217 return -EBUSY;
2218 }
2219
2220 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2221 if (!data)
2222 return -ENOMEM;
2223
2224 data->addr = res->start;
2225 data->type = sio_data->type;
2226 data->features = it87_devices[sio_data->type].features;
2227 data->peci_mask = it87_devices[sio_data->type].peci_mask;
2228 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2229 data->name = it87_devices[sio_data->type].name;
2230 /*
2231 * IT8705F Datasheet 0.4.1, 3h == Version G.
2232 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2233 * These are the first revisions with 16-bit tachometer support.
2234 */
2235 switch (data->type) {
2236 case it87:
2237 if (sio_data->revision >= 0x03) {
2238 data->features &= ~FEAT_OLD_AUTOPWM;
2239 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2240 }
2241 break;
2242 case it8712:
2243 if (sio_data->revision >= 0x08) {
2244 data->features &= ~FEAT_OLD_AUTOPWM;
2245 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2246 FEAT_FIVE_FANS;
2247 }
2248 break;
2249 default:
2250 break;
2251 }
2252
2253 /* Now, we do the remaining detection. */
2254 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
2255 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2256 return -ENODEV;
2257
2258 platform_set_drvdata(pdev, data);
2259
2260 mutex_init(&data->update_lock);
2261
2262 /* Check PWM configuration */
2263 enable_pwm_interface = it87_check_pwm(dev);
2264
2265 /* Starting with IT8721F, we handle scaling of internal voltages */
2266 if (has_12mv_adc(data)) {
2267 if (sio_data->internal & (1 << 0))
2268 data->in_scaled |= (1 << 3); /* in3 is AVCC */
2269 if (sio_data->internal & (1 << 1))
2270 data->in_scaled |= (1 << 7); /* in7 is VSB */
2271 if (sio_data->internal & (1 << 2))
2272 data->in_scaled |= (1 << 8); /* in8 is Vbat */
2273 if (sio_data->internal & (1 << 3))
2274 data->in_scaled |= (1 << 9); /* in9 is AVCC */
2275 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2276 sio_data->type == it8783) {
2277 if (sio_data->internal & (1 << 0))
2278 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2279 if (sio_data->internal & (1 << 1))
2280 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
2281 }
2282
2283 data->has_temp = 0x07;
2284 if (sio_data->skip_temp & (1 << 2)) {
2285 if (sio_data->type == it8782
2286 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2287 data->has_temp &= ~(1 << 2);
2288 }
2289
2290 /* Initialize the IT87 chip */
2291 it87_init_device(pdev);
2292
2293 /* Register sysfs hooks */
2294 err = sysfs_create_group(&dev->kobj, &it87_group);
2295 if (err)
2296 return err;
2297
2298 for (i = 0; i < 10; i++) {
2299 if (sio_data->skip_in & (1 << i))
2300 continue;
2301 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2302 if (err)
2303 goto error;
2304 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2305 err = sysfs_create_file(&dev->kobj,
2306 it87_attributes_in_beep[i]);
2307 if (err)
2308 goto error;
2309 }
2310 }
2311
2312 for (i = 0; i < 3; i++) {
2313 if (!(data->has_temp & (1 << i)))
2314 continue;
2315 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
2316 if (err)
2317 goto error;
2318 if (has_temp_offset(data)) {
2319 err = sysfs_create_file(&dev->kobj,
2320 it87_attributes_temp_offset[i]);
2321 if (err)
2322 goto error;
2323 }
2324 if (sio_data->beep_pin) {
2325 err = sysfs_create_file(&dev->kobj,
2326 it87_attributes_temp_beep[i]);
2327 if (err)
2328 goto error;
2329 }
2330 }
2331
2332 /* Do not create fan files for disabled fans */
2333 fan_beep_need_rw = 1;
2334 for (i = 0; i < 6; i++) {
2335 if (!(data->has_fan & (1 << i)))
2336 continue;
2337 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
2338 if (err)
2339 goto error;
2340
2341 if (i < 3 && !has_16bit_fans(data)) {
2342 err = sysfs_create_file(&dev->kobj,
2343 it87_attributes_fan_div[i]);
2344 if (err)
2345 goto error;
2346 }
2347
2348 if (sio_data->beep_pin) {
2349 err = sysfs_create_file(&dev->kobj,
2350 it87_attributes_fan_beep[i]);
2351 if (err)
2352 goto error;
2353 if (!fan_beep_need_rw)
2354 continue;
2355
2356 /*
2357 * As we have a single beep enable bit for all fans,
2358 * only the first enabled fan has a writable attribute
2359 * for it.
2360 */
2361 if (sysfs_chmod_file(&dev->kobj,
2362 it87_attributes_fan_beep[i],
2363 S_IRUGO | S_IWUSR))
2364 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2365 i + 1);
2366 fan_beep_need_rw = 0;
2367 }
2368 }
2369
2370 if (enable_pwm_interface) {
2371 for (i = 0; i < 3; i++) {
2372 if (sio_data->skip_pwm & (1 << i))
2373 continue;
2374 err = sysfs_create_group(&dev->kobj,
2375 &it87_group_pwm[i]);
2376 if (err)
2377 goto error;
2378
2379 if (!has_old_autopwm(data))
2380 continue;
2381 err = sysfs_create_group(&dev->kobj,
2382 &it87_group_autopwm[i]);
2383 if (err)
2384 goto error;
2385 }
2386 }
2387
2388 if (!sio_data->skip_vid) {
2389 data->vrm = vid_which_vrm();
2390 /* VID reading from Super-I/O config space if available */
2391 data->vid = sio_data->vid_value;
2392 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2393 if (err)
2394 goto error;
2395 }
2396
2397 /* Export labels for internal sensors */
2398 for (i = 0; i < 4; i++) {
2399 if (!(sio_data->internal & (1 << i)))
2400 continue;
2401 err = sysfs_create_file(&dev->kobj,
2402 it87_attributes_label[i]);
2403 if (err)
2404 goto error;
2405 }
2406
2407 data->hwmon_dev = hwmon_device_register(dev);
2408 if (IS_ERR(data->hwmon_dev)) {
2409 err = PTR_ERR(data->hwmon_dev);
2410 goto error;
2411 }
2412
2413 return 0;
2414
2415 error:
2416 it87_remove_files(dev);
2417 return err;
2418 }
2419
2420 static int it87_remove(struct platform_device *pdev)
2421 {
2422 struct it87_data *data = platform_get_drvdata(pdev);
2423
2424 hwmon_device_unregister(data->hwmon_dev);
2425 it87_remove_files(&pdev->dev);
2426
2427 return 0;
2428 }
2429
2430 /*
2431 * Must be called with data->update_lock held, except during initialization.
2432 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2433 * would slow down the IT87 access and should not be necessary.
2434 */
2435 static int it87_read_value(struct it87_data *data, u8 reg)
2436 {
2437 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2438 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
2439 }
2440
2441 /*
2442 * Must be called with data->update_lock held, except during initialization.
2443 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2444 * would slow down the IT87 access and should not be necessary.
2445 */
2446 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
2447 {
2448 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2449 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
2450 }
2451
2452 /* Return 1 if and only if the PWM interface is safe to use */
2453 static int it87_check_pwm(struct device *dev)
2454 {
2455 struct it87_data *data = dev_get_drvdata(dev);
2456 /*
2457 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2458 * and polarity set to active low is sign that this is the case so we
2459 * disable pwm control to protect the user.
2460 */
2461 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2462 if ((tmp & 0x87) == 0) {
2463 if (fix_pwm_polarity) {
2464 /*
2465 * The user asks us to attempt a chip reconfiguration.
2466 * This means switching to active high polarity and
2467 * inverting all fan speed values.
2468 */
2469 int i;
2470 u8 pwm[3];
2471
2472 for (i = 0; i < 3; i++)
2473 pwm[i] = it87_read_value(data,
2474 IT87_REG_PWM(i));
2475
2476 /*
2477 * If any fan is in automatic pwm mode, the polarity
2478 * might be correct, as suspicious as it seems, so we
2479 * better don't change anything (but still disable the
2480 * PWM interface).
2481 */
2482 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2483 dev_info(dev,
2484 "Reconfiguring PWM to active high polarity\n");
2485 it87_write_value(data, IT87_REG_FAN_CTL,
2486 tmp | 0x87);
2487 for (i = 0; i < 3; i++)
2488 it87_write_value(data,
2489 IT87_REG_PWM(i),
2490 0x7f & ~pwm[i]);
2491 return 1;
2492 }
2493
2494 dev_info(dev,
2495 "PWM configuration is too broken to be fixed\n");
2496 }
2497
2498 dev_info(dev,
2499 "Detected broken BIOS defaults, disabling PWM interface\n");
2500 return 0;
2501 } else if (fix_pwm_polarity) {
2502 dev_info(dev,
2503 "PWM configuration looks sane, won't touch\n");
2504 }
2505
2506 return 1;
2507 }
2508
2509 /* Called when we have found a new IT87. */
2510 static void it87_init_device(struct platform_device *pdev)
2511 {
2512 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2513 struct it87_data *data = platform_get_drvdata(pdev);
2514 int tmp, i;
2515 u8 mask;
2516
2517 /*
2518 * For each PWM channel:
2519 * - If it is in automatic mode, setting to manual mode should set
2520 * the fan to full speed by default.
2521 * - If it is in manual mode, we need a mapping to temperature
2522 * channels to use when later setting to automatic mode later.
2523 * Use a 1:1 mapping by default (we are clueless.)
2524 * In both cases, the value can (and should) be changed by the user
2525 * prior to switching to a different mode.
2526 * Note that this is no longer needed for the IT8721F and later, as
2527 * these have separate registers for the temperature mapping and the
2528 * manual duty cycle.
2529 */
2530 for (i = 0; i < 3; i++) {
2531 data->pwm_temp_map[i] = i;
2532 data->pwm_duty[i] = 0x7f; /* Full speed */
2533 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2534 }
2535
2536 /*
2537 * Some chips seem to have default value 0xff for all limit
2538 * registers. For low voltage limits it makes no sense and triggers
2539 * alarms, so change to 0 instead. For high temperature limits, it
2540 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2541 * but is still confusing, so change to 127 degrees C.
2542 */
2543 for (i = 0; i < 8; i++) {
2544 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2545 if (tmp == 0xff)
2546 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2547 }
2548 for (i = 0; i < 3; i++) {
2549 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2550 if (tmp == 0xff)
2551 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2552 }
2553
2554 /*
2555 * Temperature channels are not forcibly enabled, as they can be
2556 * set to two different sensor types and we can't guess which one
2557 * is correct for a given system. These channels can be enabled at
2558 * run-time through the temp{1-3}_type sysfs accessors if needed.
2559 */
2560
2561 /* Check if voltage monitors are reset manually or by some reason */
2562 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2563 if ((tmp & 0xff) == 0) {
2564 /* Enable all voltage monitors */
2565 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2566 }
2567
2568 /* Check if tachometers are reset manually or by some reason */
2569 mask = 0x70 & ~(sio_data->skip_fan << 4);
2570 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2571 if ((data->fan_main_ctrl & mask) == 0) {
2572 /* Enable all fan tachometers */
2573 data->fan_main_ctrl |= mask;
2574 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2575 data->fan_main_ctrl);
2576 }
2577 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2578
2579 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2580
2581 /* Set tachometers to 16-bit mode if needed */
2582 if (has_fan16_config(data)) {
2583 if (~tmp & 0x07 & data->has_fan) {
2584 dev_dbg(&pdev->dev,
2585 "Setting fan1-3 to 16-bit mode\n");
2586 it87_write_value(data, IT87_REG_FAN_16BIT,
2587 tmp | 0x07);
2588 }
2589 }
2590
2591 /* Check for additional fans */
2592 if (has_five_fans(data)) {
2593 if (tmp & (1 << 4))
2594 data->has_fan |= (1 << 3); /* fan4 enabled */
2595 if (tmp & (1 << 5))
2596 data->has_fan |= (1 << 4); /* fan5 enabled */
2597 if (has_six_fans(data) && (tmp & (1 << 2)))
2598 data->has_fan |= (1 << 5); /* fan6 enabled */
2599 }
2600
2601 /* Fan input pins may be used for alternative functions */
2602 data->has_fan &= ~sio_data->skip_fan;
2603
2604 /* Start monitoring */
2605 it87_write_value(data, IT87_REG_CONFIG,
2606 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2607 | (update_vbat ? 0x41 : 0x01));
2608 }
2609
2610 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2611 {
2612 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
2613 if (has_newer_autopwm(data)) {
2614 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2615 data->pwm_duty[nr] = it87_read_value(data,
2616 IT87_REG_PWM_DUTY(nr));
2617 } else {
2618 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2619 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2620 else /* Manual mode */
2621 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2622 }
2623
2624 if (has_old_autopwm(data)) {
2625 int i;
2626
2627 for (i = 0; i < 5 ; i++)
2628 data->auto_temp[nr][i] = it87_read_value(data,
2629 IT87_REG_AUTO_TEMP(nr, i));
2630 for (i = 0; i < 3 ; i++)
2631 data->auto_pwm[nr][i] = it87_read_value(data,
2632 IT87_REG_AUTO_PWM(nr, i));
2633 }
2634 }
2635
2636 static struct it87_data *it87_update_device(struct device *dev)
2637 {
2638 struct it87_data *data = dev_get_drvdata(dev);
2639 int i;
2640
2641 mutex_lock(&data->update_lock);
2642
2643 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2644 || !data->valid) {
2645 if (update_vbat) {
2646 /*
2647 * Cleared after each update, so reenable. Value
2648 * returned by this read will be previous value
2649 */
2650 it87_write_value(data, IT87_REG_CONFIG,
2651 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
2652 }
2653 for (i = 0; i <= 7; i++) {
2654 data->in[i][0] =
2655 it87_read_value(data, IT87_REG_VIN(i));
2656 data->in[i][1] =
2657 it87_read_value(data, IT87_REG_VIN_MIN(i));
2658 data->in[i][2] =
2659 it87_read_value(data, IT87_REG_VIN_MAX(i));
2660 }
2661 /* in8 (battery) has no limit registers */
2662 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
2663 if (data->type == it8603)
2664 data->in[9][0] = it87_read_value(data, 0x2f);
2665
2666 for (i = 0; i < 6; i++) {
2667 /* Skip disabled fans */
2668 if (!(data->has_fan & (1 << i)))
2669 continue;
2670
2671 data->fan[i][1] =
2672 it87_read_value(data, IT87_REG_FAN_MIN[i]);
2673 data->fan[i][0] = it87_read_value(data,
2674 IT87_REG_FAN[i]);
2675 /* Add high byte if in 16-bit mode */
2676 if (has_16bit_fans(data)) {
2677 data->fan[i][0] |= it87_read_value(data,
2678 IT87_REG_FANX[i]) << 8;
2679 data->fan[i][1] |= it87_read_value(data,
2680 IT87_REG_FANX_MIN[i]) << 8;
2681 }
2682 }
2683 for (i = 0; i < 3; i++) {
2684 if (!(data->has_temp & (1 << i)))
2685 continue;
2686 data->temp[i][0] =
2687 it87_read_value(data, IT87_REG_TEMP(i));
2688 data->temp[i][1] =
2689 it87_read_value(data, IT87_REG_TEMP_LOW(i));
2690 data->temp[i][2] =
2691 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2692 if (has_temp_offset(data))
2693 data->temp[i][3] =
2694 it87_read_value(data,
2695 IT87_REG_TEMP_OFFSET[i]);
2696 }
2697
2698 /* Newer chips don't have clock dividers */
2699 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
2700 i = it87_read_value(data, IT87_REG_FAN_DIV);
2701 data->fan_div[0] = i & 0x07;
2702 data->fan_div[1] = (i >> 3) & 0x07;
2703 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2704 }
2705
2706 data->alarms =
2707 it87_read_value(data, IT87_REG_ALARM1) |
2708 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2709 (it87_read_value(data, IT87_REG_ALARM3) << 16);
2710 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2711
2712 data->fan_main_ctrl = it87_read_value(data,
2713 IT87_REG_FAN_MAIN_CTRL);
2714 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
2715 for (i = 0; i < 3; i++)
2716 it87_update_pwm_ctrl(data, i);
2717
2718 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
2719 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
2720 /*
2721 * The IT8705F does not have VID capability.
2722 * The IT8718F and later don't use IT87_REG_VID for the
2723 * same purpose.
2724 */
2725 if (data->type == it8712 || data->type == it8716) {
2726 data->vid = it87_read_value(data, IT87_REG_VID);
2727 /*
2728 * The older IT8712F revisions had only 5 VID pins,
2729 * but we assume it is always safe to read 6 bits.
2730 */
2731 data->vid &= 0x3f;
2732 }
2733 data->last_updated = jiffies;
2734 data->valid = 1;
2735 }
2736
2737 mutex_unlock(&data->update_lock);
2738
2739 return data;
2740 }
2741
2742 static int __init it87_device_add(unsigned short address,
2743 const struct it87_sio_data *sio_data)
2744 {
2745 struct resource res = {
2746 .start = address + IT87_EC_OFFSET,
2747 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2748 .name = DRVNAME,
2749 .flags = IORESOURCE_IO,
2750 };
2751 int err;
2752
2753 err = acpi_check_resource_conflict(&res);
2754 if (err)
2755 goto exit;
2756
2757 pdev = platform_device_alloc(DRVNAME, address);
2758 if (!pdev) {
2759 err = -ENOMEM;
2760 pr_err("Device allocation failed\n");
2761 goto exit;
2762 }
2763
2764 err = platform_device_add_resources(pdev, &res, 1);
2765 if (err) {
2766 pr_err("Device resource addition failed (%d)\n", err);
2767 goto exit_device_put;
2768 }
2769
2770 err = platform_device_add_data(pdev, sio_data,
2771 sizeof(struct it87_sio_data));
2772 if (err) {
2773 pr_err("Platform data allocation failed\n");
2774 goto exit_device_put;
2775 }
2776
2777 err = platform_device_add(pdev);
2778 if (err) {
2779 pr_err("Device addition failed (%d)\n", err);
2780 goto exit_device_put;
2781 }
2782
2783 return 0;
2784
2785 exit_device_put:
2786 platform_device_put(pdev);
2787 exit:
2788 return err;
2789 }
2790
2791 static int __init sm_it87_init(void)
2792 {
2793 int err;
2794 unsigned short isa_address = 0;
2795 struct it87_sio_data sio_data;
2796
2797 memset(&sio_data, 0, sizeof(struct it87_sio_data));
2798 err = it87_find(&isa_address, &sio_data);
2799 if (err)
2800 return err;
2801 err = platform_driver_register(&it87_driver);
2802 if (err)
2803 return err;
2804
2805 err = it87_device_add(isa_address, &sio_data);
2806 if (err) {
2807 platform_driver_unregister(&it87_driver);
2808 return err;
2809 }
2810
2811 return 0;
2812 }
2813
2814 static void __exit sm_it87_exit(void)
2815 {
2816 platform_device_unregister(pdev);
2817 platform_driver_unregister(&it87_driver);
2818 }
2819
2820
2821 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
2822 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2823 module_param(update_vbat, bool, 0);
2824 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2825 module_param(fix_pwm_polarity, bool, 0);
2826 MODULE_PARM_DESC(fix_pwm_polarity,
2827 "Force PWM polarity to active high (DANGEROUS)");
2828 MODULE_LICENSE("GPL");
2829
2830 module_init(sm_it87_init);
2831 module_exit(sm_it87_exit);
Linux kernel - Deliverables
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