2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
42 * #temp lists the number of monitored temperature sources (first value) plus
43 * the number of directly connectable temperature sensors (second value).
46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
48 #include <linux/module.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/jiffies.h>
52 #include <linux/platform_device.h>
53 #include <linux/hwmon.h>
54 #include <linux/hwmon-sysfs.h>
55 #include <linux/hwmon-vid.h>
56 #include <linux/err.h>
57 #include <linux/mutex.h>
58 #include <linux/acpi.h>
64 enum kinds
{ nct6106
, nct6775
, nct6776
, nct6779
, nct6791
};
66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
67 static const char * const nct6775_device_names
[] = {
75 static unsigned short force_id
;
76 module_param(force_id
, ushort
, 0);
77 MODULE_PARM_DESC(force_id
, "Override the detected device ID");
79 static unsigned short fan_debounce
;
80 module_param(fan_debounce
, ushort
, 0);
81 MODULE_PARM_DESC(fan_debounce
, "Enable debouncing for fan RPM signal");
83 #define DRVNAME "nct6775"
86 * Super-I/O constants and functions
89 #define NCT6775_LD_ACPI 0x0a
90 #define NCT6775_LD_HWM 0x0b
91 #define NCT6775_LD_VID 0x0d
93 #define SIO_REG_LDSEL 0x07 /* Logical device select */
94 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
95 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
96 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
98 #define SIO_NCT6106_ID 0xc450
99 #define SIO_NCT6775_ID 0xb470
100 #define SIO_NCT6776_ID 0xc330
101 #define SIO_NCT6779_ID 0xc560
102 #define SIO_NCT6791_ID 0xc800
103 #define SIO_ID_MASK 0xFFF0
105 enum pwm_enable
{ off
, manual
, thermal_cruise
, speed_cruise
, sf3
, sf4
};
108 superio_outb(int ioreg
, int reg
, int val
)
111 outb(val
, ioreg
+ 1);
115 superio_inb(int ioreg
, int reg
)
118 return inb(ioreg
+ 1);
122 superio_select(int ioreg
, int ld
)
124 outb(SIO_REG_LDSEL
, ioreg
);
129 superio_enter(int ioreg
)
132 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
134 if (!request_muxed_region(ioreg
, 2, DRVNAME
))
144 superio_exit(int ioreg
)
148 outb(0x02, ioreg
+ 1);
149 release_region(ioreg
, 2);
156 #define IOREGION_ALIGNMENT (~7)
157 #define IOREGION_OFFSET 5
158 #define IOREGION_LENGTH 2
159 #define ADDR_REG_OFFSET 0
160 #define DATA_REG_OFFSET 1
162 #define NCT6775_REG_BANK 0x4E
163 #define NCT6775_REG_CONFIG 0x40
166 * Not currently used:
167 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
168 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
169 * REG_MAN_ID is at port 0x4f
170 * REG_CHIP_ID is at port 0x58
173 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
174 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
176 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
177 #define NUM_REG_BEEP 5 /* Max number of beep registers */
181 /* Common and NCT6775 specific data */
183 /* Voltage min/max registers for nr=7..14 are in bank 5 */
185 static const u16 NCT6775_REG_IN_MAX
[] = {
186 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
187 0x55c, 0x55e, 0x560, 0x562 };
188 static const u16 NCT6775_REG_IN_MIN
[] = {
189 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
190 0x55d, 0x55f, 0x561, 0x563 };
191 static const u16 NCT6775_REG_IN
[] = {
192 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
195 #define NCT6775_REG_VBAT 0x5D
196 #define NCT6775_REG_DIODE 0x5E
197 #define NCT6775_DIODE_MASK 0x02
199 #define NCT6775_REG_FANDIV1 0x506
200 #define NCT6775_REG_FANDIV2 0x507
202 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
204 static const u16 NCT6775_REG_ALARM
[NUM_REG_ALARM
] = { 0x459, 0x45A, 0x45B };
206 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
208 static const s8 NCT6775_ALARM_BITS
[] = {
209 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
210 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
212 6, 7, 11, -1, -1, /* fan1..fan5 */
213 -1, -1, -1, /* unused */
214 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
215 12, -1 }; /* intrusion0, intrusion1 */
217 #define FAN_ALARM_BASE 16
218 #define TEMP_ALARM_BASE 24
219 #define INTRUSION_ALARM_BASE 30
221 static const u16 NCT6775_REG_BEEP
[NUM_REG_BEEP
] = { 0x56, 0x57, 0x453, 0x4e };
224 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
227 static const s8 NCT6775_BEEP_BITS
[] = {
228 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
229 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
230 21, /* global beep enable */
231 6, 7, 11, 28, -1, /* fan1..fan5 */
232 -1, -1, -1, /* unused */
233 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
234 12, -1 }; /* intrusion0, intrusion1 */
236 #define BEEP_ENABLE_BASE 15
238 static const u8 NCT6775_REG_CR_CASEOPEN_CLR
[] = { 0xe6, 0xee };
239 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK
[] = { 0x20, 0x01 };
241 /* DC or PWM output fan configuration */
242 static const u8 NCT6775_REG_PWM_MODE
[] = { 0x04, 0x04, 0x12 };
243 static const u8 NCT6775_PWM_MODE_MASK
[] = { 0x01, 0x02, 0x01 };
245 /* Advanced Fan control, some values are common for all fans */
247 static const u16 NCT6775_REG_TARGET
[] = {
248 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
249 static const u16 NCT6775_REG_FAN_MODE
[] = {
250 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
251 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME
[] = {
252 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
253 static const u16 NCT6775_REG_FAN_STEP_UP_TIME
[] = {
254 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
255 static const u16 NCT6775_REG_FAN_STOP_OUTPUT
[] = {
256 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
257 static const u16 NCT6775_REG_FAN_START_OUTPUT
[] = {
258 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
259 static const u16 NCT6775_REG_FAN_MAX_OUTPUT
[] = { 0x10a, 0x20a, 0x30a };
260 static const u16 NCT6775_REG_FAN_STEP_OUTPUT
[] = { 0x10b, 0x20b, 0x30b };
262 static const u16 NCT6775_REG_FAN_STOP_TIME
[] = {
263 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
264 static const u16 NCT6775_REG_PWM
[] = {
265 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
266 static const u16 NCT6775_REG_PWM_READ
[] = {
267 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
269 static const u16 NCT6775_REG_FAN
[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
270 static const u16 NCT6775_REG_FAN_MIN
[] = { 0x3b, 0x3c, 0x3d };
271 static const u16 NCT6775_REG_FAN_PULSES
[] = { 0x641, 0x642, 0x643, 0x644, 0 };
272 static const u16 NCT6775_FAN_PULSE_SHIFT
[] = { 0, 0, 0, 0, 0, 0 };
274 static const u16 NCT6775_REG_TEMP
[] = {
275 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
277 static const u16 NCT6775_REG_TEMP_CONFIG
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
278 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
279 static const u16 NCT6775_REG_TEMP_HYST
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
280 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
281 static const u16 NCT6775_REG_TEMP_OVER
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
282 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
284 static const u16 NCT6775_REG_TEMP_SOURCE
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
285 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
287 static const u16 NCT6775_REG_TEMP_SEL
[] = {
288 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
290 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL
[] = {
291 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
292 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP
[] = {
293 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
294 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL
[] = {
295 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
296 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP
[] = {
297 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
298 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE
[] = {
299 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
301 static const u16 NCT6775_REG_TEMP_OFFSET
[] = { 0x454, 0x455, 0x456 };
303 static const u16 NCT6775_REG_AUTO_TEMP
[] = {
304 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
305 static const u16 NCT6775_REG_AUTO_PWM
[] = {
306 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
308 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
309 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
311 static const u16 NCT6775_REG_CRITICAL_ENAB
[] = { 0x134, 0x234, 0x334 };
313 static const u16 NCT6775_REG_CRITICAL_TEMP
[] = {
314 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
315 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE
[] = {
316 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
318 static const char *const nct6775_temp_label
[] = {
332 "PCH_CHIP_CPU_MAX_TEMP",
342 static const u16 NCT6775_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6775_temp_label
) - 1]
343 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
345 static const u16 NCT6775_REG_TEMP_CRIT
[ARRAY_SIZE(nct6775_temp_label
) - 1]
346 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
349 /* NCT6776 specific data */
351 static const s8 NCT6776_ALARM_BITS
[] = {
352 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
353 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
355 6, 7, 11, 10, 23, /* fan1..fan5 */
356 -1, -1, -1, /* unused */
357 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
358 12, 9 }; /* intrusion0, intrusion1 */
360 static const u16 NCT6776_REG_BEEP
[NUM_REG_BEEP
] = { 0xb2, 0xb3, 0xb4, 0xb5 };
362 static const s8 NCT6776_BEEP_BITS
[] = {
363 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
364 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
365 24, /* global beep enable */
366 25, 26, 27, 28, 29, /* fan1..fan5 */
367 -1, -1, -1, /* unused */
368 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
369 30, 31 }; /* intrusion0, intrusion1 */
371 static const u16 NCT6776_REG_TOLERANCE_H
[] = {
372 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
374 static const u8 NCT6776_REG_PWM_MODE
[] = { 0x04, 0, 0, 0, 0, 0 };
375 static const u8 NCT6776_PWM_MODE_MASK
[] = { 0x01, 0, 0, 0, 0, 0 };
377 static const u16 NCT6776_REG_FAN_MIN
[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
378 static const u16 NCT6776_REG_FAN_PULSES
[] = { 0x644, 0x645, 0x646, 0, 0 };
380 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE
[] = {
381 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
383 static const u16 NCT6776_REG_TEMP_CONFIG
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
384 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
386 static const char *const nct6776_temp_label
[] = {
401 "PCH_CHIP_CPU_MAX_TEMP",
412 static const u16 NCT6776_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6776_temp_label
) - 1]
413 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
415 static const u16 NCT6776_REG_TEMP_CRIT
[ARRAY_SIZE(nct6776_temp_label
) - 1]
416 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
418 /* NCT6779 specific data */
420 static const u16 NCT6779_REG_IN
[] = {
421 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
422 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
424 static const u16 NCT6779_REG_ALARM
[NUM_REG_ALARM
] = {
425 0x459, 0x45A, 0x45B, 0x568 };
427 static const s8 NCT6779_ALARM_BITS
[] = {
428 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
429 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
431 6, 7, 11, 10, 23, /* fan1..fan5 */
432 -1, -1, -1, /* unused */
433 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
434 12, 9 }; /* intrusion0, intrusion1 */
436 static const s8 NCT6779_BEEP_BITS
[] = {
437 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
438 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
439 24, /* global beep enable */
440 25, 26, 27, 28, 29, /* fan1..fan5 */
441 -1, -1, -1, /* unused */
442 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
443 30, 31 }; /* intrusion0, intrusion1 */
445 static const u16 NCT6779_REG_FAN
[] = {
446 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
447 static const u16 NCT6779_REG_FAN_PULSES
[] = {
448 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
450 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE
[] = {
451 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
452 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
453 static const u16 NCT6779_REG_CRITICAL_PWM
[] = {
454 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
456 static const u16 NCT6779_REG_TEMP
[] = { 0x27, 0x150 };
457 static const u16 NCT6779_REG_TEMP_CONFIG
[ARRAY_SIZE(NCT6779_REG_TEMP
)] = {
459 static const u16 NCT6779_REG_TEMP_HYST
[ARRAY_SIZE(NCT6779_REG_TEMP
)] = {
461 static const u16 NCT6779_REG_TEMP_OVER
[ARRAY_SIZE(NCT6779_REG_TEMP
)] = {
464 static const u16 NCT6779_REG_TEMP_OFFSET
[] = {
465 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
467 static const char *const nct6779_temp_label
[] = {
486 "PCH_CHIP_CPU_MAX_TEMP",
497 static const u16 NCT6779_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6779_temp_label
) - 1]
498 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
499 0, 0, 0, 0, 0, 0, 0, 0,
500 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
503 static const u16 NCT6779_REG_TEMP_CRIT
[ARRAY_SIZE(nct6779_temp_label
) - 1]
504 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
506 /* NCT6791 specific data */
508 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
510 static const u16 NCT6791_REG_ALARM
[NUM_REG_ALARM
] = {
511 0x459, 0x45A, 0x45B, 0x568, 0x45D };
513 static const s8 NCT6791_ALARM_BITS
[] = {
514 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
515 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
517 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
519 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
520 12, 9 }; /* intrusion0, intrusion1 */
523 /* NCT6102D/NCT6106D specific data */
525 #define NCT6106_REG_VBAT 0x318
526 #define NCT6106_REG_DIODE 0x319
527 #define NCT6106_DIODE_MASK 0x01
529 static const u16 NCT6106_REG_IN_MAX
[] = {
530 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
531 static const u16 NCT6106_REG_IN_MIN
[] = {
532 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
533 static const u16 NCT6106_REG_IN
[] = {
534 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
536 static const u16 NCT6106_REG_TEMP
[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
537 static const u16 NCT6106_REG_TEMP_HYST
[] = {
538 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
539 static const u16 NCT6106_REG_TEMP_OVER
[] = {
540 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
541 static const u16 NCT6106_REG_TEMP_CRIT_L
[] = {
542 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
543 static const u16 NCT6106_REG_TEMP_CRIT_H
[] = {
544 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
545 static const u16 NCT6106_REG_TEMP_OFFSET
[] = { 0x311, 0x312, 0x313 };
546 static const u16 NCT6106_REG_TEMP_CONFIG
[] = {
547 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
549 static const u16 NCT6106_REG_FAN
[] = { 0x20, 0x22, 0x24 };
550 static const u16 NCT6106_REG_FAN_MIN
[] = { 0xe0, 0xe2, 0xe4 };
551 static const u16 NCT6106_REG_FAN_PULSES
[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
552 static const u16 NCT6106_FAN_PULSE_SHIFT
[] = { 0, 2, 4, 0, 0 };
554 static const u8 NCT6106_REG_PWM_MODE
[] = { 0xf3, 0xf3, 0xf3 };
555 static const u8 NCT6106_PWM_MODE_MASK
[] = { 0x01, 0x02, 0x04 };
556 static const u16 NCT6106_REG_PWM
[] = { 0x119, 0x129, 0x139 };
557 static const u16 NCT6106_REG_PWM_READ
[] = { 0x4a, 0x4b, 0x4c };
558 static const u16 NCT6106_REG_FAN_MODE
[] = { 0x113, 0x123, 0x133 };
559 static const u16 NCT6106_REG_TEMP_SEL
[] = { 0x110, 0x120, 0x130 };
560 static const u16 NCT6106_REG_TEMP_SOURCE
[] = {
561 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
563 static const u16 NCT6106_REG_CRITICAL_TEMP
[] = { 0x11a, 0x12a, 0x13a };
564 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE
[] = {
565 0x11b, 0x12b, 0x13b };
567 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE
[] = { 0x11c, 0x12c, 0x13c };
568 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
569 static const u16 NCT6106_REG_CRITICAL_PWM
[] = { 0x11d, 0x12d, 0x13d };
571 static const u16 NCT6106_REG_FAN_STEP_UP_TIME
[] = { 0x114, 0x124, 0x134 };
572 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME
[] = { 0x115, 0x125, 0x135 };
573 static const u16 NCT6106_REG_FAN_STOP_OUTPUT
[] = { 0x116, 0x126, 0x136 };
574 static const u16 NCT6106_REG_FAN_START_OUTPUT
[] = { 0x117, 0x127, 0x137 };
575 static const u16 NCT6106_REG_FAN_STOP_TIME
[] = { 0x118, 0x128, 0x138 };
576 static const u16 NCT6106_REG_TOLERANCE_H
[] = { 0x112, 0x122, 0x132 };
578 static const u16 NCT6106_REG_TARGET
[] = { 0x111, 0x121, 0x131 };
580 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL
[] = { 0x168, 0x178, 0x188 };
581 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP
[] = { 0x169, 0x179, 0x189 };
582 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL
[] = { 0x16a, 0x17a, 0x18a };
583 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP
[] = { 0x16b, 0x17b, 0x17c };
584 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE
[] = { 0x16c, 0x17c, 0x18c };
585 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE
[] = { 0x16d, 0x17d, 0x18d };
587 static const u16 NCT6106_REG_AUTO_TEMP
[] = { 0x160, 0x170, 0x180 };
588 static const u16 NCT6106_REG_AUTO_PWM
[] = { 0x164, 0x174, 0x184 };
590 static const u16 NCT6106_REG_ALARM
[NUM_REG_ALARM
] = {
591 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
593 static const s8 NCT6106_ALARM_BITS
[] = {
594 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
595 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
597 32, 33, 34, -1, -1, /* fan1..fan5 */
598 -1, -1, -1, /* unused */
599 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
600 48, -1 /* intrusion0, intrusion1 */
603 static const u16 NCT6106_REG_BEEP
[NUM_REG_BEEP
] = {
604 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
606 static const s8 NCT6106_BEEP_BITS
[] = {
607 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
608 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
609 32, /* global beep enable */
610 24, 25, 26, 27, 28, /* fan1..fan5 */
611 -1, -1, -1, /* unused */
612 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
613 34, -1 /* intrusion0, intrusion1 */
616 static const u16 NCT6106_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6776_temp_label
) - 1]
617 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
619 static const u16 NCT6106_REG_TEMP_CRIT
[ARRAY_SIZE(nct6776_temp_label
) - 1]
620 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
622 static enum pwm_enable
reg_to_pwm_enable(int pwm
, int mode
)
624 if (mode
== 0 && pwm
== 255)
629 static int pwm_enable_to_reg(enum pwm_enable mode
)
640 /* 1 is DC mode, output in ms */
641 static unsigned int step_time_from_reg(u8 reg
, u8 mode
)
643 return mode
? 400 * reg
: 100 * reg
;
646 static u8
step_time_to_reg(unsigned int msec
, u8 mode
)
648 return clamp_val((mode
? (msec
+ 200) / 400 :
649 (msec
+ 50) / 100), 1, 255);
652 static unsigned int fan_from_reg8(u16 reg
, unsigned int divreg
)
654 if (reg
== 0 || reg
== 255)
656 return 1350000U / (reg
<< divreg
);
659 static unsigned int fan_from_reg13(u16 reg
, unsigned int divreg
)
661 if ((reg
& 0xff1f) == 0xff1f)
664 reg
= (reg
& 0x1f) | ((reg
& 0xff00) >> 3);
669 return 1350000U / reg
;
672 static unsigned int fan_from_reg16(u16 reg
, unsigned int divreg
)
674 if (reg
== 0 || reg
== 0xffff)
678 * Even though the registers are 16 bit wide, the fan divisor
681 return 1350000U / (reg
<< divreg
);
684 static u16
fan_to_reg(u32 fan
, unsigned int divreg
)
689 return (1350000U / fan
) >> divreg
;
692 static inline unsigned int
699 * Some of the voltage inputs have internal scaling, the tables below
700 * contain 8 (the ADC LSB in mV) * scaling factor * 100
702 static const u16 scale_in
[15] = {
703 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
707 static inline long in_from_reg(u8 reg
, u8 nr
)
709 return DIV_ROUND_CLOSEST(reg
* scale_in
[nr
], 100);
712 static inline u8
in_to_reg(u32 val
, u8 nr
)
714 return clamp_val(DIV_ROUND_CLOSEST(val
* 100, scale_in
[nr
]), 0, 255);
718 * Data structures and manipulation thereof
721 struct nct6775_data
{
722 int addr
; /* IO base of hw monitor block */
723 int sioreg
; /* SIO register address */
728 const struct attribute_group
*groups
[6];
730 u16 reg_temp
[5][NUM_TEMP
]; /* 0=temp, 1=temp_over, 2=temp_hyst,
731 * 3=temp_crit, 4=temp_lcrit
733 u8 temp_src
[NUM_TEMP
];
734 u16 reg_temp_config
[NUM_TEMP
];
735 const char * const *temp_label
;
743 const s8
*ALARM_BITS
;
747 const u16
*REG_IN_MINMAX
[2];
749 const u16
*REG_TARGET
;
751 const u16
*REG_FAN_MODE
;
752 const u16
*REG_FAN_MIN
;
753 const u16
*REG_FAN_PULSES
;
754 const u16
*FAN_PULSE_SHIFT
;
755 const u16
*REG_FAN_TIME
[3];
757 const u16
*REG_TOLERANCE_H
;
759 const u8
*REG_PWM_MODE
;
760 const u8
*PWM_MODE_MASK
;
762 const u16
*REG_PWM
[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
763 * [3]=pwm_max, [4]=pwm_step,
764 * [5]=weight_duty_step, [6]=weight_duty_base
766 const u16
*REG_PWM_READ
;
768 const u16
*REG_CRITICAL_PWM_ENABLE
;
769 u8 CRITICAL_PWM_ENABLE_MASK
;
770 const u16
*REG_CRITICAL_PWM
;
772 const u16
*REG_AUTO_TEMP
;
773 const u16
*REG_AUTO_PWM
;
775 const u16
*REG_CRITICAL_TEMP
;
776 const u16
*REG_CRITICAL_TEMP_TOLERANCE
;
778 const u16
*REG_TEMP_SOURCE
; /* temp register sources */
779 const u16
*REG_TEMP_SEL
;
780 const u16
*REG_WEIGHT_TEMP_SEL
;
781 const u16
*REG_WEIGHT_TEMP
[3]; /* 0=base, 1=tolerance, 2=step */
783 const u16
*REG_TEMP_OFFSET
;
785 const u16
*REG_ALARM
;
788 unsigned int (*fan_from_reg
)(u16 reg
, unsigned int divreg
);
789 unsigned int (*fan_from_reg_min
)(u16 reg
, unsigned int divreg
);
791 struct mutex update_lock
;
792 bool valid
; /* true if following fields are valid */
793 unsigned long last_updated
; /* In jiffies */
795 /* Register values */
796 u8 bank
; /* current register bank */
797 u8 in_num
; /* number of in inputs we have */
798 u8 in
[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
799 unsigned int rpm
[NUM_FAN
];
800 u16 fan_min
[NUM_FAN
];
801 u8 fan_pulses
[NUM_FAN
];
804 u8 has_fan
; /* some fan inputs can be disabled */
805 u8 has_fan_min
; /* some fans don't have min register */
808 u8 num_temp_alarms
; /* 2, 3, or 6 */
809 u8 num_temp_beeps
; /* 2, 3, or 6 */
810 u8 temp_fixed_num
; /* 3 or 6 */
811 u8 temp_type
[NUM_TEMP_FIXED
];
812 s8 temp_offset
[NUM_TEMP_FIXED
];
813 s16 temp
[5][NUM_TEMP
]; /* 0=temp, 1=temp_over, 2=temp_hyst,
814 * 3=temp_crit, 4=temp_lcrit */
818 u8 pwm_num
; /* number of pwm */
819 u8 pwm_mode
[NUM_FAN
]; /* 1->DC variable voltage,
820 * 0->PWM variable duty cycle
822 enum pwm_enable pwm_enable
[NUM_FAN
];
825 * 2->thermal cruise mode (also called SmartFan I)
826 * 3->fan speed cruise mode
828 * 5->enhanced variable thermal cruise (SmartFan IV)
830 u8 pwm
[7][NUM_FAN
]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
831 * [3]=pwm_max, [4]=pwm_step,
832 * [5]=weight_duty_step, [6]=weight_duty_base
835 u8 target_temp
[NUM_FAN
];
837 u32 target_speed
[NUM_FAN
];
838 u32 target_speed_tolerance
[NUM_FAN
];
839 u8 speed_tolerance_limit
;
841 u8 temp_tolerance
[2][NUM_FAN
];
844 u8 fan_time
[3][NUM_FAN
]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
846 /* Automatic fan speed control registers */
848 u8 auto_pwm
[NUM_FAN
][7];
849 u8 auto_temp
[NUM_FAN
][7];
850 u8 pwm_temp_sel
[NUM_FAN
];
851 u8 pwm_weight_temp_sel
[NUM_FAN
];
852 u8 weight_temp
[3][NUM_FAN
]; /* 0->temp_step, 1->temp_step_tol,
865 /* Remember extra register values over suspend/resume */
872 struct nct6775_sio_data
{
877 struct sensor_device_template
{
878 struct device_attribute dev_attr
;
886 bool s2
; /* true if both index and nr are used */
889 struct sensor_device_attr_u
{
891 struct sensor_device_attribute a1
;
892 struct sensor_device_attribute_2 a2
;
897 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
898 .attr = {.name = _template, .mode = _mode }, \
903 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
904 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
908 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
910 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
911 .u.s.index = _index, \
915 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
916 static struct sensor_device_template sensor_dev_template_##_name \
917 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
920 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
922 static struct sensor_device_template sensor_dev_template_##_name \
923 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
926 struct sensor_template_group
{
927 struct sensor_device_template
**templates
;
928 umode_t (*is_visible
)(struct kobject
*, struct attribute
*, int);
932 static struct attribute_group
*
933 nct6775_create_attr_group(struct device
*dev
, struct sensor_template_group
*tg
,
936 struct attribute_group
*group
;
937 struct sensor_device_attr_u
*su
;
938 struct sensor_device_attribute
*a
;
939 struct sensor_device_attribute_2
*a2
;
940 struct attribute
**attrs
;
941 struct sensor_device_template
**t
;
945 return ERR_PTR(-EINVAL
);
948 for (count
= 0; *t
; t
++, count
++)
952 return ERR_PTR(-EINVAL
);
954 group
= devm_kzalloc(dev
, sizeof(*group
), GFP_KERNEL
);
956 return ERR_PTR(-ENOMEM
);
958 attrs
= devm_kzalloc(dev
, sizeof(*attrs
) * (repeat
* count
+ 1),
961 return ERR_PTR(-ENOMEM
);
963 su
= devm_kzalloc(dev
, sizeof(*su
) * repeat
* count
,
966 return ERR_PTR(-ENOMEM
);
968 group
->attrs
= attrs
;
969 group
->is_visible
= tg
->is_visible
;
971 for (i
= 0; i
< repeat
; i
++) {
974 snprintf(su
->name
, sizeof(su
->name
),
975 (*t
)->dev_attr
.attr
.name
, tg
->base
+ i
);
978 a2
->dev_attr
.attr
.name
= su
->name
;
979 a2
->nr
= (*t
)->u
.s
.nr
+ i
;
980 a2
->index
= (*t
)->u
.s
.index
;
981 a2
->dev_attr
.attr
.mode
=
982 (*t
)->dev_attr
.attr
.mode
;
983 a2
->dev_attr
.show
= (*t
)->dev_attr
.show
;
984 a2
->dev_attr
.store
= (*t
)->dev_attr
.store
;
985 *attrs
= &a2
->dev_attr
.attr
;
988 a
->dev_attr
.attr
.name
= su
->name
;
989 a
->index
= (*t
)->u
.index
+ i
;
990 a
->dev_attr
.attr
.mode
=
991 (*t
)->dev_attr
.attr
.mode
;
992 a
->dev_attr
.show
= (*t
)->dev_attr
.show
;
993 a
->dev_attr
.store
= (*t
)->dev_attr
.store
;
994 *attrs
= &a
->dev_attr
.attr
;
1005 static bool is_word_sized(struct nct6775_data
*data
, u16 reg
)
1007 switch (data
->kind
) {
1009 return reg
== 0x20 || reg
== 0x22 || reg
== 0x24 ||
1010 reg
== 0xe0 || reg
== 0xe2 || reg
== 0xe4 ||
1011 reg
== 0x111 || reg
== 0x121 || reg
== 0x131;
1013 return (((reg
& 0xff00) == 0x100 ||
1014 (reg
& 0xff00) == 0x200) &&
1015 ((reg
& 0x00ff) == 0x50 ||
1016 (reg
& 0x00ff) == 0x53 ||
1017 (reg
& 0x00ff) == 0x55)) ||
1018 (reg
& 0xfff0) == 0x630 ||
1019 reg
== 0x640 || reg
== 0x642 ||
1021 ((reg
& 0xfff0) == 0x650 && (reg
& 0x000f) >= 0x06) ||
1022 reg
== 0x73 || reg
== 0x75 || reg
== 0x77;
1024 return (((reg
& 0xff00) == 0x100 ||
1025 (reg
& 0xff00) == 0x200) &&
1026 ((reg
& 0x00ff) == 0x50 ||
1027 (reg
& 0x00ff) == 0x53 ||
1028 (reg
& 0x00ff) == 0x55)) ||
1029 (reg
& 0xfff0) == 0x630 ||
1031 reg
== 0x640 || reg
== 0x642 ||
1032 ((reg
& 0xfff0) == 0x650 && (reg
& 0x000f) >= 0x06) ||
1033 reg
== 0x73 || reg
== 0x75 || reg
== 0x77;
1036 return reg
== 0x150 || reg
== 0x153 || reg
== 0x155 ||
1037 ((reg
& 0xfff0) == 0x4b0 && (reg
& 0x000f) < 0x0b) ||
1039 reg
== 0x63a || reg
== 0x63c || reg
== 0x63e ||
1040 reg
== 0x640 || reg
== 0x642 ||
1041 reg
== 0x73 || reg
== 0x75 || reg
== 0x77 || reg
== 0x79 ||
1048 * On older chips, only registers 0x50-0x5f are banked.
1049 * On more recent chips, all registers are banked.
1050 * Assume that is the case and set the bank number for each access.
1051 * Cache the bank number so it only needs to be set if it changes.
1053 static inline void nct6775_set_bank(struct nct6775_data
*data
, u16 reg
)
1056 if (data
->bank
!= bank
) {
1057 outb_p(NCT6775_REG_BANK
, data
->addr
+ ADDR_REG_OFFSET
);
1058 outb_p(bank
, data
->addr
+ DATA_REG_OFFSET
);
1063 static u16
nct6775_read_value(struct nct6775_data
*data
, u16 reg
)
1065 int res
, word_sized
= is_word_sized(data
, reg
);
1067 nct6775_set_bank(data
, reg
);
1068 outb_p(reg
& 0xff, data
->addr
+ ADDR_REG_OFFSET
);
1069 res
= inb_p(data
->addr
+ DATA_REG_OFFSET
);
1071 outb_p((reg
& 0xff) + 1,
1072 data
->addr
+ ADDR_REG_OFFSET
);
1073 res
= (res
<< 8) + inb_p(data
->addr
+ DATA_REG_OFFSET
);
1078 static int nct6775_write_value(struct nct6775_data
*data
, u16 reg
, u16 value
)
1080 int word_sized
= is_word_sized(data
, reg
);
1082 nct6775_set_bank(data
, reg
);
1083 outb_p(reg
& 0xff, data
->addr
+ ADDR_REG_OFFSET
);
1085 outb_p(value
>> 8, data
->addr
+ DATA_REG_OFFSET
);
1086 outb_p((reg
& 0xff) + 1,
1087 data
->addr
+ ADDR_REG_OFFSET
);
1089 outb_p(value
& 0xff, data
->addr
+ DATA_REG_OFFSET
);
1093 /* We left-align 8-bit temperature values to make the code simpler */
1094 static u16
nct6775_read_temp(struct nct6775_data
*data
, u16 reg
)
1098 res
= nct6775_read_value(data
, reg
);
1099 if (!is_word_sized(data
, reg
))
1105 static int nct6775_write_temp(struct nct6775_data
*data
, u16 reg
, u16 value
)
1107 if (!is_word_sized(data
, reg
))
1109 return nct6775_write_value(data
, reg
, value
);
1112 /* This function assumes that the caller holds data->update_lock */
1113 static void nct6775_write_fan_div(struct nct6775_data
*data
, int nr
)
1119 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV1
) & 0x70)
1120 | (data
->fan_div
[0] & 0x7);
1121 nct6775_write_value(data
, NCT6775_REG_FANDIV1
, reg
);
1124 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV1
) & 0x7)
1125 | ((data
->fan_div
[1] << 4) & 0x70);
1126 nct6775_write_value(data
, NCT6775_REG_FANDIV1
, reg
);
1129 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV2
) & 0x70)
1130 | (data
->fan_div
[2] & 0x7);
1131 nct6775_write_value(data
, NCT6775_REG_FANDIV2
, reg
);
1134 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV2
) & 0x7)
1135 | ((data
->fan_div
[3] << 4) & 0x70);
1136 nct6775_write_value(data
, NCT6775_REG_FANDIV2
, reg
);
1141 static void nct6775_write_fan_div_common(struct nct6775_data
*data
, int nr
)
1143 if (data
->kind
== nct6775
)
1144 nct6775_write_fan_div(data
, nr
);
1147 static void nct6775_update_fan_div(struct nct6775_data
*data
)
1151 i
= nct6775_read_value(data
, NCT6775_REG_FANDIV1
);
1152 data
->fan_div
[0] = i
& 0x7;
1153 data
->fan_div
[1] = (i
& 0x70) >> 4;
1154 i
= nct6775_read_value(data
, NCT6775_REG_FANDIV2
);
1155 data
->fan_div
[2] = i
& 0x7;
1156 if (data
->has_fan
& (1 << 3))
1157 data
->fan_div
[3] = (i
& 0x70) >> 4;
1160 static void nct6775_update_fan_div_common(struct nct6775_data
*data
)
1162 if (data
->kind
== nct6775
)
1163 nct6775_update_fan_div(data
);
1166 static void nct6775_init_fan_div(struct nct6775_data
*data
)
1170 nct6775_update_fan_div_common(data
);
1172 * For all fans, start with highest divider value if the divider
1173 * register is not initialized. This ensures that we get a
1174 * reading from the fan count register, even if it is not optimal.
1175 * We'll compute a better divider later on.
1177 for (i
= 0; i
< ARRAY_SIZE(data
->fan_div
); i
++) {
1178 if (!(data
->has_fan
& (1 << i
)))
1180 if (data
->fan_div
[i
] == 0) {
1181 data
->fan_div
[i
] = 7;
1182 nct6775_write_fan_div_common(data
, i
);
1187 static void nct6775_init_fan_common(struct device
*dev
,
1188 struct nct6775_data
*data
)
1193 if (data
->has_fan_div
)
1194 nct6775_init_fan_div(data
);
1197 * If fan_min is not set (0), set it to 0xff to disable it. This
1198 * prevents the unnecessary warning when fanX_min is reported as 0.
1200 for (i
= 0; i
< ARRAY_SIZE(data
->fan_min
); i
++) {
1201 if (data
->has_fan_min
& (1 << i
)) {
1202 reg
= nct6775_read_value(data
, data
->REG_FAN_MIN
[i
]);
1204 nct6775_write_value(data
, data
->REG_FAN_MIN
[i
],
1205 data
->has_fan_div
? 0xff
1211 static void nct6775_select_fan_div(struct device
*dev
,
1212 struct nct6775_data
*data
, int nr
, u16 reg
)
1214 u8 fan_div
= data
->fan_div
[nr
];
1217 if (!data
->has_fan_div
)
1221 * If we failed to measure the fan speed, or the reported value is not
1222 * in the optimal range, and the clock divider can be modified,
1223 * let's try that for next time.
1225 if (reg
== 0x00 && fan_div
< 0x07)
1227 else if (reg
!= 0x00 && reg
< 0x30 && fan_div
> 0)
1230 if (fan_div
!= data
->fan_div
[nr
]) {
1231 dev_dbg(dev
, "Modifying fan%d clock divider from %u to %u\n",
1232 nr
+ 1, div_from_reg(data
->fan_div
[nr
]),
1233 div_from_reg(fan_div
));
1235 /* Preserve min limit if possible */
1236 if (data
->has_fan_min
& (1 << nr
)) {
1237 fan_min
= data
->fan_min
[nr
];
1238 if (fan_div
> data
->fan_div
[nr
]) {
1239 if (fan_min
!= 255 && fan_min
> 1)
1242 if (fan_min
!= 255) {
1248 if (fan_min
!= data
->fan_min
[nr
]) {
1249 data
->fan_min
[nr
] = fan_min
;
1250 nct6775_write_value(data
, data
->REG_FAN_MIN
[nr
],
1254 data
->fan_div
[nr
] = fan_div
;
1255 nct6775_write_fan_div_common(data
, nr
);
1259 static void nct6775_update_pwm(struct device
*dev
)
1261 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1263 int fanmodecfg
, reg
;
1266 for (i
= 0; i
< data
->pwm_num
; i
++) {
1267 if (!(data
->has_pwm
& (1 << i
)))
1270 duty_is_dc
= data
->REG_PWM_MODE
[i
] &&
1271 (nct6775_read_value(data
, data
->REG_PWM_MODE
[i
])
1272 & data
->PWM_MODE_MASK
[i
]);
1273 data
->pwm_mode
[i
] = duty_is_dc
;
1275 fanmodecfg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[i
]);
1276 for (j
= 0; j
< ARRAY_SIZE(data
->REG_PWM
); j
++) {
1277 if (data
->REG_PWM
[j
] && data
->REG_PWM
[j
][i
]) {
1279 = nct6775_read_value(data
,
1280 data
->REG_PWM
[j
][i
]);
1284 data
->pwm_enable
[i
] = reg_to_pwm_enable(data
->pwm
[0][i
],
1285 (fanmodecfg
>> 4) & 7);
1287 if (!data
->temp_tolerance
[0][i
] ||
1288 data
->pwm_enable
[i
] != speed_cruise
)
1289 data
->temp_tolerance
[0][i
] = fanmodecfg
& 0x0f;
1290 if (!data
->target_speed_tolerance
[i
] ||
1291 data
->pwm_enable
[i
] == speed_cruise
) {
1292 u8 t
= fanmodecfg
& 0x0f;
1293 if (data
->REG_TOLERANCE_H
) {
1294 t
|= (nct6775_read_value(data
,
1295 data
->REG_TOLERANCE_H
[i
]) & 0x70) >> 1;
1297 data
->target_speed_tolerance
[i
] = t
;
1300 data
->temp_tolerance
[1][i
] =
1301 nct6775_read_value(data
,
1302 data
->REG_CRITICAL_TEMP_TOLERANCE
[i
]);
1304 reg
= nct6775_read_value(data
, data
->REG_TEMP_SEL
[i
]);
1305 data
->pwm_temp_sel
[i
] = reg
& 0x1f;
1306 /* If fan can stop, report floor as 0 */
1308 data
->pwm
[2][i
] = 0;
1310 reg
= nct6775_read_value(data
, data
->REG_WEIGHT_TEMP_SEL
[i
]);
1311 data
->pwm_weight_temp_sel
[i
] = reg
& 0x1f;
1312 /* If weight is disabled, report weight source as 0 */
1313 if (j
== 1 && !(reg
& 0x80))
1314 data
->pwm_weight_temp_sel
[i
] = 0;
1316 /* Weight temp data */
1317 for (j
= 0; j
< ARRAY_SIZE(data
->weight_temp
); j
++) {
1318 data
->weight_temp
[j
][i
]
1319 = nct6775_read_value(data
,
1320 data
->REG_WEIGHT_TEMP
[j
][i
]);
1325 static void nct6775_update_pwm_limits(struct device
*dev
)
1327 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1332 for (i
= 0; i
< data
->pwm_num
; i
++) {
1333 if (!(data
->has_pwm
& (1 << i
)))
1336 for (j
= 0; j
< ARRAY_SIZE(data
->fan_time
); j
++) {
1337 data
->fan_time
[j
][i
] =
1338 nct6775_read_value(data
, data
->REG_FAN_TIME
[j
][i
]);
1341 reg_t
= nct6775_read_value(data
, data
->REG_TARGET
[i
]);
1342 /* Update only in matching mode or if never updated */
1343 if (!data
->target_temp
[i
] ||
1344 data
->pwm_enable
[i
] == thermal_cruise
)
1345 data
->target_temp
[i
] = reg_t
& data
->target_temp_mask
;
1346 if (!data
->target_speed
[i
] ||
1347 data
->pwm_enable
[i
] == speed_cruise
) {
1348 if (data
->REG_TOLERANCE_H
) {
1349 reg_t
|= (nct6775_read_value(data
,
1350 data
->REG_TOLERANCE_H
[i
]) & 0x0f) << 8;
1352 data
->target_speed
[i
] = reg_t
;
1355 for (j
= 0; j
< data
->auto_pwm_num
; j
++) {
1356 data
->auto_pwm
[i
][j
] =
1357 nct6775_read_value(data
,
1358 NCT6775_AUTO_PWM(data
, i
, j
));
1359 data
->auto_temp
[i
][j
] =
1360 nct6775_read_value(data
,
1361 NCT6775_AUTO_TEMP(data
, i
, j
));
1364 /* critical auto_pwm temperature data */
1365 data
->auto_temp
[i
][data
->auto_pwm_num
] =
1366 nct6775_read_value(data
, data
->REG_CRITICAL_TEMP
[i
]);
1368 switch (data
->kind
) {
1370 reg
= nct6775_read_value(data
,
1371 NCT6775_REG_CRITICAL_ENAB
[i
]);
1372 data
->auto_pwm
[i
][data
->auto_pwm_num
] =
1373 (reg
& 0x02) ? 0xff : 0x00;
1376 data
->auto_pwm
[i
][data
->auto_pwm_num
] = 0xff;
1381 reg
= nct6775_read_value(data
,
1382 data
->REG_CRITICAL_PWM_ENABLE
[i
]);
1383 if (reg
& data
->CRITICAL_PWM_ENABLE_MASK
)
1384 reg
= nct6775_read_value(data
,
1385 data
->REG_CRITICAL_PWM
[i
]);
1388 data
->auto_pwm
[i
][data
->auto_pwm_num
] = reg
;
1394 static struct nct6775_data
*nct6775_update_device(struct device
*dev
)
1396 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1399 mutex_lock(&data
->update_lock
);
1401 if (time_after(jiffies
, data
->last_updated
+ HZ
+ HZ
/ 2)
1403 /* Fan clock dividers */
1404 nct6775_update_fan_div_common(data
);
1406 /* Measured voltages and limits */
1407 for (i
= 0; i
< data
->in_num
; i
++) {
1408 if (!(data
->have_in
& (1 << i
)))
1411 data
->in
[i
][0] = nct6775_read_value(data
,
1413 data
->in
[i
][1] = nct6775_read_value(data
,
1414 data
->REG_IN_MINMAX
[0][i
]);
1415 data
->in
[i
][2] = nct6775_read_value(data
,
1416 data
->REG_IN_MINMAX
[1][i
]);
1419 /* Measured fan speeds and limits */
1420 for (i
= 0; i
< ARRAY_SIZE(data
->rpm
); i
++) {
1423 if (!(data
->has_fan
& (1 << i
)))
1426 reg
= nct6775_read_value(data
, data
->REG_FAN
[i
]);
1427 data
->rpm
[i
] = data
->fan_from_reg(reg
,
1430 if (data
->has_fan_min
& (1 << i
))
1431 data
->fan_min
[i
] = nct6775_read_value(data
,
1432 data
->REG_FAN_MIN
[i
]);
1433 data
->fan_pulses
[i
] =
1434 (nct6775_read_value(data
, data
->REG_FAN_PULSES
[i
])
1435 >> data
->FAN_PULSE_SHIFT
[i
]) & 0x03;
1437 nct6775_select_fan_div(dev
, data
, i
, reg
);
1440 nct6775_update_pwm(dev
);
1441 nct6775_update_pwm_limits(dev
);
1443 /* Measured temperatures and limits */
1444 for (i
= 0; i
< NUM_TEMP
; i
++) {
1445 if (!(data
->have_temp
& (1 << i
)))
1447 for (j
= 0; j
< ARRAY_SIZE(data
->reg_temp
); j
++) {
1448 if (data
->reg_temp
[j
][i
])
1450 = nct6775_read_temp(data
,
1451 data
->reg_temp
[j
][i
]);
1453 if (i
>= NUM_TEMP_FIXED
||
1454 !(data
->have_temp_fixed
& (1 << i
)))
1456 data
->temp_offset
[i
]
1457 = nct6775_read_value(data
, data
->REG_TEMP_OFFSET
[i
]);
1461 for (i
= 0; i
< NUM_REG_ALARM
; i
++) {
1463 if (!data
->REG_ALARM
[i
])
1465 alarm
= nct6775_read_value(data
, data
->REG_ALARM
[i
]);
1466 data
->alarms
|= ((u64
)alarm
) << (i
<< 3);
1470 for (i
= 0; i
< NUM_REG_BEEP
; i
++) {
1472 if (!data
->REG_BEEP
[i
])
1474 beep
= nct6775_read_value(data
, data
->REG_BEEP
[i
]);
1475 data
->beeps
|= ((u64
)beep
) << (i
<< 3);
1478 data
->last_updated
= jiffies
;
1482 mutex_unlock(&data
->update_lock
);
1487 * Sysfs callback functions
1490 show_in_reg(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1492 struct nct6775_data
*data
= nct6775_update_device(dev
);
1493 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1495 int index
= sattr
->index
;
1496 return sprintf(buf
, "%ld\n", in_from_reg(data
->in
[nr
][index
], nr
));
1500 store_in_reg(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
1503 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1504 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1506 int index
= sattr
->index
;
1508 int err
= kstrtoul(buf
, 10, &val
);
1511 mutex_lock(&data
->update_lock
);
1512 data
->in
[nr
][index
] = in_to_reg(val
, nr
);
1513 nct6775_write_value(data
, data
->REG_IN_MINMAX
[index
- 1][nr
],
1514 data
->in
[nr
][index
]);
1515 mutex_unlock(&data
->update_lock
);
1520 show_alarm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1522 struct nct6775_data
*data
= nct6775_update_device(dev
);
1523 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1524 int nr
= data
->ALARM_BITS
[sattr
->index
];
1525 return sprintf(buf
, "%u\n",
1526 (unsigned int)((data
->alarms
>> nr
) & 0x01));
1529 static int find_temp_source(struct nct6775_data
*data
, int index
, int count
)
1531 int source
= data
->temp_src
[index
];
1534 for (nr
= 0; nr
< count
; nr
++) {
1537 src
= nct6775_read_value(data
,
1538 data
->REG_TEMP_SOURCE
[nr
]) & 0x1f;
1546 show_temp_alarm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1548 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1549 struct nct6775_data
*data
= nct6775_update_device(dev
);
1550 unsigned int alarm
= 0;
1554 * For temperatures, there is no fixed mapping from registers to alarm
1555 * bits. Alarm bits are determined by the temperature source mapping.
1557 nr
= find_temp_source(data
, sattr
->index
, data
->num_temp_alarms
);
1559 int bit
= data
->ALARM_BITS
[nr
+ TEMP_ALARM_BASE
];
1560 alarm
= (data
->alarms
>> bit
) & 0x01;
1562 return sprintf(buf
, "%u\n", alarm
);
1566 show_beep(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1568 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1569 struct nct6775_data
*data
= nct6775_update_device(dev
);
1570 int nr
= data
->BEEP_BITS
[sattr
->index
];
1572 return sprintf(buf
, "%u\n",
1573 (unsigned int)((data
->beeps
>> nr
) & 0x01));
1577 store_beep(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
1580 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1581 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1582 int nr
= data
->BEEP_BITS
[sattr
->index
];
1583 int regindex
= nr
>> 3;
1586 int err
= kstrtoul(buf
, 10, &val
);
1592 mutex_lock(&data
->update_lock
);
1594 data
->beeps
|= (1ULL << nr
);
1596 data
->beeps
&= ~(1ULL << nr
);
1597 nct6775_write_value(data
, data
->REG_BEEP
[regindex
],
1598 (data
->beeps
>> (regindex
<< 3)) & 0xff);
1599 mutex_unlock(&data
->update_lock
);
1604 show_temp_beep(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1606 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1607 struct nct6775_data
*data
= nct6775_update_device(dev
);
1608 unsigned int beep
= 0;
1612 * For temperatures, there is no fixed mapping from registers to beep
1613 * enable bits. Beep enable bits are determined by the temperature
1616 nr
= find_temp_source(data
, sattr
->index
, data
->num_temp_beeps
);
1618 int bit
= data
->BEEP_BITS
[nr
+ TEMP_ALARM_BASE
];
1619 beep
= (data
->beeps
>> bit
) & 0x01;
1621 return sprintf(buf
, "%u\n", beep
);
1625 store_temp_beep(struct device
*dev
, struct device_attribute
*attr
,
1626 const char *buf
, size_t count
)
1628 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1629 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1630 int nr
, bit
, regindex
;
1633 int err
= kstrtoul(buf
, 10, &val
);
1639 nr
= find_temp_source(data
, sattr
->index
, data
->num_temp_beeps
);
1643 bit
= data
->BEEP_BITS
[nr
+ TEMP_ALARM_BASE
];
1644 regindex
= bit
>> 3;
1646 mutex_lock(&data
->update_lock
);
1648 data
->beeps
|= (1ULL << bit
);
1650 data
->beeps
&= ~(1ULL << bit
);
1651 nct6775_write_value(data
, data
->REG_BEEP
[regindex
],
1652 (data
->beeps
>> (regindex
<< 3)) & 0xff);
1653 mutex_unlock(&data
->update_lock
);
1658 static umode_t
nct6775_in_is_visible(struct kobject
*kobj
,
1659 struct attribute
*attr
, int index
)
1661 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
1662 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1663 int in
= index
/ 5; /* voltage index */
1665 if (!(data
->have_in
& (1 << in
)))
1671 SENSOR_TEMPLATE_2(in_input
, "in%d_input", S_IRUGO
, show_in_reg
, NULL
, 0, 0);
1672 SENSOR_TEMPLATE(in_alarm
, "in%d_alarm", S_IRUGO
, show_alarm
, NULL
, 0);
1673 SENSOR_TEMPLATE(in_beep
, "in%d_beep", S_IWUSR
| S_IRUGO
, show_beep
, store_beep
,
1675 SENSOR_TEMPLATE_2(in_min
, "in%d_min", S_IWUSR
| S_IRUGO
, show_in_reg
,
1676 store_in_reg
, 0, 1);
1677 SENSOR_TEMPLATE_2(in_max
, "in%d_max", S_IWUSR
| S_IRUGO
, show_in_reg
,
1678 store_in_reg
, 0, 2);
1681 * nct6775_in_is_visible uses the index into the following array
1682 * to determine if attributes should be created or not.
1683 * Any change in order or content must be matched.
1685 static struct sensor_device_template
*nct6775_attributes_in_template
[] = {
1686 &sensor_dev_template_in_input
,
1687 &sensor_dev_template_in_alarm
,
1688 &sensor_dev_template_in_beep
,
1689 &sensor_dev_template_in_min
,
1690 &sensor_dev_template_in_max
,
1694 static struct sensor_template_group nct6775_in_template_group
= {
1695 .templates
= nct6775_attributes_in_template
,
1696 .is_visible
= nct6775_in_is_visible
,
1700 show_fan(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1702 struct nct6775_data
*data
= nct6775_update_device(dev
);
1703 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1704 int nr
= sattr
->index
;
1705 return sprintf(buf
, "%d\n", data
->rpm
[nr
]);
1709 show_fan_min(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1711 struct nct6775_data
*data
= nct6775_update_device(dev
);
1712 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1713 int nr
= sattr
->index
;
1714 return sprintf(buf
, "%d\n",
1715 data
->fan_from_reg_min(data
->fan_min
[nr
],
1716 data
->fan_div
[nr
]));
1720 show_fan_div(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1722 struct nct6775_data
*data
= nct6775_update_device(dev
);
1723 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1724 int nr
= sattr
->index
;
1725 return sprintf(buf
, "%u\n", div_from_reg(data
->fan_div
[nr
]));
1729 store_fan_min(struct device
*dev
, struct device_attribute
*attr
,
1730 const char *buf
, size_t count
)
1732 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1733 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1734 int nr
= sattr
->index
;
1740 err
= kstrtoul(buf
, 10, &val
);
1744 mutex_lock(&data
->update_lock
);
1745 if (!data
->has_fan_div
) {
1746 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1752 val
= 1350000U / val
;
1753 val
= (val
& 0x1f) | ((val
<< 3) & 0xff00);
1755 data
->fan_min
[nr
] = val
;
1756 goto write_min
; /* Leave fan divider alone */
1759 /* No min limit, alarm disabled */
1760 data
->fan_min
[nr
] = 255;
1761 new_div
= data
->fan_div
[nr
]; /* No change */
1762 dev_info(dev
, "fan%u low limit and alarm disabled\n", nr
+ 1);
1765 reg
= 1350000U / val
;
1766 if (reg
>= 128 * 255) {
1768 * Speed below this value cannot possibly be represented,
1769 * even with the highest divider (128)
1771 data
->fan_min
[nr
] = 254;
1772 new_div
= 7; /* 128 == (1 << 7) */
1774 "fan%u low limit %lu below minimum %u, set to minimum\n",
1775 nr
+ 1, val
, data
->fan_from_reg_min(254, 7));
1778 * Speed above this value cannot possibly be represented,
1779 * even with the lowest divider (1)
1781 data
->fan_min
[nr
] = 1;
1782 new_div
= 0; /* 1 == (1 << 0) */
1784 "fan%u low limit %lu above maximum %u, set to maximum\n",
1785 nr
+ 1, val
, data
->fan_from_reg_min(1, 0));
1788 * Automatically pick the best divider, i.e. the one such
1789 * that the min limit will correspond to a register value
1790 * in the 96..192 range
1793 while (reg
> 192 && new_div
< 7) {
1797 data
->fan_min
[nr
] = reg
;
1802 * Write both the fan clock divider (if it changed) and the new
1803 * fan min (unconditionally)
1805 if (new_div
!= data
->fan_div
[nr
]) {
1806 dev_dbg(dev
, "fan%u clock divider changed from %u to %u\n",
1807 nr
+ 1, div_from_reg(data
->fan_div
[nr
]),
1808 div_from_reg(new_div
));
1809 data
->fan_div
[nr
] = new_div
;
1810 nct6775_write_fan_div_common(data
, nr
);
1811 /* Give the chip time to sample a new speed value */
1812 data
->last_updated
= jiffies
;
1816 nct6775_write_value(data
, data
->REG_FAN_MIN
[nr
], data
->fan_min
[nr
]);
1817 mutex_unlock(&data
->update_lock
);
1823 show_fan_pulses(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1825 struct nct6775_data
*data
= nct6775_update_device(dev
);
1826 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1827 int p
= data
->fan_pulses
[sattr
->index
];
1829 return sprintf(buf
, "%d\n", p
? : 4);
1833 store_fan_pulses(struct device
*dev
, struct device_attribute
*attr
,
1834 const char *buf
, size_t count
)
1836 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1837 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1838 int nr
= sattr
->index
;
1843 err
= kstrtoul(buf
, 10, &val
);
1850 mutex_lock(&data
->update_lock
);
1851 data
->fan_pulses
[nr
] = val
& 3;
1852 reg
= nct6775_read_value(data
, data
->REG_FAN_PULSES
[nr
]);
1853 reg
&= ~(0x03 << data
->FAN_PULSE_SHIFT
[nr
]);
1854 reg
|= (val
& 3) << data
->FAN_PULSE_SHIFT
[nr
];
1855 nct6775_write_value(data
, data
->REG_FAN_PULSES
[nr
], reg
);
1856 mutex_unlock(&data
->update_lock
);
1861 static umode_t
nct6775_fan_is_visible(struct kobject
*kobj
,
1862 struct attribute
*attr
, int index
)
1864 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
1865 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1866 int fan
= index
/ 6; /* fan index */
1867 int nr
= index
% 6; /* attribute index */
1869 if (!(data
->has_fan
& (1 << fan
)))
1872 if (nr
== 1 && data
->ALARM_BITS
[FAN_ALARM_BASE
+ fan
] == -1)
1874 if (nr
== 2 && data
->BEEP_BITS
[FAN_ALARM_BASE
+ fan
] == -1)
1876 if (nr
== 4 && !(data
->has_fan_min
& (1 << fan
)))
1878 if (nr
== 5 && data
->kind
!= nct6775
)
1884 SENSOR_TEMPLATE(fan_input
, "fan%d_input", S_IRUGO
, show_fan
, NULL
, 0);
1885 SENSOR_TEMPLATE(fan_alarm
, "fan%d_alarm", S_IRUGO
, show_alarm
, NULL
,
1887 SENSOR_TEMPLATE(fan_beep
, "fan%d_beep", S_IWUSR
| S_IRUGO
, show_beep
,
1888 store_beep
, FAN_ALARM_BASE
);
1889 SENSOR_TEMPLATE(fan_pulses
, "fan%d_pulses", S_IWUSR
| S_IRUGO
, show_fan_pulses
,
1890 store_fan_pulses
, 0);
1891 SENSOR_TEMPLATE(fan_min
, "fan%d_min", S_IWUSR
| S_IRUGO
, show_fan_min
,
1893 SENSOR_TEMPLATE(fan_div
, "fan%d_div", S_IRUGO
, show_fan_div
, NULL
, 0);
1896 * nct6775_fan_is_visible uses the index into the following array
1897 * to determine if attributes should be created or not.
1898 * Any change in order or content must be matched.
1900 static struct sensor_device_template
*nct6775_attributes_fan_template
[] = {
1901 &sensor_dev_template_fan_input
,
1902 &sensor_dev_template_fan_alarm
, /* 1 */
1903 &sensor_dev_template_fan_beep
, /* 2 */
1904 &sensor_dev_template_fan_pulses
,
1905 &sensor_dev_template_fan_min
, /* 4 */
1906 &sensor_dev_template_fan_div
, /* 5 */
1910 static struct sensor_template_group nct6775_fan_template_group
= {
1911 .templates
= nct6775_attributes_fan_template
,
1912 .is_visible
= nct6775_fan_is_visible
,
1917 show_temp_label(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1919 struct nct6775_data
*data
= nct6775_update_device(dev
);
1920 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1921 int nr
= sattr
->index
;
1922 return sprintf(buf
, "%s\n", data
->temp_label
[data
->temp_src
[nr
]]);
1926 show_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1928 struct nct6775_data
*data
= nct6775_update_device(dev
);
1929 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1931 int index
= sattr
->index
;
1933 return sprintf(buf
, "%d\n", LM75_TEMP_FROM_REG(data
->temp
[index
][nr
]));
1937 store_temp(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
1940 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1941 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1943 int index
= sattr
->index
;
1947 err
= kstrtol(buf
, 10, &val
);
1951 mutex_lock(&data
->update_lock
);
1952 data
->temp
[index
][nr
] = LM75_TEMP_TO_REG(val
);
1953 nct6775_write_temp(data
, data
->reg_temp
[index
][nr
],
1954 data
->temp
[index
][nr
]);
1955 mutex_unlock(&data
->update_lock
);
1960 show_temp_offset(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1962 struct nct6775_data
*data
= nct6775_update_device(dev
);
1963 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1965 return sprintf(buf
, "%d\n", data
->temp_offset
[sattr
->index
] * 1000);
1969 store_temp_offset(struct device
*dev
, struct device_attribute
*attr
,
1970 const char *buf
, size_t count
)
1972 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1973 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1974 int nr
= sattr
->index
;
1978 err
= kstrtol(buf
, 10, &val
);
1982 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), -128, 127);
1984 mutex_lock(&data
->update_lock
);
1985 data
->temp_offset
[nr
] = val
;
1986 nct6775_write_value(data
, data
->REG_TEMP_OFFSET
[nr
], val
);
1987 mutex_unlock(&data
->update_lock
);
1993 show_temp_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1995 struct nct6775_data
*data
= nct6775_update_device(dev
);
1996 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1997 int nr
= sattr
->index
;
1998 return sprintf(buf
, "%d\n", (int)data
->temp_type
[nr
]);
2002 store_temp_type(struct device
*dev
, struct device_attribute
*attr
,
2003 const char *buf
, size_t count
)
2005 struct nct6775_data
*data
= nct6775_update_device(dev
);
2006 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2007 int nr
= sattr
->index
;
2010 u8 vbat
, diode
, vbit
, dbit
;
2012 err
= kstrtoul(buf
, 10, &val
);
2016 if (val
!= 1 && val
!= 3 && val
!= 4)
2019 mutex_lock(&data
->update_lock
);
2021 data
->temp_type
[nr
] = val
;
2023 dbit
= data
->DIODE_MASK
<< nr
;
2024 vbat
= nct6775_read_value(data
, data
->REG_VBAT
) & ~vbit
;
2025 diode
= nct6775_read_value(data
, data
->REG_DIODE
) & ~dbit
;
2027 case 1: /* CPU diode (diode, current mode) */
2031 case 3: /* diode, voltage mode */
2034 case 4: /* thermistor */
2037 nct6775_write_value(data
, data
->REG_VBAT
, vbat
);
2038 nct6775_write_value(data
, data
->REG_DIODE
, diode
);
2040 mutex_unlock(&data
->update_lock
);
2044 static umode_t
nct6775_temp_is_visible(struct kobject
*kobj
,
2045 struct attribute
*attr
, int index
)
2047 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
2048 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2049 int temp
= index
/ 10; /* temp index */
2050 int nr
= index
% 10; /* attribute index */
2052 if (!(data
->have_temp
& (1 << temp
)))
2055 if (nr
== 2 && find_temp_source(data
, temp
, data
->num_temp_alarms
) < 0)
2056 return 0; /* alarm */
2058 if (nr
== 3 && find_temp_source(data
, temp
, data
->num_temp_beeps
) < 0)
2059 return 0; /* beep */
2061 if (nr
== 4 && !data
->reg_temp
[1][temp
]) /* max */
2064 if (nr
== 5 && !data
->reg_temp
[2][temp
]) /* max_hyst */
2067 if (nr
== 6 && !data
->reg_temp
[3][temp
]) /* crit */
2070 if (nr
== 7 && !data
->reg_temp
[4][temp
]) /* lcrit */
2073 /* offset and type only apply to fixed sensors */
2074 if (nr
> 7 && !(data
->have_temp_fixed
& (1 << temp
)))
2080 SENSOR_TEMPLATE_2(temp_input
, "temp%d_input", S_IRUGO
, show_temp
, NULL
, 0, 0);
2081 SENSOR_TEMPLATE(temp_label
, "temp%d_label", S_IRUGO
, show_temp_label
, NULL
, 0);
2082 SENSOR_TEMPLATE_2(temp_max
, "temp%d_max", S_IRUGO
| S_IWUSR
, show_temp
,
2084 SENSOR_TEMPLATE_2(temp_max_hyst
, "temp%d_max_hyst", S_IRUGO
| S_IWUSR
,
2085 show_temp
, store_temp
, 0, 2);
2086 SENSOR_TEMPLATE_2(temp_crit
, "temp%d_crit", S_IRUGO
| S_IWUSR
, show_temp
,
2088 SENSOR_TEMPLATE_2(temp_lcrit
, "temp%d_lcrit", S_IRUGO
| S_IWUSR
, show_temp
,
2090 SENSOR_TEMPLATE(temp_offset
, "temp%d_offset", S_IRUGO
| S_IWUSR
,
2091 show_temp_offset
, store_temp_offset
, 0);
2092 SENSOR_TEMPLATE(temp_type
, "temp%d_type", S_IRUGO
| S_IWUSR
, show_temp_type
,
2093 store_temp_type
, 0);
2094 SENSOR_TEMPLATE(temp_alarm
, "temp%d_alarm", S_IRUGO
, show_temp_alarm
, NULL
, 0);
2095 SENSOR_TEMPLATE(temp_beep
, "temp%d_beep", S_IRUGO
| S_IWUSR
, show_temp_beep
,
2096 store_temp_beep
, 0);
2099 * nct6775_temp_is_visible uses the index into the following array
2100 * to determine if attributes should be created or not.
2101 * Any change in order or content must be matched.
2103 static struct sensor_device_template
*nct6775_attributes_temp_template
[] = {
2104 &sensor_dev_template_temp_input
,
2105 &sensor_dev_template_temp_label
,
2106 &sensor_dev_template_temp_alarm
, /* 2 */
2107 &sensor_dev_template_temp_beep
, /* 3 */
2108 &sensor_dev_template_temp_max
, /* 4 */
2109 &sensor_dev_template_temp_max_hyst
, /* 5 */
2110 &sensor_dev_template_temp_crit
, /* 6 */
2111 &sensor_dev_template_temp_lcrit
, /* 7 */
2112 &sensor_dev_template_temp_offset
, /* 8 */
2113 &sensor_dev_template_temp_type
, /* 9 */
2117 static struct sensor_template_group nct6775_temp_template_group
= {
2118 .templates
= nct6775_attributes_temp_template
,
2119 .is_visible
= nct6775_temp_is_visible
,
2124 show_pwm_mode(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2126 struct nct6775_data
*data
= nct6775_update_device(dev
);
2127 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2129 return sprintf(buf
, "%d\n", !data
->pwm_mode
[sattr
->index
]);
2133 store_pwm_mode(struct device
*dev
, struct device_attribute
*attr
,
2134 const char *buf
, size_t count
)
2136 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2137 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2138 int nr
= sattr
->index
;
2143 err
= kstrtoul(buf
, 10, &val
);
2150 /* Setting DC mode is not supported for all chips/channels */
2151 if (data
->REG_PWM_MODE
[nr
] == 0) {
2157 mutex_lock(&data
->update_lock
);
2158 data
->pwm_mode
[nr
] = val
;
2159 reg
= nct6775_read_value(data
, data
->REG_PWM_MODE
[nr
]);
2160 reg
&= ~data
->PWM_MODE_MASK
[nr
];
2162 reg
|= data
->PWM_MODE_MASK
[nr
];
2163 nct6775_write_value(data
, data
->REG_PWM_MODE
[nr
], reg
);
2164 mutex_unlock(&data
->update_lock
);
2169 show_pwm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2171 struct nct6775_data
*data
= nct6775_update_device(dev
);
2172 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2174 int index
= sattr
->index
;
2178 * For automatic fan control modes, show current pwm readings.
2179 * Otherwise, show the configured value.
2181 if (index
== 0 && data
->pwm_enable
[nr
] > manual
)
2182 pwm
= nct6775_read_value(data
, data
->REG_PWM_READ
[nr
]);
2184 pwm
= data
->pwm
[index
][nr
];
2186 return sprintf(buf
, "%d\n", pwm
);
2190 store_pwm(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
2193 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2194 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2196 int index
= sattr
->index
;
2198 int minval
[7] = { 0, 1, 1, data
->pwm
[2][nr
], 0, 0, 0 };
2200 = { 255, 255, data
->pwm
[3][nr
] ? : 255, 255, 255, 255, 255 };
2204 err
= kstrtoul(buf
, 10, &val
);
2207 val
= clamp_val(val
, minval
[index
], maxval
[index
]);
2209 mutex_lock(&data
->update_lock
);
2210 data
->pwm
[index
][nr
] = val
;
2211 nct6775_write_value(data
, data
->REG_PWM
[index
][nr
], val
);
2212 if (index
== 2) { /* floor: disable if val == 0 */
2213 reg
= nct6775_read_value(data
, data
->REG_TEMP_SEL
[nr
]);
2217 nct6775_write_value(data
, data
->REG_TEMP_SEL
[nr
], reg
);
2219 mutex_unlock(&data
->update_lock
);
2223 /* Returns 0 if OK, -EINVAL otherwise */
2224 static int check_trip_points(struct nct6775_data
*data
, int nr
)
2228 for (i
= 0; i
< data
->auto_pwm_num
- 1; i
++) {
2229 if (data
->auto_temp
[nr
][i
] > data
->auto_temp
[nr
][i
+ 1])
2232 for (i
= 0; i
< data
->auto_pwm_num
- 1; i
++) {
2233 if (data
->auto_pwm
[nr
][i
] > data
->auto_pwm
[nr
][i
+ 1])
2236 /* validate critical temperature and pwm if enabled (pwm > 0) */
2237 if (data
->auto_pwm
[nr
][data
->auto_pwm_num
]) {
2238 if (data
->auto_temp
[nr
][data
->auto_pwm_num
- 1] >
2239 data
->auto_temp
[nr
][data
->auto_pwm_num
] ||
2240 data
->auto_pwm
[nr
][data
->auto_pwm_num
- 1] >
2241 data
->auto_pwm
[nr
][data
->auto_pwm_num
])
2247 static void pwm_update_registers(struct nct6775_data
*data
, int nr
)
2251 switch (data
->pwm_enable
[nr
]) {
2256 reg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[nr
]);
2257 reg
= (reg
& ~data
->tolerance_mask
) |
2258 (data
->target_speed_tolerance
[nr
] & data
->tolerance_mask
);
2259 nct6775_write_value(data
, data
->REG_FAN_MODE
[nr
], reg
);
2260 nct6775_write_value(data
, data
->REG_TARGET
[nr
],
2261 data
->target_speed
[nr
] & 0xff);
2262 if (data
->REG_TOLERANCE_H
) {
2263 reg
= (data
->target_speed
[nr
] >> 8) & 0x0f;
2264 reg
|= (data
->target_speed_tolerance
[nr
] & 0x38) << 1;
2265 nct6775_write_value(data
,
2266 data
->REG_TOLERANCE_H
[nr
],
2270 case thermal_cruise
:
2271 nct6775_write_value(data
, data
->REG_TARGET
[nr
],
2272 data
->target_temp
[nr
]);
2275 reg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[nr
]);
2276 reg
= (reg
& ~data
->tolerance_mask
) |
2277 data
->temp_tolerance
[0][nr
];
2278 nct6775_write_value(data
, data
->REG_FAN_MODE
[nr
], reg
);
2284 show_pwm_enable(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2286 struct nct6775_data
*data
= nct6775_update_device(dev
);
2287 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2289 return sprintf(buf
, "%d\n", data
->pwm_enable
[sattr
->index
]);
2293 store_pwm_enable(struct device
*dev
, struct device_attribute
*attr
,
2294 const char *buf
, size_t count
)
2296 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2297 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2298 int nr
= sattr
->index
;
2303 err
= kstrtoul(buf
, 10, &val
);
2310 if (val
== sf3
&& data
->kind
!= nct6775
)
2313 if (val
== sf4
&& check_trip_points(data
, nr
)) {
2314 dev_err(dev
, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2315 dev_err(dev
, "Adjust trip points and try again\n");
2319 mutex_lock(&data
->update_lock
);
2320 data
->pwm_enable
[nr
] = val
;
2323 * turn off pwm control: select manual mode, set pwm to maximum
2325 data
->pwm
[0][nr
] = 255;
2326 nct6775_write_value(data
, data
->REG_PWM
[0][nr
], 255);
2328 pwm_update_registers(data
, nr
);
2329 reg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[nr
]);
2331 reg
|= pwm_enable_to_reg(val
) << 4;
2332 nct6775_write_value(data
, data
->REG_FAN_MODE
[nr
], reg
);
2333 mutex_unlock(&data
->update_lock
);
2338 show_pwm_temp_sel_common(struct nct6775_data
*data
, char *buf
, int src
)
2342 for (i
= 0; i
< NUM_TEMP
; i
++) {
2343 if (!(data
->have_temp
& (1 << i
)))
2345 if (src
== data
->temp_src
[i
]) {
2351 return sprintf(buf
, "%d\n", sel
);
2355 show_pwm_temp_sel(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2357 struct nct6775_data
*data
= nct6775_update_device(dev
);
2358 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2359 int index
= sattr
->index
;
2361 return show_pwm_temp_sel_common(data
, buf
, data
->pwm_temp_sel
[index
]);
2365 store_pwm_temp_sel(struct device
*dev
, struct device_attribute
*attr
,
2366 const char *buf
, size_t count
)
2368 struct nct6775_data
*data
= nct6775_update_device(dev
);
2369 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2370 int nr
= sattr
->index
;
2374 err
= kstrtoul(buf
, 10, &val
);
2377 if (val
== 0 || val
> NUM_TEMP
)
2379 if (!(data
->have_temp
& (1 << (val
- 1))) || !data
->temp_src
[val
- 1])
2382 mutex_lock(&data
->update_lock
);
2383 src
= data
->temp_src
[val
- 1];
2384 data
->pwm_temp_sel
[nr
] = src
;
2385 reg
= nct6775_read_value(data
, data
->REG_TEMP_SEL
[nr
]);
2388 nct6775_write_value(data
, data
->REG_TEMP_SEL
[nr
], reg
);
2389 mutex_unlock(&data
->update_lock
);
2395 show_pwm_weight_temp_sel(struct device
*dev
, struct device_attribute
*attr
,
2398 struct nct6775_data
*data
= nct6775_update_device(dev
);
2399 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2400 int index
= sattr
->index
;
2402 return show_pwm_temp_sel_common(data
, buf
,
2403 data
->pwm_weight_temp_sel
[index
]);
2407 store_pwm_weight_temp_sel(struct device
*dev
, struct device_attribute
*attr
,
2408 const char *buf
, size_t count
)
2410 struct nct6775_data
*data
= nct6775_update_device(dev
);
2411 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2412 int nr
= sattr
->index
;
2416 err
= kstrtoul(buf
, 10, &val
);
2421 if (val
&& (!(data
->have_temp
& (1 << (val
- 1))) ||
2422 !data
->temp_src
[val
- 1]))
2425 mutex_lock(&data
->update_lock
);
2427 src
= data
->temp_src
[val
- 1];
2428 data
->pwm_weight_temp_sel
[nr
] = src
;
2429 reg
= nct6775_read_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
]);
2431 reg
|= (src
| 0x80);
2432 nct6775_write_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
], reg
);
2434 data
->pwm_weight_temp_sel
[nr
] = 0;
2435 reg
= nct6775_read_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
]);
2437 nct6775_write_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
], reg
);
2439 mutex_unlock(&data
->update_lock
);
2445 show_target_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2447 struct nct6775_data
*data
= nct6775_update_device(dev
);
2448 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2450 return sprintf(buf
, "%d\n", data
->target_temp
[sattr
->index
] * 1000);
2454 store_target_temp(struct device
*dev
, struct device_attribute
*attr
,
2455 const char *buf
, size_t count
)
2457 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2458 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2459 int nr
= sattr
->index
;
2463 err
= kstrtoul(buf
, 10, &val
);
2467 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), 0,
2468 data
->target_temp_mask
);
2470 mutex_lock(&data
->update_lock
);
2471 data
->target_temp
[nr
] = val
;
2472 pwm_update_registers(data
, nr
);
2473 mutex_unlock(&data
->update_lock
);
2478 show_target_speed(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2480 struct nct6775_data
*data
= nct6775_update_device(dev
);
2481 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2482 int nr
= sattr
->index
;
2484 return sprintf(buf
, "%d\n",
2485 fan_from_reg16(data
->target_speed
[nr
],
2486 data
->fan_div
[nr
]));
2490 store_target_speed(struct device
*dev
, struct device_attribute
*attr
,
2491 const char *buf
, size_t count
)
2493 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2494 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2495 int nr
= sattr
->index
;
2500 err
= kstrtoul(buf
, 10, &val
);
2504 val
= clamp_val(val
, 0, 1350000U);
2505 speed
= fan_to_reg(val
, data
->fan_div
[nr
]);
2507 mutex_lock(&data
->update_lock
);
2508 data
->target_speed
[nr
] = speed
;
2509 pwm_update_registers(data
, nr
);
2510 mutex_unlock(&data
->update_lock
);
2515 show_temp_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2518 struct nct6775_data
*data
= nct6775_update_device(dev
);
2519 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2521 int index
= sattr
->index
;
2523 return sprintf(buf
, "%d\n", data
->temp_tolerance
[index
][nr
] * 1000);
2527 store_temp_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2528 const char *buf
, size_t count
)
2530 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2531 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2533 int index
= sattr
->index
;
2537 err
= kstrtoul(buf
, 10, &val
);
2541 /* Limit tolerance as needed */
2542 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), 0, data
->tolerance_mask
);
2544 mutex_lock(&data
->update_lock
);
2545 data
->temp_tolerance
[index
][nr
] = val
;
2547 pwm_update_registers(data
, nr
);
2549 nct6775_write_value(data
,
2550 data
->REG_CRITICAL_TEMP_TOLERANCE
[nr
],
2552 mutex_unlock(&data
->update_lock
);
2557 * Fan speed tolerance is a tricky beast, since the associated register is
2558 * a tick counter, but the value is reported and configured as rpm.
2559 * Compute resulting low and high rpm values and report the difference.
2562 show_speed_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2565 struct nct6775_data
*data
= nct6775_update_device(dev
);
2566 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2567 int nr
= sattr
->index
;
2568 int low
= data
->target_speed
[nr
] - data
->target_speed_tolerance
[nr
];
2569 int high
= data
->target_speed
[nr
] + data
->target_speed_tolerance
[nr
];
2579 tolerance
= (fan_from_reg16(low
, data
->fan_div
[nr
])
2580 - fan_from_reg16(high
, data
->fan_div
[nr
])) / 2;
2582 return sprintf(buf
, "%d\n", tolerance
);
2586 store_speed_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2587 const char *buf
, size_t count
)
2589 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2590 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2591 int nr
= sattr
->index
;
2596 err
= kstrtoul(buf
, 10, &val
);
2600 high
= fan_from_reg16(data
->target_speed
[nr
],
2601 data
->fan_div
[nr
]) + val
;
2602 low
= fan_from_reg16(data
->target_speed
[nr
],
2603 data
->fan_div
[nr
]) - val
;
2609 val
= (fan_to_reg(low
, data
->fan_div
[nr
]) -
2610 fan_to_reg(high
, data
->fan_div
[nr
])) / 2;
2612 /* Limit tolerance as needed */
2613 val
= clamp_val(val
, 0, data
->speed_tolerance_limit
);
2615 mutex_lock(&data
->update_lock
);
2616 data
->target_speed_tolerance
[nr
] = val
;
2617 pwm_update_registers(data
, nr
);
2618 mutex_unlock(&data
->update_lock
);
2622 SENSOR_TEMPLATE_2(pwm
, "pwm%d", S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
, 0, 0);
2623 SENSOR_TEMPLATE(pwm_mode
, "pwm%d_mode", S_IWUSR
| S_IRUGO
, show_pwm_mode
,
2625 SENSOR_TEMPLATE(pwm_enable
, "pwm%d_enable", S_IWUSR
| S_IRUGO
, show_pwm_enable
,
2626 store_pwm_enable
, 0);
2627 SENSOR_TEMPLATE(pwm_temp_sel
, "pwm%d_temp_sel", S_IWUSR
| S_IRUGO
,
2628 show_pwm_temp_sel
, store_pwm_temp_sel
, 0);
2629 SENSOR_TEMPLATE(pwm_target_temp
, "pwm%d_target_temp", S_IWUSR
| S_IRUGO
,
2630 show_target_temp
, store_target_temp
, 0);
2631 SENSOR_TEMPLATE(fan_target
, "fan%d_target", S_IWUSR
| S_IRUGO
,
2632 show_target_speed
, store_target_speed
, 0);
2633 SENSOR_TEMPLATE(fan_tolerance
, "fan%d_tolerance", S_IWUSR
| S_IRUGO
,
2634 show_speed_tolerance
, store_speed_tolerance
, 0);
2636 /* Smart Fan registers */
2639 show_weight_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2641 struct nct6775_data
*data
= nct6775_update_device(dev
);
2642 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2644 int index
= sattr
->index
;
2646 return sprintf(buf
, "%d\n", data
->weight_temp
[index
][nr
] * 1000);
2650 store_weight_temp(struct device
*dev
, struct device_attribute
*attr
,
2651 const char *buf
, size_t count
)
2653 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2654 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2656 int index
= sattr
->index
;
2660 err
= kstrtoul(buf
, 10, &val
);
2664 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), 0, 255);
2666 mutex_lock(&data
->update_lock
);
2667 data
->weight_temp
[index
][nr
] = val
;
2668 nct6775_write_value(data
, data
->REG_WEIGHT_TEMP
[index
][nr
], val
);
2669 mutex_unlock(&data
->update_lock
);
2673 SENSOR_TEMPLATE(pwm_weight_temp_sel
, "pwm%d_weight_temp_sel", S_IWUSR
| S_IRUGO
,
2674 show_pwm_weight_temp_sel
, store_pwm_weight_temp_sel
, 0);
2675 SENSOR_TEMPLATE_2(pwm_weight_temp_step
, "pwm%d_weight_temp_step",
2676 S_IWUSR
| S_IRUGO
, show_weight_temp
, store_weight_temp
, 0, 0);
2677 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol
, "pwm%d_weight_temp_step_tol",
2678 S_IWUSR
| S_IRUGO
, show_weight_temp
, store_weight_temp
, 0, 1);
2679 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base
, "pwm%d_weight_temp_step_base",
2680 S_IWUSR
| S_IRUGO
, show_weight_temp
, store_weight_temp
, 0, 2);
2681 SENSOR_TEMPLATE_2(pwm_weight_duty_step
, "pwm%d_weight_duty_step",
2682 S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
, 0, 5);
2683 SENSOR_TEMPLATE_2(pwm_weight_duty_base
, "pwm%d_weight_duty_base",
2684 S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
, 0, 6);
2687 show_fan_time(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2689 struct nct6775_data
*data
= nct6775_update_device(dev
);
2690 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2692 int index
= sattr
->index
;
2694 return sprintf(buf
, "%d\n",
2695 step_time_from_reg(data
->fan_time
[index
][nr
],
2696 data
->pwm_mode
[nr
]));
2700 store_fan_time(struct device
*dev
, struct device_attribute
*attr
,
2701 const char *buf
, size_t count
)
2703 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2704 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2706 int index
= sattr
->index
;
2710 err
= kstrtoul(buf
, 10, &val
);
2714 val
= step_time_to_reg(val
, data
->pwm_mode
[nr
]);
2715 mutex_lock(&data
->update_lock
);
2716 data
->fan_time
[index
][nr
] = val
;
2717 nct6775_write_value(data
, data
->REG_FAN_TIME
[index
][nr
], val
);
2718 mutex_unlock(&data
->update_lock
);
2723 show_auto_pwm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2725 struct nct6775_data
*data
= nct6775_update_device(dev
);
2726 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2728 return sprintf(buf
, "%d\n", data
->auto_pwm
[sattr
->nr
][sattr
->index
]);
2732 store_auto_pwm(struct device
*dev
, struct device_attribute
*attr
,
2733 const char *buf
, size_t count
)
2735 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2736 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2738 int point
= sattr
->index
;
2743 err
= kstrtoul(buf
, 10, &val
);
2749 if (point
== data
->auto_pwm_num
) {
2750 if (data
->kind
!= nct6775
&& !val
)
2752 if (data
->kind
!= nct6779
&& val
)
2756 mutex_lock(&data
->update_lock
);
2757 data
->auto_pwm
[nr
][point
] = val
;
2758 if (point
< data
->auto_pwm_num
) {
2759 nct6775_write_value(data
,
2760 NCT6775_AUTO_PWM(data
, nr
, point
),
2761 data
->auto_pwm
[nr
][point
]);
2763 switch (data
->kind
) {
2765 /* disable if needed (pwm == 0) */
2766 reg
= nct6775_read_value(data
,
2767 NCT6775_REG_CRITICAL_ENAB
[nr
]);
2772 nct6775_write_value(data
, NCT6775_REG_CRITICAL_ENAB
[nr
],
2776 break; /* always enabled, nothing to do */
2780 nct6775_write_value(data
, data
->REG_CRITICAL_PWM
[nr
],
2782 reg
= nct6775_read_value(data
,
2783 data
->REG_CRITICAL_PWM_ENABLE
[nr
]);
2785 reg
&= ~data
->CRITICAL_PWM_ENABLE_MASK
;
2787 reg
|= data
->CRITICAL_PWM_ENABLE_MASK
;
2788 nct6775_write_value(data
,
2789 data
->REG_CRITICAL_PWM_ENABLE
[nr
],
2794 mutex_unlock(&data
->update_lock
);
2799 show_auto_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2801 struct nct6775_data
*data
= nct6775_update_device(dev
);
2802 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2804 int point
= sattr
->index
;
2807 * We don't know for sure if the temperature is signed or unsigned.
2808 * Assume it is unsigned.
2810 return sprintf(buf
, "%d\n", data
->auto_temp
[nr
][point
] * 1000);
2814 store_auto_temp(struct device
*dev
, struct device_attribute
*attr
,
2815 const char *buf
, size_t count
)
2817 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2818 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2820 int point
= sattr
->index
;
2824 err
= kstrtoul(buf
, 10, &val
);
2830 mutex_lock(&data
->update_lock
);
2831 data
->auto_temp
[nr
][point
] = DIV_ROUND_CLOSEST(val
, 1000);
2832 if (point
< data
->auto_pwm_num
) {
2833 nct6775_write_value(data
,
2834 NCT6775_AUTO_TEMP(data
, nr
, point
),
2835 data
->auto_temp
[nr
][point
]);
2837 nct6775_write_value(data
, data
->REG_CRITICAL_TEMP
[nr
],
2838 data
->auto_temp
[nr
][point
]);
2840 mutex_unlock(&data
->update_lock
);
2844 static umode_t
nct6775_pwm_is_visible(struct kobject
*kobj
,
2845 struct attribute
*attr
, int index
)
2847 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
2848 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2849 int pwm
= index
/ 36; /* pwm index */
2850 int nr
= index
% 36; /* attribute index */
2852 if (!(data
->has_pwm
& (1 << pwm
)))
2855 if (nr
== 19 && data
->REG_PWM
[3] == NULL
) /* pwm_max */
2857 if (nr
== 20 && data
->REG_PWM
[4] == NULL
) /* pwm_step */
2859 if (nr
== 21 && data
->REG_PWM
[6] == NULL
) /* weight_duty_base */
2862 if (nr
>= 22 && nr
<= 35) { /* auto point */
2863 int api
= (nr
- 22) / 2; /* auto point index */
2865 if (api
> data
->auto_pwm_num
)
2871 SENSOR_TEMPLATE_2(pwm_stop_time
, "pwm%d_stop_time", S_IWUSR
| S_IRUGO
,
2872 show_fan_time
, store_fan_time
, 0, 0);
2873 SENSOR_TEMPLATE_2(pwm_step_up_time
, "pwm%d_step_up_time", S_IWUSR
| S_IRUGO
,
2874 show_fan_time
, store_fan_time
, 0, 1);
2875 SENSOR_TEMPLATE_2(pwm_step_down_time
, "pwm%d_step_down_time", S_IWUSR
| S_IRUGO
,
2876 show_fan_time
, store_fan_time
, 0, 2);
2877 SENSOR_TEMPLATE_2(pwm_start
, "pwm%d_start", S_IWUSR
| S_IRUGO
, show_pwm
,
2879 SENSOR_TEMPLATE_2(pwm_floor
, "pwm%d_floor", S_IWUSR
| S_IRUGO
, show_pwm
,
2881 SENSOR_TEMPLATE_2(pwm_temp_tolerance
, "pwm%d_temp_tolerance", S_IWUSR
| S_IRUGO
,
2882 show_temp_tolerance
, store_temp_tolerance
, 0, 0);
2883 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance
, "pwm%d_crit_temp_tolerance",
2884 S_IWUSR
| S_IRUGO
, show_temp_tolerance
, store_temp_tolerance
,
2887 SENSOR_TEMPLATE_2(pwm_max
, "pwm%d_max", S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
,
2890 SENSOR_TEMPLATE_2(pwm_step
, "pwm%d_step", S_IWUSR
| S_IRUGO
, show_pwm
,
2893 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm
, "pwm%d_auto_point1_pwm",
2894 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 0);
2895 SENSOR_TEMPLATE_2(pwm_auto_point1_temp
, "pwm%d_auto_point1_temp",
2896 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 0);
2898 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm
, "pwm%d_auto_point2_pwm",
2899 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 1);
2900 SENSOR_TEMPLATE_2(pwm_auto_point2_temp
, "pwm%d_auto_point2_temp",
2901 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 1);
2903 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm
, "pwm%d_auto_point3_pwm",
2904 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 2);
2905 SENSOR_TEMPLATE_2(pwm_auto_point3_temp
, "pwm%d_auto_point3_temp",
2906 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 2);
2908 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm
, "pwm%d_auto_point4_pwm",
2909 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 3);
2910 SENSOR_TEMPLATE_2(pwm_auto_point4_temp
, "pwm%d_auto_point4_temp",
2911 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 3);
2913 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm
, "pwm%d_auto_point5_pwm",
2914 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 4);
2915 SENSOR_TEMPLATE_2(pwm_auto_point5_temp
, "pwm%d_auto_point5_temp",
2916 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 4);
2918 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm
, "pwm%d_auto_point6_pwm",
2919 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 5);
2920 SENSOR_TEMPLATE_2(pwm_auto_point6_temp
, "pwm%d_auto_point6_temp",
2921 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 5);
2923 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm
, "pwm%d_auto_point7_pwm",
2924 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 6);
2925 SENSOR_TEMPLATE_2(pwm_auto_point7_temp
, "pwm%d_auto_point7_temp",
2926 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 6);
2929 * nct6775_pwm_is_visible uses the index into the following array
2930 * to determine if attributes should be created or not.
2931 * Any change in order or content must be matched.
2933 static struct sensor_device_template
*nct6775_attributes_pwm_template
[] = {
2934 &sensor_dev_template_pwm
,
2935 &sensor_dev_template_pwm_mode
,
2936 &sensor_dev_template_pwm_enable
,
2937 &sensor_dev_template_pwm_temp_sel
,
2938 &sensor_dev_template_pwm_temp_tolerance
,
2939 &sensor_dev_template_pwm_crit_temp_tolerance
,
2940 &sensor_dev_template_pwm_target_temp
,
2941 &sensor_dev_template_fan_target
,
2942 &sensor_dev_template_fan_tolerance
,
2943 &sensor_dev_template_pwm_stop_time
,
2944 &sensor_dev_template_pwm_step_up_time
,
2945 &sensor_dev_template_pwm_step_down_time
,
2946 &sensor_dev_template_pwm_start
,
2947 &sensor_dev_template_pwm_floor
,
2948 &sensor_dev_template_pwm_weight_temp_sel
,
2949 &sensor_dev_template_pwm_weight_temp_step
,
2950 &sensor_dev_template_pwm_weight_temp_step_tol
,
2951 &sensor_dev_template_pwm_weight_temp_step_base
,
2952 &sensor_dev_template_pwm_weight_duty_step
,
2953 &sensor_dev_template_pwm_max
, /* 19 */
2954 &sensor_dev_template_pwm_step
, /* 20 */
2955 &sensor_dev_template_pwm_weight_duty_base
, /* 21 */
2956 &sensor_dev_template_pwm_auto_point1_pwm
, /* 22 */
2957 &sensor_dev_template_pwm_auto_point1_temp
,
2958 &sensor_dev_template_pwm_auto_point2_pwm
,
2959 &sensor_dev_template_pwm_auto_point2_temp
,
2960 &sensor_dev_template_pwm_auto_point3_pwm
,
2961 &sensor_dev_template_pwm_auto_point3_temp
,
2962 &sensor_dev_template_pwm_auto_point4_pwm
,
2963 &sensor_dev_template_pwm_auto_point4_temp
,
2964 &sensor_dev_template_pwm_auto_point5_pwm
,
2965 &sensor_dev_template_pwm_auto_point5_temp
,
2966 &sensor_dev_template_pwm_auto_point6_pwm
,
2967 &sensor_dev_template_pwm_auto_point6_temp
,
2968 &sensor_dev_template_pwm_auto_point7_pwm
,
2969 &sensor_dev_template_pwm_auto_point7_temp
, /* 35 */
2974 static struct sensor_template_group nct6775_pwm_template_group
= {
2975 .templates
= nct6775_attributes_pwm_template
,
2976 .is_visible
= nct6775_pwm_is_visible
,
2981 show_vid(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2983 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2984 return sprintf(buf
, "%d\n", vid_from_reg(data
->vid
, data
->vrm
));
2987 static DEVICE_ATTR(cpu0_vid
, S_IRUGO
, show_vid
, NULL
);
2989 /* Case open detection */
2992 clear_caseopen(struct device
*dev
, struct device_attribute
*attr
,
2993 const char *buf
, size_t count
)
2995 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2996 int nr
= to_sensor_dev_attr(attr
)->index
- INTRUSION_ALARM_BASE
;
3001 if (kstrtoul(buf
, 10, &val
) || val
!= 0)
3004 mutex_lock(&data
->update_lock
);
3007 * Use CR registers to clear caseopen status.
3008 * The CR registers are the same for all chips, and not all chips
3009 * support clearing the caseopen status through "regular" registers.
3011 ret
= superio_enter(data
->sioreg
);
3017 superio_select(data
->sioreg
, NCT6775_LD_ACPI
);
3018 reg
= superio_inb(data
->sioreg
, NCT6775_REG_CR_CASEOPEN_CLR
[nr
]);
3019 reg
|= NCT6775_CR_CASEOPEN_CLR_MASK
[nr
];
3020 superio_outb(data
->sioreg
, NCT6775_REG_CR_CASEOPEN_CLR
[nr
], reg
);
3021 reg
&= ~NCT6775_CR_CASEOPEN_CLR_MASK
[nr
];
3022 superio_outb(data
->sioreg
, NCT6775_REG_CR_CASEOPEN_CLR
[nr
], reg
);
3023 superio_exit(data
->sioreg
);
3025 data
->valid
= false; /* Force cache refresh */
3027 mutex_unlock(&data
->update_lock
);
3031 static SENSOR_DEVICE_ATTR(intrusion0_alarm
, S_IWUSR
| S_IRUGO
, show_alarm
,
3032 clear_caseopen
, INTRUSION_ALARM_BASE
);
3033 static SENSOR_DEVICE_ATTR(intrusion1_alarm
, S_IWUSR
| S_IRUGO
, show_alarm
,
3034 clear_caseopen
, INTRUSION_ALARM_BASE
+ 1);
3035 static SENSOR_DEVICE_ATTR(intrusion0_beep
, S_IWUSR
| S_IRUGO
, show_beep
,
3036 store_beep
, INTRUSION_ALARM_BASE
);
3037 static SENSOR_DEVICE_ATTR(intrusion1_beep
, S_IWUSR
| S_IRUGO
, show_beep
,
3038 store_beep
, INTRUSION_ALARM_BASE
+ 1);
3039 static SENSOR_DEVICE_ATTR(beep_enable
, S_IWUSR
| S_IRUGO
, show_beep
,
3040 store_beep
, BEEP_ENABLE_BASE
);
3042 static umode_t
nct6775_other_is_visible(struct kobject
*kobj
,
3043 struct attribute
*attr
, int index
)
3045 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
3046 struct nct6775_data
*data
= dev_get_drvdata(dev
);
3048 if (index
== 0 && !data
->have_vid
)
3051 if (index
== 1 || index
== 2) {
3052 if (data
->ALARM_BITS
[INTRUSION_ALARM_BASE
+ index
- 1] < 0)
3056 if (index
== 3 || index
== 4) {
3057 if (data
->BEEP_BITS
[INTRUSION_ALARM_BASE
+ index
- 3] < 0)
3065 * nct6775_other_is_visible uses the index into the following array
3066 * to determine if attributes should be created or not.
3067 * Any change in order or content must be matched.
3069 static struct attribute
*nct6775_attributes_other
[] = {
3070 &dev_attr_cpu0_vid
.attr
, /* 0 */
3071 &sensor_dev_attr_intrusion0_alarm
.dev_attr
.attr
, /* 1 */
3072 &sensor_dev_attr_intrusion1_alarm
.dev_attr
.attr
, /* 2 */
3073 &sensor_dev_attr_intrusion0_beep
.dev_attr
.attr
, /* 3 */
3074 &sensor_dev_attr_intrusion1_beep
.dev_attr
.attr
, /* 4 */
3075 &sensor_dev_attr_beep_enable
.dev_attr
.attr
, /* 5 */
3080 static const struct attribute_group nct6775_group_other
= {
3081 .attrs
= nct6775_attributes_other
,
3082 .is_visible
= nct6775_other_is_visible
,
3085 static inline void nct6775_init_device(struct nct6775_data
*data
)
3090 /* Start monitoring if needed */
3091 if (data
->REG_CONFIG
) {
3092 tmp
= nct6775_read_value(data
, data
->REG_CONFIG
);
3094 nct6775_write_value(data
, data
->REG_CONFIG
, tmp
| 0x01);
3097 /* Enable temperature sensors if needed */
3098 for (i
= 0; i
< NUM_TEMP
; i
++) {
3099 if (!(data
->have_temp
& (1 << i
)))
3101 if (!data
->reg_temp_config
[i
])
3103 tmp
= nct6775_read_value(data
, data
->reg_temp_config
[i
]);
3105 nct6775_write_value(data
, data
->reg_temp_config
[i
],
3109 /* Enable VBAT monitoring if needed */
3110 tmp
= nct6775_read_value(data
, data
->REG_VBAT
);
3112 nct6775_write_value(data
, data
->REG_VBAT
, tmp
| 0x01);
3114 diode
= nct6775_read_value(data
, data
->REG_DIODE
);
3116 for (i
= 0; i
< data
->temp_fixed_num
; i
++) {
3117 if (!(data
->have_temp_fixed
& (1 << i
)))
3119 if ((tmp
& (data
->DIODE_MASK
<< i
))) /* diode */
3121 = 3 - ((diode
>> i
) & data
->DIODE_MASK
);
3122 else /* thermistor */
3123 data
->temp_type
[i
] = 4;
3128 nct6775_check_fan_inputs(struct nct6775_data
*data
)
3130 bool fan3pin
, fan4pin
, fan4min
, fan5pin
, fan6pin
;
3131 bool pwm3pin
, pwm4pin
, pwm5pin
, pwm6pin
;
3132 int sioreg
= data
->sioreg
;
3135 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3136 if (data
->kind
== nct6775
) {
3137 regval
= superio_inb(sioreg
, 0x2c);
3139 fan3pin
= regval
& (1 << 6);
3140 pwm3pin
= regval
& (1 << 7);
3142 /* On NCT6775, fan4 shares pins with the fdc interface */
3143 fan4pin
= !(superio_inb(sioreg
, 0x2A) & 0x80);
3150 } else if (data
->kind
== nct6776
) {
3151 bool gpok
= superio_inb(sioreg
, 0x27) & 0x80;
3153 superio_select(sioreg
, NCT6775_LD_HWM
);
3154 regval
= superio_inb(sioreg
, SIO_REG_ENABLE
);
3159 fan3pin
= !(superio_inb(sioreg
, 0x24) & 0x40);
3164 fan4pin
= superio_inb(sioreg
, 0x1C) & 0x01;
3169 fan5pin
= superio_inb(sioreg
, 0x1C) & 0x02;
3177 } else if (data
->kind
== nct6106
) {
3178 regval
= superio_inb(sioreg
, 0x24);
3179 fan3pin
= !(regval
& 0x80);
3180 pwm3pin
= regval
& 0x08;
3189 } else { /* NCT6779D or NCT6791D */
3190 regval
= superio_inb(sioreg
, 0x1c);
3192 fan3pin
= !(regval
& (1 << 5));
3193 fan4pin
= !(regval
& (1 << 6));
3194 fan5pin
= !(regval
& (1 << 7));
3196 pwm3pin
= !(regval
& (1 << 0));
3197 pwm4pin
= !(regval
& (1 << 1));
3198 pwm5pin
= !(regval
& (1 << 2));
3202 if (data
->kind
== nct6791
) {
3203 regval
= superio_inb(sioreg
, 0x2d);
3204 fan6pin
= (regval
& (1 << 1));
3205 pwm6pin
= (regval
& (1 << 0));
3206 } else { /* NCT6779D */
3212 /* fan 1 and 2 (0x03) are always present */
3213 data
->has_fan
= 0x03 | (fan3pin
<< 2) | (fan4pin
<< 3) |
3214 (fan5pin
<< 4) | (fan6pin
<< 5);
3215 data
->has_fan_min
= 0x03 | (fan3pin
<< 2) | (fan4min
<< 3) |
3217 data
->has_pwm
= 0x03 | (pwm3pin
<< 2) | (pwm4pin
<< 3) |
3218 (pwm5pin
<< 4) | (pwm6pin
<< 5);
3221 static void add_temp_sensors(struct nct6775_data
*data
, const u16
*regp
,
3222 int *available
, int *mask
)
3227 for (i
= 0; i
< data
->pwm_num
&& *available
; i
++) {
3232 src
= nct6775_read_value(data
, regp
[i
]);
3234 if (!src
|| (*mask
& (1 << src
)))
3236 if (src
>= data
->temp_label_num
||
3237 !strlen(data
->temp_label
[src
]))
3240 index
= __ffs(*available
);
3241 nct6775_write_value(data
, data
->REG_TEMP_SOURCE
[index
], src
);
3242 *available
&= ~(1 << index
);
3247 static int nct6775_probe(struct platform_device
*pdev
)
3249 struct device
*dev
= &pdev
->dev
;
3250 struct nct6775_sio_data
*sio_data
= dev_get_platdata(dev
);
3251 struct nct6775_data
*data
;
3252 struct resource
*res
;
3254 int src
, mask
, available
;
3255 const u16
*reg_temp
, *reg_temp_over
, *reg_temp_hyst
, *reg_temp_config
;
3256 const u16
*reg_temp_alternate
, *reg_temp_crit
;
3257 const u16
*reg_temp_crit_l
= NULL
, *reg_temp_crit_h
= NULL
;
3260 struct attribute_group
*group
;
3261 struct device
*hwmon_dev
;
3263 res
= platform_get_resource(pdev
, IORESOURCE_IO
, 0);
3264 if (!devm_request_region(&pdev
->dev
, res
->start
, IOREGION_LENGTH
,
3268 data
= devm_kzalloc(&pdev
->dev
, sizeof(struct nct6775_data
),
3273 data
->kind
= sio_data
->kind
;
3274 data
->sioreg
= sio_data
->sioreg
;
3275 data
->addr
= res
->start
;
3276 mutex_init(&data
->update_lock
);
3277 data
->name
= nct6775_device_names
[data
->kind
];
3278 data
->bank
= 0xff; /* Force initial bank selection */
3279 platform_set_drvdata(pdev
, data
);
3281 switch (data
->kind
) {
3285 data
->auto_pwm_num
= 4;
3286 data
->temp_fixed_num
= 3;
3287 data
->num_temp_alarms
= 6;
3288 data
->num_temp_beeps
= 6;
3290 data
->fan_from_reg
= fan_from_reg13
;
3291 data
->fan_from_reg_min
= fan_from_reg13
;
3293 data
->temp_label
= nct6776_temp_label
;
3294 data
->temp_label_num
= ARRAY_SIZE(nct6776_temp_label
);
3296 data
->REG_VBAT
= NCT6106_REG_VBAT
;
3297 data
->REG_DIODE
= NCT6106_REG_DIODE
;
3298 data
->DIODE_MASK
= NCT6106_DIODE_MASK
;
3299 data
->REG_VIN
= NCT6106_REG_IN
;
3300 data
->REG_IN_MINMAX
[0] = NCT6106_REG_IN_MIN
;
3301 data
->REG_IN_MINMAX
[1] = NCT6106_REG_IN_MAX
;
3302 data
->REG_TARGET
= NCT6106_REG_TARGET
;
3303 data
->REG_FAN
= NCT6106_REG_FAN
;
3304 data
->REG_FAN_MODE
= NCT6106_REG_FAN_MODE
;
3305 data
->REG_FAN_MIN
= NCT6106_REG_FAN_MIN
;
3306 data
->REG_FAN_PULSES
= NCT6106_REG_FAN_PULSES
;
3307 data
->FAN_PULSE_SHIFT
= NCT6106_FAN_PULSE_SHIFT
;
3308 data
->REG_FAN_TIME
[0] = NCT6106_REG_FAN_STOP_TIME
;
3309 data
->REG_FAN_TIME
[1] = NCT6106_REG_FAN_STEP_UP_TIME
;
3310 data
->REG_FAN_TIME
[2] = NCT6106_REG_FAN_STEP_DOWN_TIME
;
3311 data
->REG_PWM
[0] = NCT6106_REG_PWM
;
3312 data
->REG_PWM
[1] = NCT6106_REG_FAN_START_OUTPUT
;
3313 data
->REG_PWM
[2] = NCT6106_REG_FAN_STOP_OUTPUT
;
3314 data
->REG_PWM
[5] = NCT6106_REG_WEIGHT_DUTY_STEP
;
3315 data
->REG_PWM
[6] = NCT6106_REG_WEIGHT_DUTY_BASE
;
3316 data
->REG_PWM_READ
= NCT6106_REG_PWM_READ
;
3317 data
->REG_PWM_MODE
= NCT6106_REG_PWM_MODE
;
3318 data
->PWM_MODE_MASK
= NCT6106_PWM_MODE_MASK
;
3319 data
->REG_AUTO_TEMP
= NCT6106_REG_AUTO_TEMP
;
3320 data
->REG_AUTO_PWM
= NCT6106_REG_AUTO_PWM
;
3321 data
->REG_CRITICAL_TEMP
= NCT6106_REG_CRITICAL_TEMP
;
3322 data
->REG_CRITICAL_TEMP_TOLERANCE
3323 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE
;
3324 data
->REG_CRITICAL_PWM_ENABLE
= NCT6106_REG_CRITICAL_PWM_ENABLE
;
3325 data
->CRITICAL_PWM_ENABLE_MASK
3326 = NCT6106_CRITICAL_PWM_ENABLE_MASK
;
3327 data
->REG_CRITICAL_PWM
= NCT6106_REG_CRITICAL_PWM
;
3328 data
->REG_TEMP_OFFSET
= NCT6106_REG_TEMP_OFFSET
;
3329 data
->REG_TEMP_SOURCE
= NCT6106_REG_TEMP_SOURCE
;
3330 data
->REG_TEMP_SEL
= NCT6106_REG_TEMP_SEL
;
3331 data
->REG_WEIGHT_TEMP_SEL
= NCT6106_REG_WEIGHT_TEMP_SEL
;
3332 data
->REG_WEIGHT_TEMP
[0] = NCT6106_REG_WEIGHT_TEMP_STEP
;
3333 data
->REG_WEIGHT_TEMP
[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL
;
3334 data
->REG_WEIGHT_TEMP
[2] = NCT6106_REG_WEIGHT_TEMP_BASE
;
3335 data
->REG_ALARM
= NCT6106_REG_ALARM
;
3336 data
->ALARM_BITS
= NCT6106_ALARM_BITS
;
3337 data
->REG_BEEP
= NCT6106_REG_BEEP
;
3338 data
->BEEP_BITS
= NCT6106_BEEP_BITS
;
3340 reg_temp
= NCT6106_REG_TEMP
;
3341 num_reg_temp
= ARRAY_SIZE(NCT6106_REG_TEMP
);
3342 reg_temp_over
= NCT6106_REG_TEMP_OVER
;
3343 reg_temp_hyst
= NCT6106_REG_TEMP_HYST
;
3344 reg_temp_config
= NCT6106_REG_TEMP_CONFIG
;
3345 reg_temp_alternate
= NCT6106_REG_TEMP_ALTERNATE
;
3346 reg_temp_crit
= NCT6106_REG_TEMP_CRIT
;
3347 reg_temp_crit_l
= NCT6106_REG_TEMP_CRIT_L
;
3348 reg_temp_crit_h
= NCT6106_REG_TEMP_CRIT_H
;
3354 data
->auto_pwm_num
= 6;
3355 data
->has_fan_div
= true;
3356 data
->temp_fixed_num
= 3;
3357 data
->num_temp_alarms
= 3;
3358 data
->num_temp_beeps
= 3;
3360 data
->ALARM_BITS
= NCT6775_ALARM_BITS
;
3361 data
->BEEP_BITS
= NCT6775_BEEP_BITS
;
3363 data
->fan_from_reg
= fan_from_reg16
;
3364 data
->fan_from_reg_min
= fan_from_reg8
;
3365 data
->target_temp_mask
= 0x7f;
3366 data
->tolerance_mask
= 0x0f;
3367 data
->speed_tolerance_limit
= 15;
3369 data
->temp_label
= nct6775_temp_label
;
3370 data
->temp_label_num
= ARRAY_SIZE(nct6775_temp_label
);
3372 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3373 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3374 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3375 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3376 data
->REG_VIN
= NCT6775_REG_IN
;
3377 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3378 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3379 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3380 data
->REG_FAN
= NCT6775_REG_FAN
;
3381 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3382 data
->REG_FAN_MIN
= NCT6775_REG_FAN_MIN
;
3383 data
->REG_FAN_PULSES
= NCT6775_REG_FAN_PULSES
;
3384 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3385 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3386 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3387 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3388 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3389 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3390 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3391 data
->REG_PWM
[3] = NCT6775_REG_FAN_MAX_OUTPUT
;
3392 data
->REG_PWM
[4] = NCT6775_REG_FAN_STEP_OUTPUT
;
3393 data
->REG_PWM
[5] = NCT6775_REG_WEIGHT_DUTY_STEP
;
3394 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3395 data
->REG_PWM_MODE
= NCT6775_REG_PWM_MODE
;
3396 data
->PWM_MODE_MASK
= NCT6775_PWM_MODE_MASK
;
3397 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3398 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3399 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3400 data
->REG_CRITICAL_TEMP_TOLERANCE
3401 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3402 data
->REG_TEMP_OFFSET
= NCT6775_REG_TEMP_OFFSET
;
3403 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3404 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3405 data
->REG_WEIGHT_TEMP_SEL
= NCT6775_REG_WEIGHT_TEMP_SEL
;
3406 data
->REG_WEIGHT_TEMP
[0] = NCT6775_REG_WEIGHT_TEMP_STEP
;
3407 data
->REG_WEIGHT_TEMP
[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL
;
3408 data
->REG_WEIGHT_TEMP
[2] = NCT6775_REG_WEIGHT_TEMP_BASE
;
3409 data
->REG_ALARM
= NCT6775_REG_ALARM
;
3410 data
->REG_BEEP
= NCT6775_REG_BEEP
;
3412 reg_temp
= NCT6775_REG_TEMP
;
3413 num_reg_temp
= ARRAY_SIZE(NCT6775_REG_TEMP
);
3414 reg_temp_over
= NCT6775_REG_TEMP_OVER
;
3415 reg_temp_hyst
= NCT6775_REG_TEMP_HYST
;
3416 reg_temp_config
= NCT6775_REG_TEMP_CONFIG
;
3417 reg_temp_alternate
= NCT6775_REG_TEMP_ALTERNATE
;
3418 reg_temp_crit
= NCT6775_REG_TEMP_CRIT
;
3424 data
->auto_pwm_num
= 4;
3425 data
->has_fan_div
= false;
3426 data
->temp_fixed_num
= 3;
3427 data
->num_temp_alarms
= 3;
3428 data
->num_temp_beeps
= 6;
3430 data
->ALARM_BITS
= NCT6776_ALARM_BITS
;
3431 data
->BEEP_BITS
= NCT6776_BEEP_BITS
;
3433 data
->fan_from_reg
= fan_from_reg13
;
3434 data
->fan_from_reg_min
= fan_from_reg13
;
3435 data
->target_temp_mask
= 0xff;
3436 data
->tolerance_mask
= 0x07;
3437 data
->speed_tolerance_limit
= 63;
3439 data
->temp_label
= nct6776_temp_label
;
3440 data
->temp_label_num
= ARRAY_SIZE(nct6776_temp_label
);
3442 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3443 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3444 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3445 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3446 data
->REG_VIN
= NCT6775_REG_IN
;
3447 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3448 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3449 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3450 data
->REG_FAN
= NCT6775_REG_FAN
;
3451 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3452 data
->REG_FAN_MIN
= NCT6776_REG_FAN_MIN
;
3453 data
->REG_FAN_PULSES
= NCT6776_REG_FAN_PULSES
;
3454 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3455 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3456 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3457 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3458 data
->REG_TOLERANCE_H
= NCT6776_REG_TOLERANCE_H
;
3459 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3460 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3461 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3462 data
->REG_PWM
[5] = NCT6775_REG_WEIGHT_DUTY_STEP
;
3463 data
->REG_PWM
[6] = NCT6776_REG_WEIGHT_DUTY_BASE
;
3464 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3465 data
->REG_PWM_MODE
= NCT6776_REG_PWM_MODE
;
3466 data
->PWM_MODE_MASK
= NCT6776_PWM_MODE_MASK
;
3467 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3468 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3469 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3470 data
->REG_CRITICAL_TEMP_TOLERANCE
3471 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3472 data
->REG_TEMP_OFFSET
= NCT6775_REG_TEMP_OFFSET
;
3473 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3474 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3475 data
->REG_WEIGHT_TEMP_SEL
= NCT6775_REG_WEIGHT_TEMP_SEL
;
3476 data
->REG_WEIGHT_TEMP
[0] = NCT6775_REG_WEIGHT_TEMP_STEP
;
3477 data
->REG_WEIGHT_TEMP
[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL
;
3478 data
->REG_WEIGHT_TEMP
[2] = NCT6775_REG_WEIGHT_TEMP_BASE
;
3479 data
->REG_ALARM
= NCT6775_REG_ALARM
;
3480 data
->REG_BEEP
= NCT6776_REG_BEEP
;
3482 reg_temp
= NCT6775_REG_TEMP
;
3483 num_reg_temp
= ARRAY_SIZE(NCT6775_REG_TEMP
);
3484 reg_temp_over
= NCT6775_REG_TEMP_OVER
;
3485 reg_temp_hyst
= NCT6775_REG_TEMP_HYST
;
3486 reg_temp_config
= NCT6776_REG_TEMP_CONFIG
;
3487 reg_temp_alternate
= NCT6776_REG_TEMP_ALTERNATE
;
3488 reg_temp_crit
= NCT6776_REG_TEMP_CRIT
;
3494 data
->auto_pwm_num
= 4;
3495 data
->has_fan_div
= false;
3496 data
->temp_fixed_num
= 6;
3497 data
->num_temp_alarms
= 2;
3498 data
->num_temp_beeps
= 2;
3500 data
->ALARM_BITS
= NCT6779_ALARM_BITS
;
3501 data
->BEEP_BITS
= NCT6779_BEEP_BITS
;
3503 data
->fan_from_reg
= fan_from_reg13
;
3504 data
->fan_from_reg_min
= fan_from_reg13
;
3505 data
->target_temp_mask
= 0xff;
3506 data
->tolerance_mask
= 0x07;
3507 data
->speed_tolerance_limit
= 63;
3509 data
->temp_label
= nct6779_temp_label
;
3510 data
->temp_label_num
= ARRAY_SIZE(nct6779_temp_label
);
3512 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3513 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3514 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3515 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3516 data
->REG_VIN
= NCT6779_REG_IN
;
3517 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3518 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3519 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3520 data
->REG_FAN
= NCT6779_REG_FAN
;
3521 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3522 data
->REG_FAN_MIN
= NCT6776_REG_FAN_MIN
;
3523 data
->REG_FAN_PULSES
= NCT6779_REG_FAN_PULSES
;
3524 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3525 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3526 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3527 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3528 data
->REG_TOLERANCE_H
= NCT6776_REG_TOLERANCE_H
;
3529 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3530 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3531 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3532 data
->REG_PWM
[5] = NCT6775_REG_WEIGHT_DUTY_STEP
;
3533 data
->REG_PWM
[6] = NCT6776_REG_WEIGHT_DUTY_BASE
;
3534 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3535 data
->REG_PWM_MODE
= NCT6776_REG_PWM_MODE
;
3536 data
->PWM_MODE_MASK
= NCT6776_PWM_MODE_MASK
;
3537 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3538 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3539 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3540 data
->REG_CRITICAL_TEMP_TOLERANCE
3541 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3542 data
->REG_CRITICAL_PWM_ENABLE
= NCT6779_REG_CRITICAL_PWM_ENABLE
;
3543 data
->CRITICAL_PWM_ENABLE_MASK
3544 = NCT6779_CRITICAL_PWM_ENABLE_MASK
;
3545 data
->REG_CRITICAL_PWM
= NCT6779_REG_CRITICAL_PWM
;
3546 data
->REG_TEMP_OFFSET
= NCT6779_REG_TEMP_OFFSET
;
3547 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3548 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3549 data
->REG_WEIGHT_TEMP_SEL
= NCT6775_REG_WEIGHT_TEMP_SEL
;
3550 data
->REG_WEIGHT_TEMP
[0] = NCT6775_REG_WEIGHT_TEMP_STEP
;
3551 data
->REG_WEIGHT_TEMP
[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL
;
3552 data
->REG_WEIGHT_TEMP
[2] = NCT6775_REG_WEIGHT_TEMP_BASE
;
3553 data
->REG_ALARM
= NCT6779_REG_ALARM
;
3554 data
->REG_BEEP
= NCT6776_REG_BEEP
;
3556 reg_temp
= NCT6779_REG_TEMP
;
3557 num_reg_temp
= ARRAY_SIZE(NCT6779_REG_TEMP
);
3558 reg_temp_over
= NCT6779_REG_TEMP_OVER
;
3559 reg_temp_hyst
= NCT6779_REG_TEMP_HYST
;
3560 reg_temp_config
= NCT6779_REG_TEMP_CONFIG
;
3561 reg_temp_alternate
= NCT6779_REG_TEMP_ALTERNATE
;
3562 reg_temp_crit
= NCT6779_REG_TEMP_CRIT
;
3568 data
->auto_pwm_num
= 4;
3569 data
->has_fan_div
= false;
3570 data
->temp_fixed_num
= 6;
3571 data
->num_temp_alarms
= 2;
3572 data
->num_temp_beeps
= 2;
3574 data
->ALARM_BITS
= NCT6791_ALARM_BITS
;
3575 data
->BEEP_BITS
= NCT6779_BEEP_BITS
;
3577 data
->fan_from_reg
= fan_from_reg13
;
3578 data
->fan_from_reg_min
= fan_from_reg13
;
3579 data
->target_temp_mask
= 0xff;
3580 data
->tolerance_mask
= 0x07;
3581 data
->speed_tolerance_limit
= 63;
3583 data
->temp_label
= nct6779_temp_label
;
3584 data
->temp_label_num
= ARRAY_SIZE(nct6779_temp_label
);
3586 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3587 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3588 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3589 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3590 data
->REG_VIN
= NCT6779_REG_IN
;
3591 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3592 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3593 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3594 data
->REG_FAN
= NCT6779_REG_FAN
;
3595 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3596 data
->REG_FAN_MIN
= NCT6776_REG_FAN_MIN
;
3597 data
->REG_FAN_PULSES
= NCT6779_REG_FAN_PULSES
;
3598 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3599 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3600 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3601 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3602 data
->REG_TOLERANCE_H
= NCT6776_REG_TOLERANCE_H
;
3603 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3604 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3605 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3606 data
->REG_PWM
[5] = NCT6775_REG_WEIGHT_DUTY_STEP
;
3607 data
->REG_PWM
[6] = NCT6776_REG_WEIGHT_DUTY_BASE
;
3608 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3609 data
->REG_PWM_MODE
= NCT6776_REG_PWM_MODE
;
3610 data
->PWM_MODE_MASK
= NCT6776_PWM_MODE_MASK
;
3611 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3612 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3613 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3614 data
->REG_CRITICAL_TEMP_TOLERANCE
3615 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3616 data
->REG_CRITICAL_PWM_ENABLE
= NCT6779_REG_CRITICAL_PWM_ENABLE
;
3617 data
->CRITICAL_PWM_ENABLE_MASK
3618 = NCT6779_CRITICAL_PWM_ENABLE_MASK
;
3619 data
->REG_CRITICAL_PWM
= NCT6779_REG_CRITICAL_PWM
;
3620 data
->REG_TEMP_OFFSET
= NCT6779_REG_TEMP_OFFSET
;
3621 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3622 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3623 data
->REG_WEIGHT_TEMP_SEL
= NCT6775_REG_WEIGHT_TEMP_SEL
;
3624 data
->REG_WEIGHT_TEMP
[0] = NCT6775_REG_WEIGHT_TEMP_STEP
;
3625 data
->REG_WEIGHT_TEMP
[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL
;
3626 data
->REG_WEIGHT_TEMP
[2] = NCT6775_REG_WEIGHT_TEMP_BASE
;
3627 data
->REG_ALARM
= NCT6791_REG_ALARM
;
3628 data
->REG_BEEP
= NCT6776_REG_BEEP
;
3630 reg_temp
= NCT6779_REG_TEMP
;
3631 num_reg_temp
= ARRAY_SIZE(NCT6779_REG_TEMP
);
3632 reg_temp_over
= NCT6779_REG_TEMP_OVER
;
3633 reg_temp_hyst
= NCT6779_REG_TEMP_HYST
;
3634 reg_temp_config
= NCT6779_REG_TEMP_CONFIG
;
3635 reg_temp_alternate
= NCT6779_REG_TEMP_ALTERNATE
;
3636 reg_temp_crit
= NCT6779_REG_TEMP_CRIT
;
3642 data
->have_in
= (1 << data
->in_num
) - 1;
3643 data
->have_temp
= 0;
3646 * On some boards, not all available temperature sources are monitored,
3647 * even though some of the monitoring registers are unused.
3648 * Get list of unused monitoring registers, then detect if any fan
3649 * controls are configured to use unmonitored temperature sources.
3650 * If so, assign the unmonitored temperature sources to available
3651 * monitoring registers.
3655 for (i
= 0; i
< num_reg_temp
; i
++) {
3656 if (reg_temp
[i
] == 0)
3659 src
= nct6775_read_value(data
, data
->REG_TEMP_SOURCE
[i
]) & 0x1f;
3660 if (!src
|| (mask
& (1 << src
)))
3661 available
|= 1 << i
;
3667 * Now find unmonitored temperature registers and enable monitoring
3668 * if additional monitoring registers are available.
3670 add_temp_sensors(data
, data
->REG_TEMP_SEL
, &available
, &mask
);
3671 add_temp_sensors(data
, data
->REG_WEIGHT_TEMP_SEL
, &available
, &mask
);
3674 s
= NUM_TEMP_FIXED
; /* First dynamic temperature attribute */
3675 for (i
= 0; i
< num_reg_temp
; i
++) {
3676 if (reg_temp
[i
] == 0)
3679 src
= nct6775_read_value(data
, data
->REG_TEMP_SOURCE
[i
]) & 0x1f;
3680 if (!src
|| (mask
& (1 << src
)))
3683 if (src
>= data
->temp_label_num
||
3684 !strlen(data
->temp_label
[src
])) {
3686 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3687 src
, i
, data
->REG_TEMP_SOURCE
[i
], reg_temp
[i
]);
3693 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3694 if (src
<= data
->temp_fixed_num
) {
3695 data
->have_temp
|= 1 << (src
- 1);
3696 data
->have_temp_fixed
|= 1 << (src
- 1);
3697 data
->reg_temp
[0][src
- 1] = reg_temp
[i
];
3698 data
->reg_temp
[1][src
- 1] = reg_temp_over
[i
];
3699 data
->reg_temp
[2][src
- 1] = reg_temp_hyst
[i
];
3700 if (reg_temp_crit_h
&& reg_temp_crit_h
[i
])
3701 data
->reg_temp
[3][src
- 1] = reg_temp_crit_h
[i
];
3702 else if (reg_temp_crit
[src
- 1])
3703 data
->reg_temp
[3][src
- 1]
3704 = reg_temp_crit
[src
- 1];
3705 if (reg_temp_crit_l
&& reg_temp_crit_l
[i
])
3706 data
->reg_temp
[4][src
- 1] = reg_temp_crit_l
[i
];
3707 data
->reg_temp_config
[src
- 1] = reg_temp_config
[i
];
3708 data
->temp_src
[src
- 1] = src
;
3715 /* Use dynamic index for other sources */
3716 data
->have_temp
|= 1 << s
;
3717 data
->reg_temp
[0][s
] = reg_temp
[i
];
3718 data
->reg_temp
[1][s
] = reg_temp_over
[i
];
3719 data
->reg_temp
[2][s
] = reg_temp_hyst
[i
];
3720 data
->reg_temp_config
[s
] = reg_temp_config
[i
];
3721 if (reg_temp_crit_h
&& reg_temp_crit_h
[i
])
3722 data
->reg_temp
[3][s
] = reg_temp_crit_h
[i
];
3723 else if (reg_temp_crit
[src
- 1])
3724 data
->reg_temp
[3][s
] = reg_temp_crit
[src
- 1];
3725 if (reg_temp_crit_l
&& reg_temp_crit_l
[i
])
3726 data
->reg_temp
[4][s
] = reg_temp_crit_l
[i
];
3728 data
->temp_src
[s
] = src
;
3732 #ifdef USE_ALTERNATE
3734 * Go through the list of alternate temp registers and enable
3736 * The temperature is already monitored if the respective bit in <mask>
3739 for (i
= 0; i
< data
->temp_label_num
- 1; i
++) {
3740 if (!reg_temp_alternate
[i
])
3742 if (mask
& (1 << (i
+ 1)))
3744 if (i
< data
->temp_fixed_num
) {
3745 if (data
->have_temp
& (1 << i
))
3747 data
->have_temp
|= 1 << i
;
3748 data
->have_temp_fixed
|= 1 << i
;
3749 data
->reg_temp
[0][i
] = reg_temp_alternate
[i
];
3750 if (i
< num_reg_temp
) {
3751 data
->reg_temp
[1][i
] = reg_temp_over
[i
];
3752 data
->reg_temp
[2][i
] = reg_temp_hyst
[i
];
3754 data
->temp_src
[i
] = i
+ 1;
3758 if (s
>= NUM_TEMP
) /* Abort if no more space */
3761 data
->have_temp
|= 1 << s
;
3762 data
->reg_temp
[0][s
] = reg_temp_alternate
[i
];
3763 data
->temp_src
[s
] = i
+ 1;
3766 #endif /* USE_ALTERNATE */
3768 /* Initialize the chip */
3769 nct6775_init_device(data
);
3771 err
= superio_enter(sio_data
->sioreg
);
3775 cr2a
= superio_inb(sio_data
->sioreg
, 0x2a);
3776 switch (data
->kind
) {
3778 data
->have_vid
= (cr2a
& 0x40);
3781 data
->have_vid
= (cr2a
& 0x60) == 0x40;
3791 * We can get the VID input values directly at logical device D 0xe3.
3793 if (data
->have_vid
) {
3794 superio_select(sio_data
->sioreg
, NCT6775_LD_VID
);
3795 data
->vid
= superio_inb(sio_data
->sioreg
, 0xe3);
3796 data
->vrm
= vid_which_vrm();
3802 superio_select(sio_data
->sioreg
, NCT6775_LD_HWM
);
3803 tmp
= superio_inb(sio_data
->sioreg
,
3804 NCT6775_REG_CR_FAN_DEBOUNCE
);
3805 switch (data
->kind
) {
3820 superio_outb(sio_data
->sioreg
, NCT6775_REG_CR_FAN_DEBOUNCE
,
3822 dev_info(&pdev
->dev
, "Enabled fan debounce for chip %s\n",
3826 nct6775_check_fan_inputs(data
);
3828 superio_exit(sio_data
->sioreg
);
3830 /* Read fan clock dividers immediately */
3831 nct6775_init_fan_common(dev
, data
);
3833 /* Register sysfs hooks */
3834 group
= nct6775_create_attr_group(dev
, &nct6775_pwm_template_group
,
3837 return PTR_ERR(group
);
3839 data
->groups
[data
->num_attr_groups
++] = group
;
3841 group
= nct6775_create_attr_group(dev
, &nct6775_in_template_group
,
3842 fls(data
->have_in
));
3844 return PTR_ERR(group
);
3846 data
->groups
[data
->num_attr_groups
++] = group
;
3848 group
= nct6775_create_attr_group(dev
, &nct6775_fan_template_group
,
3849 fls(data
->has_fan
));
3851 return PTR_ERR(group
);
3853 data
->groups
[data
->num_attr_groups
++] = group
;
3855 group
= nct6775_create_attr_group(dev
, &nct6775_temp_template_group
,
3856 fls(data
->have_temp
));
3858 return PTR_ERR(group
);
3860 data
->groups
[data
->num_attr_groups
++] = group
;
3861 data
->groups
[data
->num_attr_groups
++] = &nct6775_group_other
;
3863 hwmon_dev
= devm_hwmon_device_register_with_groups(dev
, data
->name
,
3864 data
, data
->groups
);
3865 return PTR_ERR_OR_ZERO(hwmon_dev
);
3869 static int nct6775_suspend(struct device
*dev
)
3871 struct nct6775_data
*data
= nct6775_update_device(dev
);
3873 mutex_lock(&data
->update_lock
);
3874 data
->vbat
= nct6775_read_value(data
, data
->REG_VBAT
);
3875 if (data
->kind
== nct6775
) {
3876 data
->fandiv1
= nct6775_read_value(data
, NCT6775_REG_FANDIV1
);
3877 data
->fandiv2
= nct6775_read_value(data
, NCT6775_REG_FANDIV2
);
3879 mutex_unlock(&data
->update_lock
);
3884 static int nct6775_resume(struct device
*dev
)
3886 struct nct6775_data
*data
= dev_get_drvdata(dev
);
3889 mutex_lock(&data
->update_lock
);
3890 data
->bank
= 0xff; /* Force initial bank selection */
3892 /* Restore limits */
3893 for (i
= 0; i
< data
->in_num
; i
++) {
3894 if (!(data
->have_in
& (1 << i
)))
3897 nct6775_write_value(data
, data
->REG_IN_MINMAX
[0][i
],
3899 nct6775_write_value(data
, data
->REG_IN_MINMAX
[1][i
],
3903 for (i
= 0; i
< ARRAY_SIZE(data
->fan_min
); i
++) {
3904 if (!(data
->has_fan_min
& (1 << i
)))
3907 nct6775_write_value(data
, data
->REG_FAN_MIN
[i
],
3911 for (i
= 0; i
< NUM_TEMP
; i
++) {
3912 if (!(data
->have_temp
& (1 << i
)))
3915 for (j
= 1; j
< ARRAY_SIZE(data
->reg_temp
); j
++)
3916 if (data
->reg_temp
[j
][i
])
3917 nct6775_write_temp(data
, data
->reg_temp
[j
][i
],
3921 /* Restore other settings */
3922 nct6775_write_value(data
, data
->REG_VBAT
, data
->vbat
);
3923 if (data
->kind
== nct6775
) {
3924 nct6775_write_value(data
, NCT6775_REG_FANDIV1
, data
->fandiv1
);
3925 nct6775_write_value(data
, NCT6775_REG_FANDIV2
, data
->fandiv2
);
3928 /* Force re-reading all values */
3929 data
->valid
= false;
3930 mutex_unlock(&data
->update_lock
);
3935 static const struct dev_pm_ops nct6775_dev_pm_ops
= {
3936 .suspend
= nct6775_suspend
,
3937 .resume
= nct6775_resume
,
3938 .freeze
= nct6775_suspend
,
3939 .restore
= nct6775_resume
,
3942 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
3944 #define NCT6775_DEV_PM_OPS NULL
3945 #endif /* CONFIG_PM */
3947 static struct platform_driver nct6775_driver
= {
3949 .owner
= THIS_MODULE
,
3951 .pm
= NCT6775_DEV_PM_OPS
,
3953 .probe
= nct6775_probe
,
3956 static const char * const nct6775_sio_names
[] __initconst
= {
3964 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3965 static int __init
nct6775_find(int sioaddr
, struct nct6775_sio_data
*sio_data
)
3971 err
= superio_enter(sioaddr
);
3978 val
= (superio_inb(sioaddr
, SIO_REG_DEVID
) << 8)
3979 | superio_inb(sioaddr
, SIO_REG_DEVID
+ 1);
3980 switch (val
& SIO_ID_MASK
) {
3981 case SIO_NCT6106_ID
:
3982 sio_data
->kind
= nct6106
;
3984 case SIO_NCT6775_ID
:
3985 sio_data
->kind
= nct6775
;
3987 case SIO_NCT6776_ID
:
3988 sio_data
->kind
= nct6776
;
3990 case SIO_NCT6779_ID
:
3991 sio_data
->kind
= nct6779
;
3993 case SIO_NCT6791_ID
:
3994 sio_data
->kind
= nct6791
;
3998 pr_debug("unsupported chip ID: 0x%04x\n", val
);
3999 superio_exit(sioaddr
);
4003 /* We have a known chip, find the HWM I/O address */
4004 superio_select(sioaddr
, NCT6775_LD_HWM
);
4005 val
= (superio_inb(sioaddr
, SIO_REG_ADDR
) << 8)
4006 | superio_inb(sioaddr
, SIO_REG_ADDR
+ 1);
4007 addr
= val
& IOREGION_ALIGNMENT
;
4009 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4010 superio_exit(sioaddr
);
4014 /* Activate logical device if needed */
4015 val
= superio_inb(sioaddr
, SIO_REG_ENABLE
);
4016 if (!(val
& 0x01)) {
4017 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4018 superio_outb(sioaddr
, SIO_REG_ENABLE
, val
| 0x01);
4020 if (sio_data
->kind
== nct6791
) {
4021 val
= superio_inb(sioaddr
, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE
);
4023 pr_info("Enabling hardware monitor logical device mappings.\n");
4024 superio_outb(sioaddr
,
4025 NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE
,
4030 superio_exit(sioaddr
);
4031 pr_info("Found %s or compatible chip at %#x:%#x\n",
4032 nct6775_sio_names
[sio_data
->kind
], sioaddr
, addr
);
4033 sio_data
->sioreg
= sioaddr
;
4039 * when Super-I/O functions move to a separate file, the Super-I/O
4040 * bus will manage the lifetime of the device and this module will only keep
4041 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4042 * must keep track of the device
4044 static struct platform_device
*pdev
[2];
4046 static int __init
sensors_nct6775_init(void)
4051 struct resource res
;
4052 struct nct6775_sio_data sio_data
;
4053 int sioaddr
[2] = { 0x2e, 0x4e };
4055 err
= platform_driver_register(&nct6775_driver
);
4060 * initialize sio_data->kind and sio_data->sioreg.
4062 * when Super-I/O functions move to a separate file, the Super-I/O
4063 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4064 * nct6775 hardware monitor, and call probe()
4066 for (i
= 0; i
< ARRAY_SIZE(pdev
); i
++) {
4067 address
= nct6775_find(sioaddr
[i
], &sio_data
);
4073 pdev
[i
] = platform_device_alloc(DRVNAME
, address
);
4076 goto exit_device_put
;
4079 err
= platform_device_add_data(pdev
[i
], &sio_data
,
4080 sizeof(struct nct6775_sio_data
));
4082 goto exit_device_put
;
4084 memset(&res
, 0, sizeof(res
));
4086 res
.start
= address
+ IOREGION_OFFSET
;
4087 res
.end
= address
+ IOREGION_OFFSET
+ IOREGION_LENGTH
- 1;
4088 res
.flags
= IORESOURCE_IO
;
4090 err
= acpi_check_resource_conflict(&res
);
4092 platform_device_put(pdev
[i
]);
4097 err
= platform_device_add_resources(pdev
[i
], &res
, 1);
4099 goto exit_device_put
;
4101 /* platform_device_add calls probe() */
4102 err
= platform_device_add(pdev
[i
]);
4104 goto exit_device_put
;
4108 goto exit_unregister
;
4114 for (i
= 0; i
< ARRAY_SIZE(pdev
); i
++) {
4116 platform_device_put(pdev
[i
]);
4119 platform_driver_unregister(&nct6775_driver
);
4123 static void __exit
sensors_nct6775_exit(void)
4127 for (i
= 0; i
< ARRAY_SIZE(pdev
); i
++) {
4129 platform_device_unregister(pdev
[i
]);
4131 platform_driver_unregister(&nct6775_driver
);
4134 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4135 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4136 MODULE_LICENSE("GPL");
4138 module_init(sensors_nct6775_init
);
4139 module_exit(sensors_nct6775_exit
);