2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
43 * #temp lists the number of monitored temperature sources (first value) plus
44 * the number of directly connectable temperature sensors (second value).
47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49 #include <linux/module.h>
50 #include <linux/init.h>
51 #include <linux/slab.h>
52 #include <linux/jiffies.h>
53 #include <linux/platform_device.h>
54 #include <linux/hwmon.h>
55 #include <linux/hwmon-sysfs.h>
56 #include <linux/hwmon-vid.h>
57 #include <linux/err.h>
58 #include <linux/mutex.h>
59 #include <linux/acpi.h>
60 #include <linux/dmi.h>
66 enum kinds
{ nct6106
, nct6775
, nct6776
, nct6779
, nct6791
, nct6792
};
68 /* used to set data->name = nct6775_device_names[data->sio_kind] */
69 static const char * const nct6775_device_names
[] = {
78 static unsigned short force_id
;
79 module_param(force_id
, ushort
, 0);
80 MODULE_PARM_DESC(force_id
, "Override the detected device ID");
82 static unsigned short fan_debounce
;
83 module_param(fan_debounce
, ushort
, 0);
84 MODULE_PARM_DESC(fan_debounce
, "Enable debouncing for fan RPM signal");
86 #define DRVNAME "nct6775"
89 * Super-I/O constants and functions
92 #define NCT6775_LD_ACPI 0x0a
93 #define NCT6775_LD_HWM 0x0b
94 #define NCT6775_LD_VID 0x0d
96 #define SIO_REG_LDSEL 0x07 /* Logical device select */
97 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
98 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
99 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
101 #define SIO_NCT6106_ID 0xc450
102 #define SIO_NCT6775_ID 0xb470
103 #define SIO_NCT6776_ID 0xc330
104 #define SIO_NCT6779_ID 0xc560
105 #define SIO_NCT6791_ID 0xc800
106 #define SIO_NCT6792_ID 0xc910
107 #define SIO_ID_MASK 0xFFF0
109 enum pwm_enable
{ off
, manual
, thermal_cruise
, speed_cruise
, sf3
, sf4
};
112 superio_outb(int ioreg
, int reg
, int val
)
115 outb(val
, ioreg
+ 1);
119 superio_inb(int ioreg
, int reg
)
122 return inb(ioreg
+ 1);
126 superio_select(int ioreg
, int ld
)
128 outb(SIO_REG_LDSEL
, ioreg
);
133 superio_enter(int ioreg
)
136 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
138 if (!request_muxed_region(ioreg
, 2, DRVNAME
))
148 superio_exit(int ioreg
)
152 outb(0x02, ioreg
+ 1);
153 release_region(ioreg
, 2);
160 #define IOREGION_ALIGNMENT (~7)
161 #define IOREGION_OFFSET 5
162 #define IOREGION_LENGTH 2
163 #define ADDR_REG_OFFSET 0
164 #define DATA_REG_OFFSET 1
166 #define NCT6775_REG_BANK 0x4E
167 #define NCT6775_REG_CONFIG 0x40
170 * Not currently used:
171 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
172 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
173 * REG_MAN_ID is at port 0x4f
174 * REG_CHIP_ID is at port 0x58
177 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
178 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
180 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
181 #define NUM_REG_BEEP 5 /* Max number of beep registers */
185 /* Common and NCT6775 specific data */
187 /* Voltage min/max registers for nr=7..14 are in bank 5 */
189 static const u16 NCT6775_REG_IN_MAX
[] = {
190 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
191 0x55c, 0x55e, 0x560, 0x562 };
192 static const u16 NCT6775_REG_IN_MIN
[] = {
193 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
194 0x55d, 0x55f, 0x561, 0x563 };
195 static const u16 NCT6775_REG_IN
[] = {
196 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
199 #define NCT6775_REG_VBAT 0x5D
200 #define NCT6775_REG_DIODE 0x5E
201 #define NCT6775_DIODE_MASK 0x02
203 #define NCT6775_REG_FANDIV1 0x506
204 #define NCT6775_REG_FANDIV2 0x507
206 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
208 static const u16 NCT6775_REG_ALARM
[NUM_REG_ALARM
] = { 0x459, 0x45A, 0x45B };
210 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
212 static const s8 NCT6775_ALARM_BITS
[] = {
213 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
214 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
216 6, 7, 11, -1, -1, /* fan1..fan5 */
217 -1, -1, -1, /* unused */
218 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
219 12, -1 }; /* intrusion0, intrusion1 */
221 #define FAN_ALARM_BASE 16
222 #define TEMP_ALARM_BASE 24
223 #define INTRUSION_ALARM_BASE 30
225 static const u16 NCT6775_REG_BEEP
[NUM_REG_BEEP
] = { 0x56, 0x57, 0x453, 0x4e };
228 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
231 static const s8 NCT6775_BEEP_BITS
[] = {
232 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
233 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
234 21, /* global beep enable */
235 6, 7, 11, 28, -1, /* fan1..fan5 */
236 -1, -1, -1, /* unused */
237 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
238 12, -1 }; /* intrusion0, intrusion1 */
240 #define BEEP_ENABLE_BASE 15
242 static const u8 NCT6775_REG_CR_CASEOPEN_CLR
[] = { 0xe6, 0xee };
243 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK
[] = { 0x20, 0x01 };
245 /* DC or PWM output fan configuration */
246 static const u8 NCT6775_REG_PWM_MODE
[] = { 0x04, 0x04, 0x12 };
247 static const u8 NCT6775_PWM_MODE_MASK
[] = { 0x01, 0x02, 0x01 };
249 /* Advanced Fan control, some values are common for all fans */
251 static const u16 NCT6775_REG_TARGET
[] = {
252 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
253 static const u16 NCT6775_REG_FAN_MODE
[] = {
254 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
255 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME
[] = {
256 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
257 static const u16 NCT6775_REG_FAN_STEP_UP_TIME
[] = {
258 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
259 static const u16 NCT6775_REG_FAN_STOP_OUTPUT
[] = {
260 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
261 static const u16 NCT6775_REG_FAN_START_OUTPUT
[] = {
262 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
263 static const u16 NCT6775_REG_FAN_MAX_OUTPUT
[] = { 0x10a, 0x20a, 0x30a };
264 static const u16 NCT6775_REG_FAN_STEP_OUTPUT
[] = { 0x10b, 0x20b, 0x30b };
266 static const u16 NCT6775_REG_FAN_STOP_TIME
[] = {
267 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
268 static const u16 NCT6775_REG_PWM
[] = {
269 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
270 static const u16 NCT6775_REG_PWM_READ
[] = {
271 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
273 static const u16 NCT6775_REG_FAN
[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
274 static const u16 NCT6775_REG_FAN_MIN
[] = { 0x3b, 0x3c, 0x3d };
275 static const u16 NCT6775_REG_FAN_PULSES
[] = { 0x641, 0x642, 0x643, 0x644, 0 };
276 static const u16 NCT6775_FAN_PULSE_SHIFT
[] = { 0, 0, 0, 0, 0, 0 };
278 static const u16 NCT6775_REG_TEMP
[] = {
279 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
281 static const u16 NCT6775_REG_TEMP_MON
[] = { 0x73, 0x75, 0x77 };
283 static const u16 NCT6775_REG_TEMP_CONFIG
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
284 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
285 static const u16 NCT6775_REG_TEMP_HYST
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
286 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
287 static const u16 NCT6775_REG_TEMP_OVER
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
288 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
290 static const u16 NCT6775_REG_TEMP_SOURCE
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
291 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
293 static const u16 NCT6775_REG_TEMP_SEL
[] = {
294 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
296 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL
[] = {
297 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
298 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP
[] = {
299 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
300 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL
[] = {
301 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
302 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP
[] = {
303 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
304 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE
[] = {
305 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
307 static const u16 NCT6775_REG_TEMP_OFFSET
[] = { 0x454, 0x455, 0x456 };
309 static const u16 NCT6775_REG_AUTO_TEMP
[] = {
310 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
311 static const u16 NCT6775_REG_AUTO_PWM
[] = {
312 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
314 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
315 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
317 static const u16 NCT6775_REG_CRITICAL_ENAB
[] = { 0x134, 0x234, 0x334 };
319 static const u16 NCT6775_REG_CRITICAL_TEMP
[] = {
320 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
321 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE
[] = {
322 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
324 static const char *const nct6775_temp_label
[] = {
338 "PCH_CHIP_CPU_MAX_TEMP",
348 static const u16 NCT6775_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6775_temp_label
) - 1]
349 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
351 static const u16 NCT6775_REG_TEMP_CRIT
[ARRAY_SIZE(nct6775_temp_label
) - 1]
352 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
355 /* NCT6776 specific data */
357 static const s8 NCT6776_ALARM_BITS
[] = {
358 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
359 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
361 6, 7, 11, 10, 23, /* fan1..fan5 */
362 -1, -1, -1, /* unused */
363 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
364 12, 9 }; /* intrusion0, intrusion1 */
366 static const u16 NCT6776_REG_BEEP
[NUM_REG_BEEP
] = { 0xb2, 0xb3, 0xb4, 0xb5 };
368 static const s8 NCT6776_BEEP_BITS
[] = {
369 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
370 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
371 24, /* global beep enable */
372 25, 26, 27, 28, 29, /* fan1..fan5 */
373 -1, -1, -1, /* unused */
374 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
375 30, 31 }; /* intrusion0, intrusion1 */
377 static const u16 NCT6776_REG_TOLERANCE_H
[] = {
378 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
380 static const u8 NCT6776_REG_PWM_MODE
[] = { 0x04, 0, 0, 0, 0, 0 };
381 static const u8 NCT6776_PWM_MODE_MASK
[] = { 0x01, 0, 0, 0, 0, 0 };
383 static const u16 NCT6776_REG_FAN_MIN
[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
384 static const u16 NCT6776_REG_FAN_PULSES
[] = { 0x644, 0x645, 0x646, 0, 0 };
386 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE
[] = {
387 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
389 static const u16 NCT6776_REG_TEMP_CONFIG
[ARRAY_SIZE(NCT6775_REG_TEMP
)] = {
390 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
392 static const char *const nct6776_temp_label
[] = {
407 "PCH_CHIP_CPU_MAX_TEMP",
418 static const u16 NCT6776_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6776_temp_label
) - 1]
419 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
421 static const u16 NCT6776_REG_TEMP_CRIT
[ARRAY_SIZE(nct6776_temp_label
) - 1]
422 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
424 /* NCT6779 specific data */
426 static const u16 NCT6779_REG_IN
[] = {
427 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
428 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
430 static const u16 NCT6779_REG_ALARM
[NUM_REG_ALARM
] = {
431 0x459, 0x45A, 0x45B, 0x568 };
433 static const s8 NCT6779_ALARM_BITS
[] = {
434 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
435 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
437 6, 7, 11, 10, 23, /* fan1..fan5 */
438 -1, -1, -1, /* unused */
439 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
440 12, 9 }; /* intrusion0, intrusion1 */
442 static const s8 NCT6779_BEEP_BITS
[] = {
443 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
444 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
445 24, /* global beep enable */
446 25, 26, 27, 28, 29, /* fan1..fan5 */
447 -1, -1, -1, /* unused */
448 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
449 30, 31 }; /* intrusion0, intrusion1 */
451 static const u16 NCT6779_REG_FAN
[] = {
452 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
453 static const u16 NCT6779_REG_FAN_PULSES
[] = {
454 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
456 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE
[] = {
457 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
458 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
459 static const u16 NCT6779_REG_CRITICAL_PWM
[] = {
460 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
462 static const u16 NCT6779_REG_TEMP
[] = { 0x27, 0x150 };
463 static const u16 NCT6779_REG_TEMP_MON
[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
464 static const u16 NCT6779_REG_TEMP_CONFIG
[ARRAY_SIZE(NCT6779_REG_TEMP
)] = {
466 static const u16 NCT6779_REG_TEMP_HYST
[ARRAY_SIZE(NCT6779_REG_TEMP
)] = {
468 static const u16 NCT6779_REG_TEMP_OVER
[ARRAY_SIZE(NCT6779_REG_TEMP
)] = {
471 static const u16 NCT6779_REG_TEMP_OFFSET
[] = {
472 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
474 static const char *const nct6779_temp_label
[] = {
493 "PCH_CHIP_CPU_MAX_TEMP",
504 static const u16 NCT6779_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6779_temp_label
) - 1]
505 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
506 0, 0, 0, 0, 0, 0, 0, 0,
507 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
510 static const u16 NCT6779_REG_TEMP_CRIT
[ARRAY_SIZE(nct6779_temp_label
) - 1]
511 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
513 /* NCT6791 specific data */
515 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
517 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL
[6] = { 0, 0x239 };
518 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP
[6] = { 0, 0x23a };
519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL
[6] = { 0, 0x23b };
520 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP
[6] = { 0, 0x23c };
521 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE
[6] = { 0, 0x23d };
522 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE
[6] = { 0, 0x23e };
524 static const u16 NCT6791_REG_ALARM
[NUM_REG_ALARM
] = {
525 0x459, 0x45A, 0x45B, 0x568, 0x45D };
527 static const s8 NCT6791_ALARM_BITS
[] = {
528 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
529 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
531 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
533 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
534 12, 9 }; /* intrusion0, intrusion1 */
536 /* NCT6792 specific data */
538 static const u16 NCT6792_REG_TEMP_MON
[] = {
539 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
540 static const u16 NCT6792_REG_BEEP
[NUM_REG_BEEP
] = {
541 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
543 /* NCT6102D/NCT6106D specific data */
545 #define NCT6106_REG_VBAT 0x318
546 #define NCT6106_REG_DIODE 0x319
547 #define NCT6106_DIODE_MASK 0x01
549 static const u16 NCT6106_REG_IN_MAX
[] = {
550 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
551 static const u16 NCT6106_REG_IN_MIN
[] = {
552 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
553 static const u16 NCT6106_REG_IN
[] = {
554 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
556 static const u16 NCT6106_REG_TEMP
[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
557 static const u16 NCT6106_REG_TEMP_MON
[] = { 0x18, 0x19, 0x1a };
558 static const u16 NCT6106_REG_TEMP_HYST
[] = {
559 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
560 static const u16 NCT6106_REG_TEMP_OVER
[] = {
561 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
562 static const u16 NCT6106_REG_TEMP_CRIT_L
[] = {
563 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
564 static const u16 NCT6106_REG_TEMP_CRIT_H
[] = {
565 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
566 static const u16 NCT6106_REG_TEMP_OFFSET
[] = { 0x311, 0x312, 0x313 };
567 static const u16 NCT6106_REG_TEMP_CONFIG
[] = {
568 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
570 static const u16 NCT6106_REG_FAN
[] = { 0x20, 0x22, 0x24 };
571 static const u16 NCT6106_REG_FAN_MIN
[] = { 0xe0, 0xe2, 0xe4 };
572 static const u16 NCT6106_REG_FAN_PULSES
[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
573 static const u16 NCT6106_FAN_PULSE_SHIFT
[] = { 0, 2, 4, 0, 0 };
575 static const u8 NCT6106_REG_PWM_MODE
[] = { 0xf3, 0xf3, 0xf3 };
576 static const u8 NCT6106_PWM_MODE_MASK
[] = { 0x01, 0x02, 0x04 };
577 static const u16 NCT6106_REG_PWM
[] = { 0x119, 0x129, 0x139 };
578 static const u16 NCT6106_REG_PWM_READ
[] = { 0x4a, 0x4b, 0x4c };
579 static const u16 NCT6106_REG_FAN_MODE
[] = { 0x113, 0x123, 0x133 };
580 static const u16 NCT6106_REG_TEMP_SEL
[] = { 0x110, 0x120, 0x130 };
581 static const u16 NCT6106_REG_TEMP_SOURCE
[] = {
582 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
584 static const u16 NCT6106_REG_CRITICAL_TEMP
[] = { 0x11a, 0x12a, 0x13a };
585 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE
[] = {
586 0x11b, 0x12b, 0x13b };
588 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE
[] = { 0x11c, 0x12c, 0x13c };
589 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
590 static const u16 NCT6106_REG_CRITICAL_PWM
[] = { 0x11d, 0x12d, 0x13d };
592 static const u16 NCT6106_REG_FAN_STEP_UP_TIME
[] = { 0x114, 0x124, 0x134 };
593 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME
[] = { 0x115, 0x125, 0x135 };
594 static const u16 NCT6106_REG_FAN_STOP_OUTPUT
[] = { 0x116, 0x126, 0x136 };
595 static const u16 NCT6106_REG_FAN_START_OUTPUT
[] = { 0x117, 0x127, 0x137 };
596 static const u16 NCT6106_REG_FAN_STOP_TIME
[] = { 0x118, 0x128, 0x138 };
597 static const u16 NCT6106_REG_TOLERANCE_H
[] = { 0x112, 0x122, 0x132 };
599 static const u16 NCT6106_REG_TARGET
[] = { 0x111, 0x121, 0x131 };
601 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL
[] = { 0x168, 0x178, 0x188 };
602 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP
[] = { 0x169, 0x179, 0x189 };
603 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL
[] = { 0x16a, 0x17a, 0x18a };
604 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP
[] = { 0x16b, 0x17b, 0x17c };
605 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE
[] = { 0x16c, 0x17c, 0x18c };
606 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE
[] = { 0x16d, 0x17d, 0x18d };
608 static const u16 NCT6106_REG_AUTO_TEMP
[] = { 0x160, 0x170, 0x180 };
609 static const u16 NCT6106_REG_AUTO_PWM
[] = { 0x164, 0x174, 0x184 };
611 static const u16 NCT6106_REG_ALARM
[NUM_REG_ALARM
] = {
612 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
614 static const s8 NCT6106_ALARM_BITS
[] = {
615 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
616 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
618 32, 33, 34, -1, -1, /* fan1..fan5 */
619 -1, -1, -1, /* unused */
620 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
621 48, -1 /* intrusion0, intrusion1 */
624 static const u16 NCT6106_REG_BEEP
[NUM_REG_BEEP
] = {
625 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
627 static const s8 NCT6106_BEEP_BITS
[] = {
628 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
629 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
630 32, /* global beep enable */
631 24, 25, 26, 27, 28, /* fan1..fan5 */
632 -1, -1, -1, /* unused */
633 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
634 34, -1 /* intrusion0, intrusion1 */
637 static const u16 NCT6106_REG_TEMP_ALTERNATE
[ARRAY_SIZE(nct6776_temp_label
) - 1]
638 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
640 static const u16 NCT6106_REG_TEMP_CRIT
[ARRAY_SIZE(nct6776_temp_label
) - 1]
641 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
643 static enum pwm_enable
reg_to_pwm_enable(int pwm
, int mode
)
645 if (mode
== 0 && pwm
== 255)
650 static int pwm_enable_to_reg(enum pwm_enable mode
)
661 /* 1 is DC mode, output in ms */
662 static unsigned int step_time_from_reg(u8 reg
, u8 mode
)
664 return mode
? 400 * reg
: 100 * reg
;
667 static u8
step_time_to_reg(unsigned int msec
, u8 mode
)
669 return clamp_val((mode
? (msec
+ 200) / 400 :
670 (msec
+ 50) / 100), 1, 255);
673 static unsigned int fan_from_reg8(u16 reg
, unsigned int divreg
)
675 if (reg
== 0 || reg
== 255)
677 return 1350000U / (reg
<< divreg
);
680 static unsigned int fan_from_reg13(u16 reg
, unsigned int divreg
)
682 if ((reg
& 0xff1f) == 0xff1f)
685 reg
= (reg
& 0x1f) | ((reg
& 0xff00) >> 3);
690 return 1350000U / reg
;
693 static unsigned int fan_from_reg16(u16 reg
, unsigned int divreg
)
695 if (reg
== 0 || reg
== 0xffff)
699 * Even though the registers are 16 bit wide, the fan divisor
702 return 1350000U / (reg
<< divreg
);
705 static u16
fan_to_reg(u32 fan
, unsigned int divreg
)
710 return (1350000U / fan
) >> divreg
;
713 static inline unsigned int
720 * Some of the voltage inputs have internal scaling, the tables below
721 * contain 8 (the ADC LSB in mV) * scaling factor * 100
723 static const u16 scale_in
[15] = {
724 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
728 static inline long in_from_reg(u8 reg
, u8 nr
)
730 return DIV_ROUND_CLOSEST(reg
* scale_in
[nr
], 100);
733 static inline u8
in_to_reg(u32 val
, u8 nr
)
735 return clamp_val(DIV_ROUND_CLOSEST(val
* 100, scale_in
[nr
]), 0, 255);
739 * Data structures and manipulation thereof
742 struct nct6775_data
{
743 int addr
; /* IO base of hw monitor block */
744 int sioreg
; /* SIO register address */
748 const struct attribute_group
*groups
[6];
750 u16 reg_temp
[5][NUM_TEMP
]; /* 0=temp, 1=temp_over, 2=temp_hyst,
751 * 3=temp_crit, 4=temp_lcrit
753 u8 temp_src
[NUM_TEMP
];
754 u16 reg_temp_config
[NUM_TEMP
];
755 const char * const *temp_label
;
763 const s8
*ALARM_BITS
;
767 const u16
*REG_IN_MINMAX
[2];
769 const u16
*REG_TARGET
;
771 const u16
*REG_FAN_MODE
;
772 const u16
*REG_FAN_MIN
;
773 const u16
*REG_FAN_PULSES
;
774 const u16
*FAN_PULSE_SHIFT
;
775 const u16
*REG_FAN_TIME
[3];
777 const u16
*REG_TOLERANCE_H
;
779 const u8
*REG_PWM_MODE
;
780 const u8
*PWM_MODE_MASK
;
782 const u16
*REG_PWM
[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
783 * [3]=pwm_max, [4]=pwm_step,
784 * [5]=weight_duty_step, [6]=weight_duty_base
786 const u16
*REG_PWM_READ
;
788 const u16
*REG_CRITICAL_PWM_ENABLE
;
789 u8 CRITICAL_PWM_ENABLE_MASK
;
790 const u16
*REG_CRITICAL_PWM
;
792 const u16
*REG_AUTO_TEMP
;
793 const u16
*REG_AUTO_PWM
;
795 const u16
*REG_CRITICAL_TEMP
;
796 const u16
*REG_CRITICAL_TEMP_TOLERANCE
;
798 const u16
*REG_TEMP_SOURCE
; /* temp register sources */
799 const u16
*REG_TEMP_SEL
;
800 const u16
*REG_WEIGHT_TEMP_SEL
;
801 const u16
*REG_WEIGHT_TEMP
[3]; /* 0=base, 1=tolerance, 2=step */
803 const u16
*REG_TEMP_OFFSET
;
805 const u16
*REG_ALARM
;
808 unsigned int (*fan_from_reg
)(u16 reg
, unsigned int divreg
);
809 unsigned int (*fan_from_reg_min
)(u16 reg
, unsigned int divreg
);
811 struct mutex update_lock
;
812 bool valid
; /* true if following fields are valid */
813 unsigned long last_updated
; /* In jiffies */
815 /* Register values */
816 u8 bank
; /* current register bank */
817 u8 in_num
; /* number of in inputs we have */
818 u8 in
[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
819 unsigned int rpm
[NUM_FAN
];
820 u16 fan_min
[NUM_FAN
];
821 u8 fan_pulses
[NUM_FAN
];
824 u8 has_fan
; /* some fan inputs can be disabled */
825 u8 has_fan_min
; /* some fans don't have min register */
828 u8 num_temp_alarms
; /* 2, 3, or 6 */
829 u8 num_temp_beeps
; /* 2, 3, or 6 */
830 u8 temp_fixed_num
; /* 3 or 6 */
831 u8 temp_type
[NUM_TEMP_FIXED
];
832 s8 temp_offset
[NUM_TEMP_FIXED
];
833 s16 temp
[5][NUM_TEMP
]; /* 0=temp, 1=temp_over, 2=temp_hyst,
834 * 3=temp_crit, 4=temp_lcrit */
838 u8 pwm_num
; /* number of pwm */
839 u8 pwm_mode
[NUM_FAN
]; /* 1->DC variable voltage,
840 * 0->PWM variable duty cycle
842 enum pwm_enable pwm_enable
[NUM_FAN
];
845 * 2->thermal cruise mode (also called SmartFan I)
846 * 3->fan speed cruise mode
848 * 5->enhanced variable thermal cruise (SmartFan IV)
850 u8 pwm
[7][NUM_FAN
]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
851 * [3]=pwm_max, [4]=pwm_step,
852 * [5]=weight_duty_step, [6]=weight_duty_base
855 u8 target_temp
[NUM_FAN
];
857 u32 target_speed
[NUM_FAN
];
858 u32 target_speed_tolerance
[NUM_FAN
];
859 u8 speed_tolerance_limit
;
861 u8 temp_tolerance
[2][NUM_FAN
];
864 u8 fan_time
[3][NUM_FAN
]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
866 /* Automatic fan speed control registers */
868 u8 auto_pwm
[NUM_FAN
][7];
869 u8 auto_temp
[NUM_FAN
][7];
870 u8 pwm_temp_sel
[NUM_FAN
];
871 u8 pwm_weight_temp_sel
[NUM_FAN
];
872 u8 weight_temp
[3][NUM_FAN
]; /* 0->temp_step, 1->temp_step_tol,
885 /* Remember extra register values over suspend/resume */
892 struct nct6775_sio_data
{
897 struct sensor_device_template
{
898 struct device_attribute dev_attr
;
906 bool s2
; /* true if both index and nr are used */
909 struct sensor_device_attr_u
{
911 struct sensor_device_attribute a1
;
912 struct sensor_device_attribute_2 a2
;
917 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
918 .attr = {.name = _template, .mode = _mode }, \
923 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
924 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
928 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
930 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
931 .u.s.index = _index, \
935 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
936 static struct sensor_device_template sensor_dev_template_##_name \
937 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
940 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
942 static struct sensor_device_template sensor_dev_template_##_name \
943 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
946 struct sensor_template_group
{
947 struct sensor_device_template
**templates
;
948 umode_t (*is_visible
)(struct kobject
*, struct attribute
*, int);
952 static struct attribute_group
*
953 nct6775_create_attr_group(struct device
*dev
, struct sensor_template_group
*tg
,
956 struct attribute_group
*group
;
957 struct sensor_device_attr_u
*su
;
958 struct sensor_device_attribute
*a
;
959 struct sensor_device_attribute_2
*a2
;
960 struct attribute
**attrs
;
961 struct sensor_device_template
**t
;
965 return ERR_PTR(-EINVAL
);
968 for (count
= 0; *t
; t
++, count
++)
972 return ERR_PTR(-EINVAL
);
974 group
= devm_kzalloc(dev
, sizeof(*group
), GFP_KERNEL
);
976 return ERR_PTR(-ENOMEM
);
978 attrs
= devm_kzalloc(dev
, sizeof(*attrs
) * (repeat
* count
+ 1),
981 return ERR_PTR(-ENOMEM
);
983 su
= devm_kzalloc(dev
, sizeof(*su
) * repeat
* count
,
986 return ERR_PTR(-ENOMEM
);
988 group
->attrs
= attrs
;
989 group
->is_visible
= tg
->is_visible
;
991 for (i
= 0; i
< repeat
; i
++) {
994 snprintf(su
->name
, sizeof(su
->name
),
995 (*t
)->dev_attr
.attr
.name
, tg
->base
+ i
);
998 a2
->dev_attr
.attr
.name
= su
->name
;
999 a2
->nr
= (*t
)->u
.s
.nr
+ i
;
1000 a2
->index
= (*t
)->u
.s
.index
;
1001 a2
->dev_attr
.attr
.mode
=
1002 (*t
)->dev_attr
.attr
.mode
;
1003 a2
->dev_attr
.show
= (*t
)->dev_attr
.show
;
1004 a2
->dev_attr
.store
= (*t
)->dev_attr
.store
;
1005 *attrs
= &a2
->dev_attr
.attr
;
1008 a
->dev_attr
.attr
.name
= su
->name
;
1009 a
->index
= (*t
)->u
.index
+ i
;
1010 a
->dev_attr
.attr
.mode
=
1011 (*t
)->dev_attr
.attr
.mode
;
1012 a
->dev_attr
.show
= (*t
)->dev_attr
.show
;
1013 a
->dev_attr
.store
= (*t
)->dev_attr
.store
;
1014 *attrs
= &a
->dev_attr
.attr
;
1025 static bool is_word_sized(struct nct6775_data
*data
, u16 reg
)
1027 switch (data
->kind
) {
1029 return reg
== 0x20 || reg
== 0x22 || reg
== 0x24 ||
1030 reg
== 0xe0 || reg
== 0xe2 || reg
== 0xe4 ||
1031 reg
== 0x111 || reg
== 0x121 || reg
== 0x131;
1033 return (((reg
& 0xff00) == 0x100 ||
1034 (reg
& 0xff00) == 0x200) &&
1035 ((reg
& 0x00ff) == 0x50 ||
1036 (reg
& 0x00ff) == 0x53 ||
1037 (reg
& 0x00ff) == 0x55)) ||
1038 (reg
& 0xfff0) == 0x630 ||
1039 reg
== 0x640 || reg
== 0x642 ||
1041 ((reg
& 0xfff0) == 0x650 && (reg
& 0x000f) >= 0x06) ||
1042 reg
== 0x73 || reg
== 0x75 || reg
== 0x77;
1044 return (((reg
& 0xff00) == 0x100 ||
1045 (reg
& 0xff00) == 0x200) &&
1046 ((reg
& 0x00ff) == 0x50 ||
1047 (reg
& 0x00ff) == 0x53 ||
1048 (reg
& 0x00ff) == 0x55)) ||
1049 (reg
& 0xfff0) == 0x630 ||
1051 reg
== 0x640 || reg
== 0x642 ||
1052 ((reg
& 0xfff0) == 0x650 && (reg
& 0x000f) >= 0x06) ||
1053 reg
== 0x73 || reg
== 0x75 || reg
== 0x77;
1057 return reg
== 0x150 || reg
== 0x153 || reg
== 0x155 ||
1058 ((reg
& 0xfff0) == 0x4b0 && (reg
& 0x000f) < 0x0b) ||
1060 reg
== 0x63a || reg
== 0x63c || reg
== 0x63e ||
1061 reg
== 0x640 || reg
== 0x642 ||
1062 reg
== 0x73 || reg
== 0x75 || reg
== 0x77 || reg
== 0x79 ||
1063 reg
== 0x7b || reg
== 0x7d;
1069 * On older chips, only registers 0x50-0x5f are banked.
1070 * On more recent chips, all registers are banked.
1071 * Assume that is the case and set the bank number for each access.
1072 * Cache the bank number so it only needs to be set if it changes.
1074 static inline void nct6775_set_bank(struct nct6775_data
*data
, u16 reg
)
1078 if (data
->bank
!= bank
) {
1079 outb_p(NCT6775_REG_BANK
, data
->addr
+ ADDR_REG_OFFSET
);
1080 outb_p(bank
, data
->addr
+ DATA_REG_OFFSET
);
1085 static u16
nct6775_read_value(struct nct6775_data
*data
, u16 reg
)
1087 int res
, word_sized
= is_word_sized(data
, reg
);
1089 nct6775_set_bank(data
, reg
);
1090 outb_p(reg
& 0xff, data
->addr
+ ADDR_REG_OFFSET
);
1091 res
= inb_p(data
->addr
+ DATA_REG_OFFSET
);
1093 outb_p((reg
& 0xff) + 1,
1094 data
->addr
+ ADDR_REG_OFFSET
);
1095 res
= (res
<< 8) + inb_p(data
->addr
+ DATA_REG_OFFSET
);
1100 static int nct6775_write_value(struct nct6775_data
*data
, u16 reg
, u16 value
)
1102 int word_sized
= is_word_sized(data
, reg
);
1104 nct6775_set_bank(data
, reg
);
1105 outb_p(reg
& 0xff, data
->addr
+ ADDR_REG_OFFSET
);
1107 outb_p(value
>> 8, data
->addr
+ DATA_REG_OFFSET
);
1108 outb_p((reg
& 0xff) + 1,
1109 data
->addr
+ ADDR_REG_OFFSET
);
1111 outb_p(value
& 0xff, data
->addr
+ DATA_REG_OFFSET
);
1115 /* We left-align 8-bit temperature values to make the code simpler */
1116 static u16
nct6775_read_temp(struct nct6775_data
*data
, u16 reg
)
1120 res
= nct6775_read_value(data
, reg
);
1121 if (!is_word_sized(data
, reg
))
1127 static int nct6775_write_temp(struct nct6775_data
*data
, u16 reg
, u16 value
)
1129 if (!is_word_sized(data
, reg
))
1131 return nct6775_write_value(data
, reg
, value
);
1134 /* This function assumes that the caller holds data->update_lock */
1135 static void nct6775_write_fan_div(struct nct6775_data
*data
, int nr
)
1141 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV1
) & 0x70)
1142 | (data
->fan_div
[0] & 0x7);
1143 nct6775_write_value(data
, NCT6775_REG_FANDIV1
, reg
);
1146 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV1
) & 0x7)
1147 | ((data
->fan_div
[1] << 4) & 0x70);
1148 nct6775_write_value(data
, NCT6775_REG_FANDIV1
, reg
);
1151 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV2
) & 0x70)
1152 | (data
->fan_div
[2] & 0x7);
1153 nct6775_write_value(data
, NCT6775_REG_FANDIV2
, reg
);
1156 reg
= (nct6775_read_value(data
, NCT6775_REG_FANDIV2
) & 0x7)
1157 | ((data
->fan_div
[3] << 4) & 0x70);
1158 nct6775_write_value(data
, NCT6775_REG_FANDIV2
, reg
);
1163 static void nct6775_write_fan_div_common(struct nct6775_data
*data
, int nr
)
1165 if (data
->kind
== nct6775
)
1166 nct6775_write_fan_div(data
, nr
);
1169 static void nct6775_update_fan_div(struct nct6775_data
*data
)
1173 i
= nct6775_read_value(data
, NCT6775_REG_FANDIV1
);
1174 data
->fan_div
[0] = i
& 0x7;
1175 data
->fan_div
[1] = (i
& 0x70) >> 4;
1176 i
= nct6775_read_value(data
, NCT6775_REG_FANDIV2
);
1177 data
->fan_div
[2] = i
& 0x7;
1178 if (data
->has_fan
& (1 << 3))
1179 data
->fan_div
[3] = (i
& 0x70) >> 4;
1182 static void nct6775_update_fan_div_common(struct nct6775_data
*data
)
1184 if (data
->kind
== nct6775
)
1185 nct6775_update_fan_div(data
);
1188 static void nct6775_init_fan_div(struct nct6775_data
*data
)
1192 nct6775_update_fan_div_common(data
);
1194 * For all fans, start with highest divider value if the divider
1195 * register is not initialized. This ensures that we get a
1196 * reading from the fan count register, even if it is not optimal.
1197 * We'll compute a better divider later on.
1199 for (i
= 0; i
< ARRAY_SIZE(data
->fan_div
); i
++) {
1200 if (!(data
->has_fan
& (1 << i
)))
1202 if (data
->fan_div
[i
] == 0) {
1203 data
->fan_div
[i
] = 7;
1204 nct6775_write_fan_div_common(data
, i
);
1209 static void nct6775_init_fan_common(struct device
*dev
,
1210 struct nct6775_data
*data
)
1215 if (data
->has_fan_div
)
1216 nct6775_init_fan_div(data
);
1219 * If fan_min is not set (0), set it to 0xff to disable it. This
1220 * prevents the unnecessary warning when fanX_min is reported as 0.
1222 for (i
= 0; i
< ARRAY_SIZE(data
->fan_min
); i
++) {
1223 if (data
->has_fan_min
& (1 << i
)) {
1224 reg
= nct6775_read_value(data
, data
->REG_FAN_MIN
[i
]);
1226 nct6775_write_value(data
, data
->REG_FAN_MIN
[i
],
1227 data
->has_fan_div
? 0xff
1233 static void nct6775_select_fan_div(struct device
*dev
,
1234 struct nct6775_data
*data
, int nr
, u16 reg
)
1236 u8 fan_div
= data
->fan_div
[nr
];
1239 if (!data
->has_fan_div
)
1243 * If we failed to measure the fan speed, or the reported value is not
1244 * in the optimal range, and the clock divider can be modified,
1245 * let's try that for next time.
1247 if (reg
== 0x00 && fan_div
< 0x07)
1249 else if (reg
!= 0x00 && reg
< 0x30 && fan_div
> 0)
1252 if (fan_div
!= data
->fan_div
[nr
]) {
1253 dev_dbg(dev
, "Modifying fan%d clock divider from %u to %u\n",
1254 nr
+ 1, div_from_reg(data
->fan_div
[nr
]),
1255 div_from_reg(fan_div
));
1257 /* Preserve min limit if possible */
1258 if (data
->has_fan_min
& (1 << nr
)) {
1259 fan_min
= data
->fan_min
[nr
];
1260 if (fan_div
> data
->fan_div
[nr
]) {
1261 if (fan_min
!= 255 && fan_min
> 1)
1264 if (fan_min
!= 255) {
1270 if (fan_min
!= data
->fan_min
[nr
]) {
1271 data
->fan_min
[nr
] = fan_min
;
1272 nct6775_write_value(data
, data
->REG_FAN_MIN
[nr
],
1276 data
->fan_div
[nr
] = fan_div
;
1277 nct6775_write_fan_div_common(data
, nr
);
1281 static void nct6775_update_pwm(struct device
*dev
)
1283 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1285 int fanmodecfg
, reg
;
1288 for (i
= 0; i
< data
->pwm_num
; i
++) {
1289 if (!(data
->has_pwm
& (1 << i
)))
1292 duty_is_dc
= data
->REG_PWM_MODE
[i
] &&
1293 (nct6775_read_value(data
, data
->REG_PWM_MODE
[i
])
1294 & data
->PWM_MODE_MASK
[i
]);
1295 data
->pwm_mode
[i
] = duty_is_dc
;
1297 fanmodecfg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[i
]);
1298 for (j
= 0; j
< ARRAY_SIZE(data
->REG_PWM
); j
++) {
1299 if (data
->REG_PWM
[j
] && data
->REG_PWM
[j
][i
]) {
1301 = nct6775_read_value(data
,
1302 data
->REG_PWM
[j
][i
]);
1306 data
->pwm_enable
[i
] = reg_to_pwm_enable(data
->pwm
[0][i
],
1307 (fanmodecfg
>> 4) & 7);
1309 if (!data
->temp_tolerance
[0][i
] ||
1310 data
->pwm_enable
[i
] != speed_cruise
)
1311 data
->temp_tolerance
[0][i
] = fanmodecfg
& 0x0f;
1312 if (!data
->target_speed_tolerance
[i
] ||
1313 data
->pwm_enable
[i
] == speed_cruise
) {
1314 u8 t
= fanmodecfg
& 0x0f;
1316 if (data
->REG_TOLERANCE_H
) {
1317 t
|= (nct6775_read_value(data
,
1318 data
->REG_TOLERANCE_H
[i
]) & 0x70) >> 1;
1320 data
->target_speed_tolerance
[i
] = t
;
1323 data
->temp_tolerance
[1][i
] =
1324 nct6775_read_value(data
,
1325 data
->REG_CRITICAL_TEMP_TOLERANCE
[i
]);
1327 reg
= nct6775_read_value(data
, data
->REG_TEMP_SEL
[i
]);
1328 data
->pwm_temp_sel
[i
] = reg
& 0x1f;
1329 /* If fan can stop, report floor as 0 */
1331 data
->pwm
[2][i
] = 0;
1333 if (!data
->REG_WEIGHT_TEMP_SEL
[i
])
1336 reg
= nct6775_read_value(data
, data
->REG_WEIGHT_TEMP_SEL
[i
]);
1337 data
->pwm_weight_temp_sel
[i
] = reg
& 0x1f;
1338 /* If weight is disabled, report weight source as 0 */
1339 if (j
== 1 && !(reg
& 0x80))
1340 data
->pwm_weight_temp_sel
[i
] = 0;
1342 /* Weight temp data */
1343 for (j
= 0; j
< ARRAY_SIZE(data
->weight_temp
); j
++) {
1344 data
->weight_temp
[j
][i
]
1345 = nct6775_read_value(data
,
1346 data
->REG_WEIGHT_TEMP
[j
][i
]);
1351 static void nct6775_update_pwm_limits(struct device
*dev
)
1353 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1358 for (i
= 0; i
< data
->pwm_num
; i
++) {
1359 if (!(data
->has_pwm
& (1 << i
)))
1362 for (j
= 0; j
< ARRAY_SIZE(data
->fan_time
); j
++) {
1363 data
->fan_time
[j
][i
] =
1364 nct6775_read_value(data
, data
->REG_FAN_TIME
[j
][i
]);
1367 reg_t
= nct6775_read_value(data
, data
->REG_TARGET
[i
]);
1368 /* Update only in matching mode or if never updated */
1369 if (!data
->target_temp
[i
] ||
1370 data
->pwm_enable
[i
] == thermal_cruise
)
1371 data
->target_temp
[i
] = reg_t
& data
->target_temp_mask
;
1372 if (!data
->target_speed
[i
] ||
1373 data
->pwm_enable
[i
] == speed_cruise
) {
1374 if (data
->REG_TOLERANCE_H
) {
1375 reg_t
|= (nct6775_read_value(data
,
1376 data
->REG_TOLERANCE_H
[i
]) & 0x0f) << 8;
1378 data
->target_speed
[i
] = reg_t
;
1381 for (j
= 0; j
< data
->auto_pwm_num
; j
++) {
1382 data
->auto_pwm
[i
][j
] =
1383 nct6775_read_value(data
,
1384 NCT6775_AUTO_PWM(data
, i
, j
));
1385 data
->auto_temp
[i
][j
] =
1386 nct6775_read_value(data
,
1387 NCT6775_AUTO_TEMP(data
, i
, j
));
1390 /* critical auto_pwm temperature data */
1391 data
->auto_temp
[i
][data
->auto_pwm_num
] =
1392 nct6775_read_value(data
, data
->REG_CRITICAL_TEMP
[i
]);
1394 switch (data
->kind
) {
1396 reg
= nct6775_read_value(data
,
1397 NCT6775_REG_CRITICAL_ENAB
[i
]);
1398 data
->auto_pwm
[i
][data
->auto_pwm_num
] =
1399 (reg
& 0x02) ? 0xff : 0x00;
1402 data
->auto_pwm
[i
][data
->auto_pwm_num
] = 0xff;
1408 reg
= nct6775_read_value(data
,
1409 data
->REG_CRITICAL_PWM_ENABLE
[i
]);
1410 if (reg
& data
->CRITICAL_PWM_ENABLE_MASK
)
1411 reg
= nct6775_read_value(data
,
1412 data
->REG_CRITICAL_PWM
[i
]);
1415 data
->auto_pwm
[i
][data
->auto_pwm_num
] = reg
;
1421 static struct nct6775_data
*nct6775_update_device(struct device
*dev
)
1423 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1426 mutex_lock(&data
->update_lock
);
1428 if (time_after(jiffies
, data
->last_updated
+ HZ
+ HZ
/ 2)
1430 /* Fan clock dividers */
1431 nct6775_update_fan_div_common(data
);
1433 /* Measured voltages and limits */
1434 for (i
= 0; i
< data
->in_num
; i
++) {
1435 if (!(data
->have_in
& (1 << i
)))
1438 data
->in
[i
][0] = nct6775_read_value(data
,
1440 data
->in
[i
][1] = nct6775_read_value(data
,
1441 data
->REG_IN_MINMAX
[0][i
]);
1442 data
->in
[i
][2] = nct6775_read_value(data
,
1443 data
->REG_IN_MINMAX
[1][i
]);
1446 /* Measured fan speeds and limits */
1447 for (i
= 0; i
< ARRAY_SIZE(data
->rpm
); i
++) {
1450 if (!(data
->has_fan
& (1 << i
)))
1453 reg
= nct6775_read_value(data
, data
->REG_FAN
[i
]);
1454 data
->rpm
[i
] = data
->fan_from_reg(reg
,
1457 if (data
->has_fan_min
& (1 << i
))
1458 data
->fan_min
[i
] = nct6775_read_value(data
,
1459 data
->REG_FAN_MIN
[i
]);
1460 data
->fan_pulses
[i
] =
1461 (nct6775_read_value(data
, data
->REG_FAN_PULSES
[i
])
1462 >> data
->FAN_PULSE_SHIFT
[i
]) & 0x03;
1464 nct6775_select_fan_div(dev
, data
, i
, reg
);
1467 nct6775_update_pwm(dev
);
1468 nct6775_update_pwm_limits(dev
);
1470 /* Measured temperatures and limits */
1471 for (i
= 0; i
< NUM_TEMP
; i
++) {
1472 if (!(data
->have_temp
& (1 << i
)))
1474 for (j
= 0; j
< ARRAY_SIZE(data
->reg_temp
); j
++) {
1475 if (data
->reg_temp
[j
][i
])
1477 = nct6775_read_temp(data
,
1478 data
->reg_temp
[j
][i
]);
1480 if (i
>= NUM_TEMP_FIXED
||
1481 !(data
->have_temp_fixed
& (1 << i
)))
1483 data
->temp_offset
[i
]
1484 = nct6775_read_value(data
, data
->REG_TEMP_OFFSET
[i
]);
1488 for (i
= 0; i
< NUM_REG_ALARM
; i
++) {
1491 if (!data
->REG_ALARM
[i
])
1493 alarm
= nct6775_read_value(data
, data
->REG_ALARM
[i
]);
1494 data
->alarms
|= ((u64
)alarm
) << (i
<< 3);
1498 for (i
= 0; i
< NUM_REG_BEEP
; i
++) {
1501 if (!data
->REG_BEEP
[i
])
1503 beep
= nct6775_read_value(data
, data
->REG_BEEP
[i
]);
1504 data
->beeps
|= ((u64
)beep
) << (i
<< 3);
1507 data
->last_updated
= jiffies
;
1511 mutex_unlock(&data
->update_lock
);
1516 * Sysfs callback functions
1519 show_in_reg(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1521 struct nct6775_data
*data
= nct6775_update_device(dev
);
1522 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1523 int index
= sattr
->index
;
1526 return sprintf(buf
, "%ld\n", in_from_reg(data
->in
[nr
][index
], nr
));
1530 store_in_reg(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
1533 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1534 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1535 int index
= sattr
->index
;
1540 err
= kstrtoul(buf
, 10, &val
);
1543 mutex_lock(&data
->update_lock
);
1544 data
->in
[nr
][index
] = in_to_reg(val
, nr
);
1545 nct6775_write_value(data
, data
->REG_IN_MINMAX
[index
- 1][nr
],
1546 data
->in
[nr
][index
]);
1547 mutex_unlock(&data
->update_lock
);
1552 show_alarm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1554 struct nct6775_data
*data
= nct6775_update_device(dev
);
1555 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1556 int nr
= data
->ALARM_BITS
[sattr
->index
];
1558 return sprintf(buf
, "%u\n",
1559 (unsigned int)((data
->alarms
>> nr
) & 0x01));
1562 static int find_temp_source(struct nct6775_data
*data
, int index
, int count
)
1564 int source
= data
->temp_src
[index
];
1567 for (nr
= 0; nr
< count
; nr
++) {
1570 src
= nct6775_read_value(data
,
1571 data
->REG_TEMP_SOURCE
[nr
]) & 0x1f;
1579 show_temp_alarm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1581 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1582 struct nct6775_data
*data
= nct6775_update_device(dev
);
1583 unsigned int alarm
= 0;
1587 * For temperatures, there is no fixed mapping from registers to alarm
1588 * bits. Alarm bits are determined by the temperature source mapping.
1590 nr
= find_temp_source(data
, sattr
->index
, data
->num_temp_alarms
);
1592 int bit
= data
->ALARM_BITS
[nr
+ TEMP_ALARM_BASE
];
1594 alarm
= (data
->alarms
>> bit
) & 0x01;
1596 return sprintf(buf
, "%u\n", alarm
);
1600 show_beep(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1602 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1603 struct nct6775_data
*data
= nct6775_update_device(dev
);
1604 int nr
= data
->BEEP_BITS
[sattr
->index
];
1606 return sprintf(buf
, "%u\n",
1607 (unsigned int)((data
->beeps
>> nr
) & 0x01));
1611 store_beep(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
1614 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1615 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1616 int nr
= data
->BEEP_BITS
[sattr
->index
];
1617 int regindex
= nr
>> 3;
1621 err
= kstrtoul(buf
, 10, &val
);
1627 mutex_lock(&data
->update_lock
);
1629 data
->beeps
|= (1ULL << nr
);
1631 data
->beeps
&= ~(1ULL << nr
);
1632 nct6775_write_value(data
, data
->REG_BEEP
[regindex
],
1633 (data
->beeps
>> (regindex
<< 3)) & 0xff);
1634 mutex_unlock(&data
->update_lock
);
1639 show_temp_beep(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1641 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1642 struct nct6775_data
*data
= nct6775_update_device(dev
);
1643 unsigned int beep
= 0;
1647 * For temperatures, there is no fixed mapping from registers to beep
1648 * enable bits. Beep enable bits are determined by the temperature
1651 nr
= find_temp_source(data
, sattr
->index
, data
->num_temp_beeps
);
1653 int bit
= data
->BEEP_BITS
[nr
+ TEMP_ALARM_BASE
];
1655 beep
= (data
->beeps
>> bit
) & 0x01;
1657 return sprintf(buf
, "%u\n", beep
);
1661 store_temp_beep(struct device
*dev
, struct device_attribute
*attr
,
1662 const char *buf
, size_t count
)
1664 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1665 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1666 int nr
, bit
, regindex
;
1670 err
= kstrtoul(buf
, 10, &val
);
1676 nr
= find_temp_source(data
, sattr
->index
, data
->num_temp_beeps
);
1680 bit
= data
->BEEP_BITS
[nr
+ TEMP_ALARM_BASE
];
1681 regindex
= bit
>> 3;
1683 mutex_lock(&data
->update_lock
);
1685 data
->beeps
|= (1ULL << bit
);
1687 data
->beeps
&= ~(1ULL << bit
);
1688 nct6775_write_value(data
, data
->REG_BEEP
[regindex
],
1689 (data
->beeps
>> (regindex
<< 3)) & 0xff);
1690 mutex_unlock(&data
->update_lock
);
1695 static umode_t
nct6775_in_is_visible(struct kobject
*kobj
,
1696 struct attribute
*attr
, int index
)
1698 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
1699 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1700 int in
= index
/ 5; /* voltage index */
1702 if (!(data
->have_in
& (1 << in
)))
1708 SENSOR_TEMPLATE_2(in_input
, "in%d_input", S_IRUGO
, show_in_reg
, NULL
, 0, 0);
1709 SENSOR_TEMPLATE(in_alarm
, "in%d_alarm", S_IRUGO
, show_alarm
, NULL
, 0);
1710 SENSOR_TEMPLATE(in_beep
, "in%d_beep", S_IWUSR
| S_IRUGO
, show_beep
, store_beep
,
1712 SENSOR_TEMPLATE_2(in_min
, "in%d_min", S_IWUSR
| S_IRUGO
, show_in_reg
,
1713 store_in_reg
, 0, 1);
1714 SENSOR_TEMPLATE_2(in_max
, "in%d_max", S_IWUSR
| S_IRUGO
, show_in_reg
,
1715 store_in_reg
, 0, 2);
1718 * nct6775_in_is_visible uses the index into the following array
1719 * to determine if attributes should be created or not.
1720 * Any change in order or content must be matched.
1722 static struct sensor_device_template
*nct6775_attributes_in_template
[] = {
1723 &sensor_dev_template_in_input
,
1724 &sensor_dev_template_in_alarm
,
1725 &sensor_dev_template_in_beep
,
1726 &sensor_dev_template_in_min
,
1727 &sensor_dev_template_in_max
,
1731 static struct sensor_template_group nct6775_in_template_group
= {
1732 .templates
= nct6775_attributes_in_template
,
1733 .is_visible
= nct6775_in_is_visible
,
1737 show_fan(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1739 struct nct6775_data
*data
= nct6775_update_device(dev
);
1740 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1741 int nr
= sattr
->index
;
1743 return sprintf(buf
, "%d\n", data
->rpm
[nr
]);
1747 show_fan_min(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1749 struct nct6775_data
*data
= nct6775_update_device(dev
);
1750 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1751 int nr
= sattr
->index
;
1753 return sprintf(buf
, "%d\n",
1754 data
->fan_from_reg_min(data
->fan_min
[nr
],
1755 data
->fan_div
[nr
]));
1759 show_fan_div(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1761 struct nct6775_data
*data
= nct6775_update_device(dev
);
1762 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1763 int nr
= sattr
->index
;
1765 return sprintf(buf
, "%u\n", div_from_reg(data
->fan_div
[nr
]));
1769 store_fan_min(struct device
*dev
, struct device_attribute
*attr
,
1770 const char *buf
, size_t count
)
1772 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1773 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1774 int nr
= sattr
->index
;
1780 err
= kstrtoul(buf
, 10, &val
);
1784 mutex_lock(&data
->update_lock
);
1785 if (!data
->has_fan_div
) {
1786 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1792 val
= 1350000U / val
;
1793 val
= (val
& 0x1f) | ((val
<< 3) & 0xff00);
1795 data
->fan_min
[nr
] = val
;
1796 goto write_min
; /* Leave fan divider alone */
1799 /* No min limit, alarm disabled */
1800 data
->fan_min
[nr
] = 255;
1801 new_div
= data
->fan_div
[nr
]; /* No change */
1802 dev_info(dev
, "fan%u low limit and alarm disabled\n", nr
+ 1);
1805 reg
= 1350000U / val
;
1806 if (reg
>= 128 * 255) {
1808 * Speed below this value cannot possibly be represented,
1809 * even with the highest divider (128)
1811 data
->fan_min
[nr
] = 254;
1812 new_div
= 7; /* 128 == (1 << 7) */
1814 "fan%u low limit %lu below minimum %u, set to minimum\n",
1815 nr
+ 1, val
, data
->fan_from_reg_min(254, 7));
1818 * Speed above this value cannot possibly be represented,
1819 * even with the lowest divider (1)
1821 data
->fan_min
[nr
] = 1;
1822 new_div
= 0; /* 1 == (1 << 0) */
1824 "fan%u low limit %lu above maximum %u, set to maximum\n",
1825 nr
+ 1, val
, data
->fan_from_reg_min(1, 0));
1828 * Automatically pick the best divider, i.e. the one such
1829 * that the min limit will correspond to a register value
1830 * in the 96..192 range
1833 while (reg
> 192 && new_div
< 7) {
1837 data
->fan_min
[nr
] = reg
;
1842 * Write both the fan clock divider (if it changed) and the new
1843 * fan min (unconditionally)
1845 if (new_div
!= data
->fan_div
[nr
]) {
1846 dev_dbg(dev
, "fan%u clock divider changed from %u to %u\n",
1847 nr
+ 1, div_from_reg(data
->fan_div
[nr
]),
1848 div_from_reg(new_div
));
1849 data
->fan_div
[nr
] = new_div
;
1850 nct6775_write_fan_div_common(data
, nr
);
1851 /* Give the chip time to sample a new speed value */
1852 data
->last_updated
= jiffies
;
1856 nct6775_write_value(data
, data
->REG_FAN_MIN
[nr
], data
->fan_min
[nr
]);
1857 mutex_unlock(&data
->update_lock
);
1863 show_fan_pulses(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1865 struct nct6775_data
*data
= nct6775_update_device(dev
);
1866 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1867 int p
= data
->fan_pulses
[sattr
->index
];
1869 return sprintf(buf
, "%d\n", p
? : 4);
1873 store_fan_pulses(struct device
*dev
, struct device_attribute
*attr
,
1874 const char *buf
, size_t count
)
1876 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1877 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1878 int nr
= sattr
->index
;
1883 err
= kstrtoul(buf
, 10, &val
);
1890 mutex_lock(&data
->update_lock
);
1891 data
->fan_pulses
[nr
] = val
& 3;
1892 reg
= nct6775_read_value(data
, data
->REG_FAN_PULSES
[nr
]);
1893 reg
&= ~(0x03 << data
->FAN_PULSE_SHIFT
[nr
]);
1894 reg
|= (val
& 3) << data
->FAN_PULSE_SHIFT
[nr
];
1895 nct6775_write_value(data
, data
->REG_FAN_PULSES
[nr
], reg
);
1896 mutex_unlock(&data
->update_lock
);
1901 static umode_t
nct6775_fan_is_visible(struct kobject
*kobj
,
1902 struct attribute
*attr
, int index
)
1904 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
1905 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1906 int fan
= index
/ 6; /* fan index */
1907 int nr
= index
% 6; /* attribute index */
1909 if (!(data
->has_fan
& (1 << fan
)))
1912 if (nr
== 1 && data
->ALARM_BITS
[FAN_ALARM_BASE
+ fan
] == -1)
1914 if (nr
== 2 && data
->BEEP_BITS
[FAN_ALARM_BASE
+ fan
] == -1)
1916 if (nr
== 4 && !(data
->has_fan_min
& (1 << fan
)))
1918 if (nr
== 5 && data
->kind
!= nct6775
)
1924 SENSOR_TEMPLATE(fan_input
, "fan%d_input", S_IRUGO
, show_fan
, NULL
, 0);
1925 SENSOR_TEMPLATE(fan_alarm
, "fan%d_alarm", S_IRUGO
, show_alarm
, NULL
,
1927 SENSOR_TEMPLATE(fan_beep
, "fan%d_beep", S_IWUSR
| S_IRUGO
, show_beep
,
1928 store_beep
, FAN_ALARM_BASE
);
1929 SENSOR_TEMPLATE(fan_pulses
, "fan%d_pulses", S_IWUSR
| S_IRUGO
, show_fan_pulses
,
1930 store_fan_pulses
, 0);
1931 SENSOR_TEMPLATE(fan_min
, "fan%d_min", S_IWUSR
| S_IRUGO
, show_fan_min
,
1933 SENSOR_TEMPLATE(fan_div
, "fan%d_div", S_IRUGO
, show_fan_div
, NULL
, 0);
1936 * nct6775_fan_is_visible uses the index into the following array
1937 * to determine if attributes should be created or not.
1938 * Any change in order or content must be matched.
1940 static struct sensor_device_template
*nct6775_attributes_fan_template
[] = {
1941 &sensor_dev_template_fan_input
,
1942 &sensor_dev_template_fan_alarm
, /* 1 */
1943 &sensor_dev_template_fan_beep
, /* 2 */
1944 &sensor_dev_template_fan_pulses
,
1945 &sensor_dev_template_fan_min
, /* 4 */
1946 &sensor_dev_template_fan_div
, /* 5 */
1950 static struct sensor_template_group nct6775_fan_template_group
= {
1951 .templates
= nct6775_attributes_fan_template
,
1952 .is_visible
= nct6775_fan_is_visible
,
1957 show_temp_label(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1959 struct nct6775_data
*data
= nct6775_update_device(dev
);
1960 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
1961 int nr
= sattr
->index
;
1963 return sprintf(buf
, "%s\n", data
->temp_label
[data
->temp_src
[nr
]]);
1967 show_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1969 struct nct6775_data
*data
= nct6775_update_device(dev
);
1970 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1972 int index
= sattr
->index
;
1974 return sprintf(buf
, "%d\n", LM75_TEMP_FROM_REG(data
->temp
[index
][nr
]));
1978 store_temp(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
1981 struct nct6775_data
*data
= dev_get_drvdata(dev
);
1982 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
1984 int index
= sattr
->index
;
1988 err
= kstrtol(buf
, 10, &val
);
1992 mutex_lock(&data
->update_lock
);
1993 data
->temp
[index
][nr
] = LM75_TEMP_TO_REG(val
);
1994 nct6775_write_temp(data
, data
->reg_temp
[index
][nr
],
1995 data
->temp
[index
][nr
]);
1996 mutex_unlock(&data
->update_lock
);
2001 show_temp_offset(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2003 struct nct6775_data
*data
= nct6775_update_device(dev
);
2004 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2006 return sprintf(buf
, "%d\n", data
->temp_offset
[sattr
->index
] * 1000);
2010 store_temp_offset(struct device
*dev
, struct device_attribute
*attr
,
2011 const char *buf
, size_t count
)
2013 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2014 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2015 int nr
= sattr
->index
;
2019 err
= kstrtol(buf
, 10, &val
);
2023 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), -128, 127);
2025 mutex_lock(&data
->update_lock
);
2026 data
->temp_offset
[nr
] = val
;
2027 nct6775_write_value(data
, data
->REG_TEMP_OFFSET
[nr
], val
);
2028 mutex_unlock(&data
->update_lock
);
2034 show_temp_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2036 struct nct6775_data
*data
= nct6775_update_device(dev
);
2037 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2038 int nr
= sattr
->index
;
2040 return sprintf(buf
, "%d\n", (int)data
->temp_type
[nr
]);
2044 store_temp_type(struct device
*dev
, struct device_attribute
*attr
,
2045 const char *buf
, size_t count
)
2047 struct nct6775_data
*data
= nct6775_update_device(dev
);
2048 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2049 int nr
= sattr
->index
;
2052 u8 vbat
, diode
, vbit
, dbit
;
2054 err
= kstrtoul(buf
, 10, &val
);
2058 if (val
!= 1 && val
!= 3 && val
!= 4)
2061 mutex_lock(&data
->update_lock
);
2063 data
->temp_type
[nr
] = val
;
2065 dbit
= data
->DIODE_MASK
<< nr
;
2066 vbat
= nct6775_read_value(data
, data
->REG_VBAT
) & ~vbit
;
2067 diode
= nct6775_read_value(data
, data
->REG_DIODE
) & ~dbit
;
2069 case 1: /* CPU diode (diode, current mode) */
2073 case 3: /* diode, voltage mode */
2076 case 4: /* thermistor */
2079 nct6775_write_value(data
, data
->REG_VBAT
, vbat
);
2080 nct6775_write_value(data
, data
->REG_DIODE
, diode
);
2082 mutex_unlock(&data
->update_lock
);
2086 static umode_t
nct6775_temp_is_visible(struct kobject
*kobj
,
2087 struct attribute
*attr
, int index
)
2089 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
2090 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2091 int temp
= index
/ 10; /* temp index */
2092 int nr
= index
% 10; /* attribute index */
2094 if (!(data
->have_temp
& (1 << temp
)))
2097 if (nr
== 2 && find_temp_source(data
, temp
, data
->num_temp_alarms
) < 0)
2098 return 0; /* alarm */
2100 if (nr
== 3 && find_temp_source(data
, temp
, data
->num_temp_beeps
) < 0)
2101 return 0; /* beep */
2103 if (nr
== 4 && !data
->reg_temp
[1][temp
]) /* max */
2106 if (nr
== 5 && !data
->reg_temp
[2][temp
]) /* max_hyst */
2109 if (nr
== 6 && !data
->reg_temp
[3][temp
]) /* crit */
2112 if (nr
== 7 && !data
->reg_temp
[4][temp
]) /* lcrit */
2115 /* offset and type only apply to fixed sensors */
2116 if (nr
> 7 && !(data
->have_temp_fixed
& (1 << temp
)))
2122 SENSOR_TEMPLATE_2(temp_input
, "temp%d_input", S_IRUGO
, show_temp
, NULL
, 0, 0);
2123 SENSOR_TEMPLATE(temp_label
, "temp%d_label", S_IRUGO
, show_temp_label
, NULL
, 0);
2124 SENSOR_TEMPLATE_2(temp_max
, "temp%d_max", S_IRUGO
| S_IWUSR
, show_temp
,
2126 SENSOR_TEMPLATE_2(temp_max_hyst
, "temp%d_max_hyst", S_IRUGO
| S_IWUSR
,
2127 show_temp
, store_temp
, 0, 2);
2128 SENSOR_TEMPLATE_2(temp_crit
, "temp%d_crit", S_IRUGO
| S_IWUSR
, show_temp
,
2130 SENSOR_TEMPLATE_2(temp_lcrit
, "temp%d_lcrit", S_IRUGO
| S_IWUSR
, show_temp
,
2132 SENSOR_TEMPLATE(temp_offset
, "temp%d_offset", S_IRUGO
| S_IWUSR
,
2133 show_temp_offset
, store_temp_offset
, 0);
2134 SENSOR_TEMPLATE(temp_type
, "temp%d_type", S_IRUGO
| S_IWUSR
, show_temp_type
,
2135 store_temp_type
, 0);
2136 SENSOR_TEMPLATE(temp_alarm
, "temp%d_alarm", S_IRUGO
, show_temp_alarm
, NULL
, 0);
2137 SENSOR_TEMPLATE(temp_beep
, "temp%d_beep", S_IRUGO
| S_IWUSR
, show_temp_beep
,
2138 store_temp_beep
, 0);
2141 * nct6775_temp_is_visible uses the index into the following array
2142 * to determine if attributes should be created or not.
2143 * Any change in order or content must be matched.
2145 static struct sensor_device_template
*nct6775_attributes_temp_template
[] = {
2146 &sensor_dev_template_temp_input
,
2147 &sensor_dev_template_temp_label
,
2148 &sensor_dev_template_temp_alarm
, /* 2 */
2149 &sensor_dev_template_temp_beep
, /* 3 */
2150 &sensor_dev_template_temp_max
, /* 4 */
2151 &sensor_dev_template_temp_max_hyst
, /* 5 */
2152 &sensor_dev_template_temp_crit
, /* 6 */
2153 &sensor_dev_template_temp_lcrit
, /* 7 */
2154 &sensor_dev_template_temp_offset
, /* 8 */
2155 &sensor_dev_template_temp_type
, /* 9 */
2159 static struct sensor_template_group nct6775_temp_template_group
= {
2160 .templates
= nct6775_attributes_temp_template
,
2161 .is_visible
= nct6775_temp_is_visible
,
2166 show_pwm_mode(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2168 struct nct6775_data
*data
= nct6775_update_device(dev
);
2169 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2171 return sprintf(buf
, "%d\n", !data
->pwm_mode
[sattr
->index
]);
2175 store_pwm_mode(struct device
*dev
, struct device_attribute
*attr
,
2176 const char *buf
, size_t count
)
2178 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2179 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2180 int nr
= sattr
->index
;
2185 err
= kstrtoul(buf
, 10, &val
);
2192 /* Setting DC mode is not supported for all chips/channels */
2193 if (data
->REG_PWM_MODE
[nr
] == 0) {
2199 mutex_lock(&data
->update_lock
);
2200 data
->pwm_mode
[nr
] = val
;
2201 reg
= nct6775_read_value(data
, data
->REG_PWM_MODE
[nr
]);
2202 reg
&= ~data
->PWM_MODE_MASK
[nr
];
2204 reg
|= data
->PWM_MODE_MASK
[nr
];
2205 nct6775_write_value(data
, data
->REG_PWM_MODE
[nr
], reg
);
2206 mutex_unlock(&data
->update_lock
);
2211 show_pwm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2213 struct nct6775_data
*data
= nct6775_update_device(dev
);
2214 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2216 int index
= sattr
->index
;
2220 * For automatic fan control modes, show current pwm readings.
2221 * Otherwise, show the configured value.
2223 if (index
== 0 && data
->pwm_enable
[nr
] > manual
)
2224 pwm
= nct6775_read_value(data
, data
->REG_PWM_READ
[nr
]);
2226 pwm
= data
->pwm
[index
][nr
];
2228 return sprintf(buf
, "%d\n", pwm
);
2232 store_pwm(struct device
*dev
, struct device_attribute
*attr
, const char *buf
,
2235 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2236 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2238 int index
= sattr
->index
;
2240 int minval
[7] = { 0, 1, 1, data
->pwm
[2][nr
], 0, 0, 0 };
2242 = { 255, 255, data
->pwm
[3][nr
] ? : 255, 255, 255, 255, 255 };
2246 err
= kstrtoul(buf
, 10, &val
);
2249 val
= clamp_val(val
, minval
[index
], maxval
[index
]);
2251 mutex_lock(&data
->update_lock
);
2252 data
->pwm
[index
][nr
] = val
;
2253 nct6775_write_value(data
, data
->REG_PWM
[index
][nr
], val
);
2254 if (index
== 2) { /* floor: disable if val == 0 */
2255 reg
= nct6775_read_value(data
, data
->REG_TEMP_SEL
[nr
]);
2259 nct6775_write_value(data
, data
->REG_TEMP_SEL
[nr
], reg
);
2261 mutex_unlock(&data
->update_lock
);
2265 /* Returns 0 if OK, -EINVAL otherwise */
2266 static int check_trip_points(struct nct6775_data
*data
, int nr
)
2270 for (i
= 0; i
< data
->auto_pwm_num
- 1; i
++) {
2271 if (data
->auto_temp
[nr
][i
] > data
->auto_temp
[nr
][i
+ 1])
2274 for (i
= 0; i
< data
->auto_pwm_num
- 1; i
++) {
2275 if (data
->auto_pwm
[nr
][i
] > data
->auto_pwm
[nr
][i
+ 1])
2278 /* validate critical temperature and pwm if enabled (pwm > 0) */
2279 if (data
->auto_pwm
[nr
][data
->auto_pwm_num
]) {
2280 if (data
->auto_temp
[nr
][data
->auto_pwm_num
- 1] >
2281 data
->auto_temp
[nr
][data
->auto_pwm_num
] ||
2282 data
->auto_pwm
[nr
][data
->auto_pwm_num
- 1] >
2283 data
->auto_pwm
[nr
][data
->auto_pwm_num
])
2289 static void pwm_update_registers(struct nct6775_data
*data
, int nr
)
2293 switch (data
->pwm_enable
[nr
]) {
2298 reg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[nr
]);
2299 reg
= (reg
& ~data
->tolerance_mask
) |
2300 (data
->target_speed_tolerance
[nr
] & data
->tolerance_mask
);
2301 nct6775_write_value(data
, data
->REG_FAN_MODE
[nr
], reg
);
2302 nct6775_write_value(data
, data
->REG_TARGET
[nr
],
2303 data
->target_speed
[nr
] & 0xff);
2304 if (data
->REG_TOLERANCE_H
) {
2305 reg
= (data
->target_speed
[nr
] >> 8) & 0x0f;
2306 reg
|= (data
->target_speed_tolerance
[nr
] & 0x38) << 1;
2307 nct6775_write_value(data
,
2308 data
->REG_TOLERANCE_H
[nr
],
2312 case thermal_cruise
:
2313 nct6775_write_value(data
, data
->REG_TARGET
[nr
],
2314 data
->target_temp
[nr
]);
2317 reg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[nr
]);
2318 reg
= (reg
& ~data
->tolerance_mask
) |
2319 data
->temp_tolerance
[0][nr
];
2320 nct6775_write_value(data
, data
->REG_FAN_MODE
[nr
], reg
);
2326 show_pwm_enable(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2328 struct nct6775_data
*data
= nct6775_update_device(dev
);
2329 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2331 return sprintf(buf
, "%d\n", data
->pwm_enable
[sattr
->index
]);
2335 store_pwm_enable(struct device
*dev
, struct device_attribute
*attr
,
2336 const char *buf
, size_t count
)
2338 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2339 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2340 int nr
= sattr
->index
;
2345 err
= kstrtoul(buf
, 10, &val
);
2352 if (val
== sf3
&& data
->kind
!= nct6775
)
2355 if (val
== sf4
&& check_trip_points(data
, nr
)) {
2356 dev_err(dev
, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2357 dev_err(dev
, "Adjust trip points and try again\n");
2361 mutex_lock(&data
->update_lock
);
2362 data
->pwm_enable
[nr
] = val
;
2365 * turn off pwm control: select manual mode, set pwm to maximum
2367 data
->pwm
[0][nr
] = 255;
2368 nct6775_write_value(data
, data
->REG_PWM
[0][nr
], 255);
2370 pwm_update_registers(data
, nr
);
2371 reg
= nct6775_read_value(data
, data
->REG_FAN_MODE
[nr
]);
2373 reg
|= pwm_enable_to_reg(val
) << 4;
2374 nct6775_write_value(data
, data
->REG_FAN_MODE
[nr
], reg
);
2375 mutex_unlock(&data
->update_lock
);
2380 show_pwm_temp_sel_common(struct nct6775_data
*data
, char *buf
, int src
)
2384 for (i
= 0; i
< NUM_TEMP
; i
++) {
2385 if (!(data
->have_temp
& (1 << i
)))
2387 if (src
== data
->temp_src
[i
]) {
2393 return sprintf(buf
, "%d\n", sel
);
2397 show_pwm_temp_sel(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2399 struct nct6775_data
*data
= nct6775_update_device(dev
);
2400 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2401 int index
= sattr
->index
;
2403 return show_pwm_temp_sel_common(data
, buf
, data
->pwm_temp_sel
[index
]);
2407 store_pwm_temp_sel(struct device
*dev
, struct device_attribute
*attr
,
2408 const char *buf
, size_t count
)
2410 struct nct6775_data
*data
= nct6775_update_device(dev
);
2411 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2412 int nr
= sattr
->index
;
2416 err
= kstrtoul(buf
, 10, &val
);
2419 if (val
== 0 || val
> NUM_TEMP
)
2421 if (!(data
->have_temp
& (1 << (val
- 1))) || !data
->temp_src
[val
- 1])
2424 mutex_lock(&data
->update_lock
);
2425 src
= data
->temp_src
[val
- 1];
2426 data
->pwm_temp_sel
[nr
] = src
;
2427 reg
= nct6775_read_value(data
, data
->REG_TEMP_SEL
[nr
]);
2430 nct6775_write_value(data
, data
->REG_TEMP_SEL
[nr
], reg
);
2431 mutex_unlock(&data
->update_lock
);
2437 show_pwm_weight_temp_sel(struct device
*dev
, struct device_attribute
*attr
,
2440 struct nct6775_data
*data
= nct6775_update_device(dev
);
2441 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2442 int index
= sattr
->index
;
2444 return show_pwm_temp_sel_common(data
, buf
,
2445 data
->pwm_weight_temp_sel
[index
]);
2449 store_pwm_weight_temp_sel(struct device
*dev
, struct device_attribute
*attr
,
2450 const char *buf
, size_t count
)
2452 struct nct6775_data
*data
= nct6775_update_device(dev
);
2453 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2454 int nr
= sattr
->index
;
2458 err
= kstrtoul(buf
, 10, &val
);
2463 if (val
&& (!(data
->have_temp
& (1 << (val
- 1))) ||
2464 !data
->temp_src
[val
- 1]))
2467 mutex_lock(&data
->update_lock
);
2469 src
= data
->temp_src
[val
- 1];
2470 data
->pwm_weight_temp_sel
[nr
] = src
;
2471 reg
= nct6775_read_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
]);
2473 reg
|= (src
| 0x80);
2474 nct6775_write_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
], reg
);
2476 data
->pwm_weight_temp_sel
[nr
] = 0;
2477 reg
= nct6775_read_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
]);
2479 nct6775_write_value(data
, data
->REG_WEIGHT_TEMP_SEL
[nr
], reg
);
2481 mutex_unlock(&data
->update_lock
);
2487 show_target_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2489 struct nct6775_data
*data
= nct6775_update_device(dev
);
2490 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2492 return sprintf(buf
, "%d\n", data
->target_temp
[sattr
->index
] * 1000);
2496 store_target_temp(struct device
*dev
, struct device_attribute
*attr
,
2497 const char *buf
, size_t count
)
2499 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2500 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2501 int nr
= sattr
->index
;
2505 err
= kstrtoul(buf
, 10, &val
);
2509 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), 0,
2510 data
->target_temp_mask
);
2512 mutex_lock(&data
->update_lock
);
2513 data
->target_temp
[nr
] = val
;
2514 pwm_update_registers(data
, nr
);
2515 mutex_unlock(&data
->update_lock
);
2520 show_target_speed(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2522 struct nct6775_data
*data
= nct6775_update_device(dev
);
2523 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2524 int nr
= sattr
->index
;
2526 return sprintf(buf
, "%d\n",
2527 fan_from_reg16(data
->target_speed
[nr
],
2528 data
->fan_div
[nr
]));
2532 store_target_speed(struct device
*dev
, struct device_attribute
*attr
,
2533 const char *buf
, size_t count
)
2535 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2536 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2537 int nr
= sattr
->index
;
2542 err
= kstrtoul(buf
, 10, &val
);
2546 val
= clamp_val(val
, 0, 1350000U);
2547 speed
= fan_to_reg(val
, data
->fan_div
[nr
]);
2549 mutex_lock(&data
->update_lock
);
2550 data
->target_speed
[nr
] = speed
;
2551 pwm_update_registers(data
, nr
);
2552 mutex_unlock(&data
->update_lock
);
2557 show_temp_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2560 struct nct6775_data
*data
= nct6775_update_device(dev
);
2561 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2563 int index
= sattr
->index
;
2565 return sprintf(buf
, "%d\n", data
->temp_tolerance
[index
][nr
] * 1000);
2569 store_temp_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2570 const char *buf
, size_t count
)
2572 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2573 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2575 int index
= sattr
->index
;
2579 err
= kstrtoul(buf
, 10, &val
);
2583 /* Limit tolerance as needed */
2584 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), 0, data
->tolerance_mask
);
2586 mutex_lock(&data
->update_lock
);
2587 data
->temp_tolerance
[index
][nr
] = val
;
2589 pwm_update_registers(data
, nr
);
2591 nct6775_write_value(data
,
2592 data
->REG_CRITICAL_TEMP_TOLERANCE
[nr
],
2594 mutex_unlock(&data
->update_lock
);
2599 * Fan speed tolerance is a tricky beast, since the associated register is
2600 * a tick counter, but the value is reported and configured as rpm.
2601 * Compute resulting low and high rpm values and report the difference.
2604 show_speed_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2607 struct nct6775_data
*data
= nct6775_update_device(dev
);
2608 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2609 int nr
= sattr
->index
;
2610 int low
= data
->target_speed
[nr
] - data
->target_speed_tolerance
[nr
];
2611 int high
= data
->target_speed
[nr
] + data
->target_speed_tolerance
[nr
];
2621 tolerance
= (fan_from_reg16(low
, data
->fan_div
[nr
])
2622 - fan_from_reg16(high
, data
->fan_div
[nr
])) / 2;
2624 return sprintf(buf
, "%d\n", tolerance
);
2628 store_speed_tolerance(struct device
*dev
, struct device_attribute
*attr
,
2629 const char *buf
, size_t count
)
2631 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2632 struct sensor_device_attribute
*sattr
= to_sensor_dev_attr(attr
);
2633 int nr
= sattr
->index
;
2638 err
= kstrtoul(buf
, 10, &val
);
2642 high
= fan_from_reg16(data
->target_speed
[nr
],
2643 data
->fan_div
[nr
]) + val
;
2644 low
= fan_from_reg16(data
->target_speed
[nr
],
2645 data
->fan_div
[nr
]) - val
;
2651 val
= (fan_to_reg(low
, data
->fan_div
[nr
]) -
2652 fan_to_reg(high
, data
->fan_div
[nr
])) / 2;
2654 /* Limit tolerance as needed */
2655 val
= clamp_val(val
, 0, data
->speed_tolerance_limit
);
2657 mutex_lock(&data
->update_lock
);
2658 data
->target_speed_tolerance
[nr
] = val
;
2659 pwm_update_registers(data
, nr
);
2660 mutex_unlock(&data
->update_lock
);
2664 SENSOR_TEMPLATE_2(pwm
, "pwm%d", S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
, 0, 0);
2665 SENSOR_TEMPLATE(pwm_mode
, "pwm%d_mode", S_IWUSR
| S_IRUGO
, show_pwm_mode
,
2667 SENSOR_TEMPLATE(pwm_enable
, "pwm%d_enable", S_IWUSR
| S_IRUGO
, show_pwm_enable
,
2668 store_pwm_enable
, 0);
2669 SENSOR_TEMPLATE(pwm_temp_sel
, "pwm%d_temp_sel", S_IWUSR
| S_IRUGO
,
2670 show_pwm_temp_sel
, store_pwm_temp_sel
, 0);
2671 SENSOR_TEMPLATE(pwm_target_temp
, "pwm%d_target_temp", S_IWUSR
| S_IRUGO
,
2672 show_target_temp
, store_target_temp
, 0);
2673 SENSOR_TEMPLATE(fan_target
, "fan%d_target", S_IWUSR
| S_IRUGO
,
2674 show_target_speed
, store_target_speed
, 0);
2675 SENSOR_TEMPLATE(fan_tolerance
, "fan%d_tolerance", S_IWUSR
| S_IRUGO
,
2676 show_speed_tolerance
, store_speed_tolerance
, 0);
2678 /* Smart Fan registers */
2681 show_weight_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2683 struct nct6775_data
*data
= nct6775_update_device(dev
);
2684 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2686 int index
= sattr
->index
;
2688 return sprintf(buf
, "%d\n", data
->weight_temp
[index
][nr
] * 1000);
2692 store_weight_temp(struct device
*dev
, struct device_attribute
*attr
,
2693 const char *buf
, size_t count
)
2695 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2696 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2698 int index
= sattr
->index
;
2702 err
= kstrtoul(buf
, 10, &val
);
2706 val
= clamp_val(DIV_ROUND_CLOSEST(val
, 1000), 0, 255);
2708 mutex_lock(&data
->update_lock
);
2709 data
->weight_temp
[index
][nr
] = val
;
2710 nct6775_write_value(data
, data
->REG_WEIGHT_TEMP
[index
][nr
], val
);
2711 mutex_unlock(&data
->update_lock
);
2715 SENSOR_TEMPLATE(pwm_weight_temp_sel
, "pwm%d_weight_temp_sel", S_IWUSR
| S_IRUGO
,
2716 show_pwm_weight_temp_sel
, store_pwm_weight_temp_sel
, 0);
2717 SENSOR_TEMPLATE_2(pwm_weight_temp_step
, "pwm%d_weight_temp_step",
2718 S_IWUSR
| S_IRUGO
, show_weight_temp
, store_weight_temp
, 0, 0);
2719 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol
, "pwm%d_weight_temp_step_tol",
2720 S_IWUSR
| S_IRUGO
, show_weight_temp
, store_weight_temp
, 0, 1);
2721 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base
, "pwm%d_weight_temp_step_base",
2722 S_IWUSR
| S_IRUGO
, show_weight_temp
, store_weight_temp
, 0, 2);
2723 SENSOR_TEMPLATE_2(pwm_weight_duty_step
, "pwm%d_weight_duty_step",
2724 S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
, 0, 5);
2725 SENSOR_TEMPLATE_2(pwm_weight_duty_base
, "pwm%d_weight_duty_base",
2726 S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
, 0, 6);
2729 show_fan_time(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2731 struct nct6775_data
*data
= nct6775_update_device(dev
);
2732 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2734 int index
= sattr
->index
;
2736 return sprintf(buf
, "%d\n",
2737 step_time_from_reg(data
->fan_time
[index
][nr
],
2738 data
->pwm_mode
[nr
]));
2742 store_fan_time(struct device
*dev
, struct device_attribute
*attr
,
2743 const char *buf
, size_t count
)
2745 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2746 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2748 int index
= sattr
->index
;
2752 err
= kstrtoul(buf
, 10, &val
);
2756 val
= step_time_to_reg(val
, data
->pwm_mode
[nr
]);
2757 mutex_lock(&data
->update_lock
);
2758 data
->fan_time
[index
][nr
] = val
;
2759 nct6775_write_value(data
, data
->REG_FAN_TIME
[index
][nr
], val
);
2760 mutex_unlock(&data
->update_lock
);
2765 show_auto_pwm(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2767 struct nct6775_data
*data
= nct6775_update_device(dev
);
2768 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2770 return sprintf(buf
, "%d\n", data
->auto_pwm
[sattr
->nr
][sattr
->index
]);
2774 store_auto_pwm(struct device
*dev
, struct device_attribute
*attr
,
2775 const char *buf
, size_t count
)
2777 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2778 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2780 int point
= sattr
->index
;
2785 err
= kstrtoul(buf
, 10, &val
);
2791 if (point
== data
->auto_pwm_num
) {
2792 if (data
->kind
!= nct6775
&& !val
)
2794 if (data
->kind
!= nct6779
&& val
)
2798 mutex_lock(&data
->update_lock
);
2799 data
->auto_pwm
[nr
][point
] = val
;
2800 if (point
< data
->auto_pwm_num
) {
2801 nct6775_write_value(data
,
2802 NCT6775_AUTO_PWM(data
, nr
, point
),
2803 data
->auto_pwm
[nr
][point
]);
2805 switch (data
->kind
) {
2807 /* disable if needed (pwm == 0) */
2808 reg
= nct6775_read_value(data
,
2809 NCT6775_REG_CRITICAL_ENAB
[nr
]);
2814 nct6775_write_value(data
, NCT6775_REG_CRITICAL_ENAB
[nr
],
2818 break; /* always enabled, nothing to do */
2823 nct6775_write_value(data
, data
->REG_CRITICAL_PWM
[nr
],
2825 reg
= nct6775_read_value(data
,
2826 data
->REG_CRITICAL_PWM_ENABLE
[nr
]);
2828 reg
&= ~data
->CRITICAL_PWM_ENABLE_MASK
;
2830 reg
|= data
->CRITICAL_PWM_ENABLE_MASK
;
2831 nct6775_write_value(data
,
2832 data
->REG_CRITICAL_PWM_ENABLE
[nr
],
2837 mutex_unlock(&data
->update_lock
);
2842 show_auto_temp(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
2844 struct nct6775_data
*data
= nct6775_update_device(dev
);
2845 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2847 int point
= sattr
->index
;
2850 * We don't know for sure if the temperature is signed or unsigned.
2851 * Assume it is unsigned.
2853 return sprintf(buf
, "%d\n", data
->auto_temp
[nr
][point
] * 1000);
2857 store_auto_temp(struct device
*dev
, struct device_attribute
*attr
,
2858 const char *buf
, size_t count
)
2860 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2861 struct sensor_device_attribute_2
*sattr
= to_sensor_dev_attr_2(attr
);
2863 int point
= sattr
->index
;
2867 err
= kstrtoul(buf
, 10, &val
);
2873 mutex_lock(&data
->update_lock
);
2874 data
->auto_temp
[nr
][point
] = DIV_ROUND_CLOSEST(val
, 1000);
2875 if (point
< data
->auto_pwm_num
) {
2876 nct6775_write_value(data
,
2877 NCT6775_AUTO_TEMP(data
, nr
, point
),
2878 data
->auto_temp
[nr
][point
]);
2880 nct6775_write_value(data
, data
->REG_CRITICAL_TEMP
[nr
],
2881 data
->auto_temp
[nr
][point
]);
2883 mutex_unlock(&data
->update_lock
);
2887 static umode_t
nct6775_pwm_is_visible(struct kobject
*kobj
,
2888 struct attribute
*attr
, int index
)
2890 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
2891 struct nct6775_data
*data
= dev_get_drvdata(dev
);
2892 int pwm
= index
/ 36; /* pwm index */
2893 int nr
= index
% 36; /* attribute index */
2895 if (!(data
->has_pwm
& (1 << pwm
)))
2898 if ((nr
>= 14 && nr
<= 18) || nr
== 21) /* weight */
2899 if (!data
->REG_WEIGHT_TEMP_SEL
[pwm
])
2901 if (nr
== 19 && data
->REG_PWM
[3] == NULL
) /* pwm_max */
2903 if (nr
== 20 && data
->REG_PWM
[4] == NULL
) /* pwm_step */
2905 if (nr
== 21 && data
->REG_PWM
[6] == NULL
) /* weight_duty_base */
2908 if (nr
>= 22 && nr
<= 35) { /* auto point */
2909 int api
= (nr
- 22) / 2; /* auto point index */
2911 if (api
> data
->auto_pwm_num
)
2917 SENSOR_TEMPLATE_2(pwm_stop_time
, "pwm%d_stop_time", S_IWUSR
| S_IRUGO
,
2918 show_fan_time
, store_fan_time
, 0, 0);
2919 SENSOR_TEMPLATE_2(pwm_step_up_time
, "pwm%d_step_up_time", S_IWUSR
| S_IRUGO
,
2920 show_fan_time
, store_fan_time
, 0, 1);
2921 SENSOR_TEMPLATE_2(pwm_step_down_time
, "pwm%d_step_down_time", S_IWUSR
| S_IRUGO
,
2922 show_fan_time
, store_fan_time
, 0, 2);
2923 SENSOR_TEMPLATE_2(pwm_start
, "pwm%d_start", S_IWUSR
| S_IRUGO
, show_pwm
,
2925 SENSOR_TEMPLATE_2(pwm_floor
, "pwm%d_floor", S_IWUSR
| S_IRUGO
, show_pwm
,
2927 SENSOR_TEMPLATE_2(pwm_temp_tolerance
, "pwm%d_temp_tolerance", S_IWUSR
| S_IRUGO
,
2928 show_temp_tolerance
, store_temp_tolerance
, 0, 0);
2929 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance
, "pwm%d_crit_temp_tolerance",
2930 S_IWUSR
| S_IRUGO
, show_temp_tolerance
, store_temp_tolerance
,
2933 SENSOR_TEMPLATE_2(pwm_max
, "pwm%d_max", S_IWUSR
| S_IRUGO
, show_pwm
, store_pwm
,
2936 SENSOR_TEMPLATE_2(pwm_step
, "pwm%d_step", S_IWUSR
| S_IRUGO
, show_pwm
,
2939 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm
, "pwm%d_auto_point1_pwm",
2940 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 0);
2941 SENSOR_TEMPLATE_2(pwm_auto_point1_temp
, "pwm%d_auto_point1_temp",
2942 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 0);
2944 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm
, "pwm%d_auto_point2_pwm",
2945 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 1);
2946 SENSOR_TEMPLATE_2(pwm_auto_point2_temp
, "pwm%d_auto_point2_temp",
2947 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 1);
2949 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm
, "pwm%d_auto_point3_pwm",
2950 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 2);
2951 SENSOR_TEMPLATE_2(pwm_auto_point3_temp
, "pwm%d_auto_point3_temp",
2952 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 2);
2954 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm
, "pwm%d_auto_point4_pwm",
2955 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 3);
2956 SENSOR_TEMPLATE_2(pwm_auto_point4_temp
, "pwm%d_auto_point4_temp",
2957 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 3);
2959 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm
, "pwm%d_auto_point5_pwm",
2960 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 4);
2961 SENSOR_TEMPLATE_2(pwm_auto_point5_temp
, "pwm%d_auto_point5_temp",
2962 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 4);
2964 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm
, "pwm%d_auto_point6_pwm",
2965 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 5);
2966 SENSOR_TEMPLATE_2(pwm_auto_point6_temp
, "pwm%d_auto_point6_temp",
2967 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 5);
2969 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm
, "pwm%d_auto_point7_pwm",
2970 S_IWUSR
| S_IRUGO
, show_auto_pwm
, store_auto_pwm
, 0, 6);
2971 SENSOR_TEMPLATE_2(pwm_auto_point7_temp
, "pwm%d_auto_point7_temp",
2972 S_IWUSR
| S_IRUGO
, show_auto_temp
, store_auto_temp
, 0, 6);
2975 * nct6775_pwm_is_visible uses the index into the following array
2976 * to determine if attributes should be created or not.
2977 * Any change in order or content must be matched.
2979 static struct sensor_device_template
*nct6775_attributes_pwm_template
[] = {
2980 &sensor_dev_template_pwm
,
2981 &sensor_dev_template_pwm_mode
,
2982 &sensor_dev_template_pwm_enable
,
2983 &sensor_dev_template_pwm_temp_sel
,
2984 &sensor_dev_template_pwm_temp_tolerance
,
2985 &sensor_dev_template_pwm_crit_temp_tolerance
,
2986 &sensor_dev_template_pwm_target_temp
,
2987 &sensor_dev_template_fan_target
,
2988 &sensor_dev_template_fan_tolerance
,
2989 &sensor_dev_template_pwm_stop_time
,
2990 &sensor_dev_template_pwm_step_up_time
,
2991 &sensor_dev_template_pwm_step_down_time
,
2992 &sensor_dev_template_pwm_start
,
2993 &sensor_dev_template_pwm_floor
,
2994 &sensor_dev_template_pwm_weight_temp_sel
, /* 14 */
2995 &sensor_dev_template_pwm_weight_temp_step
,
2996 &sensor_dev_template_pwm_weight_temp_step_tol
,
2997 &sensor_dev_template_pwm_weight_temp_step_base
,
2998 &sensor_dev_template_pwm_weight_duty_step
, /* 18 */
2999 &sensor_dev_template_pwm_max
, /* 19 */
3000 &sensor_dev_template_pwm_step
, /* 20 */
3001 &sensor_dev_template_pwm_weight_duty_base
, /* 21 */
3002 &sensor_dev_template_pwm_auto_point1_pwm
, /* 22 */
3003 &sensor_dev_template_pwm_auto_point1_temp
,
3004 &sensor_dev_template_pwm_auto_point2_pwm
,
3005 &sensor_dev_template_pwm_auto_point2_temp
,
3006 &sensor_dev_template_pwm_auto_point3_pwm
,
3007 &sensor_dev_template_pwm_auto_point3_temp
,
3008 &sensor_dev_template_pwm_auto_point4_pwm
,
3009 &sensor_dev_template_pwm_auto_point4_temp
,
3010 &sensor_dev_template_pwm_auto_point5_pwm
,
3011 &sensor_dev_template_pwm_auto_point5_temp
,
3012 &sensor_dev_template_pwm_auto_point6_pwm
,
3013 &sensor_dev_template_pwm_auto_point6_temp
,
3014 &sensor_dev_template_pwm_auto_point7_pwm
,
3015 &sensor_dev_template_pwm_auto_point7_temp
, /* 35 */
3020 static struct sensor_template_group nct6775_pwm_template_group
= {
3021 .templates
= nct6775_attributes_pwm_template
,
3022 .is_visible
= nct6775_pwm_is_visible
,
3027 show_vid(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
3029 struct nct6775_data
*data
= dev_get_drvdata(dev
);
3031 return sprintf(buf
, "%d\n", vid_from_reg(data
->vid
, data
->vrm
));
3034 static DEVICE_ATTR(cpu0_vid
, S_IRUGO
, show_vid
, NULL
);
3036 /* Case open detection */
3039 clear_caseopen(struct device
*dev
, struct device_attribute
*attr
,
3040 const char *buf
, size_t count
)
3042 struct nct6775_data
*data
= dev_get_drvdata(dev
);
3043 int nr
= to_sensor_dev_attr(attr
)->index
- INTRUSION_ALARM_BASE
;
3048 if (kstrtoul(buf
, 10, &val
) || val
!= 0)
3051 mutex_lock(&data
->update_lock
);
3054 * Use CR registers to clear caseopen status.
3055 * The CR registers are the same for all chips, and not all chips
3056 * support clearing the caseopen status through "regular" registers.
3058 ret
= superio_enter(data
->sioreg
);
3064 superio_select(data
->sioreg
, NCT6775_LD_ACPI
);
3065 reg
= superio_inb(data
->sioreg
, NCT6775_REG_CR_CASEOPEN_CLR
[nr
]);
3066 reg
|= NCT6775_CR_CASEOPEN_CLR_MASK
[nr
];
3067 superio_outb(data
->sioreg
, NCT6775_REG_CR_CASEOPEN_CLR
[nr
], reg
);
3068 reg
&= ~NCT6775_CR_CASEOPEN_CLR_MASK
[nr
];
3069 superio_outb(data
->sioreg
, NCT6775_REG_CR_CASEOPEN_CLR
[nr
], reg
);
3070 superio_exit(data
->sioreg
);
3072 data
->valid
= false; /* Force cache refresh */
3074 mutex_unlock(&data
->update_lock
);
3078 static SENSOR_DEVICE_ATTR(intrusion0_alarm
, S_IWUSR
| S_IRUGO
, show_alarm
,
3079 clear_caseopen
, INTRUSION_ALARM_BASE
);
3080 static SENSOR_DEVICE_ATTR(intrusion1_alarm
, S_IWUSR
| S_IRUGO
, show_alarm
,
3081 clear_caseopen
, INTRUSION_ALARM_BASE
+ 1);
3082 static SENSOR_DEVICE_ATTR(intrusion0_beep
, S_IWUSR
| S_IRUGO
, show_beep
,
3083 store_beep
, INTRUSION_ALARM_BASE
);
3084 static SENSOR_DEVICE_ATTR(intrusion1_beep
, S_IWUSR
| S_IRUGO
, show_beep
,
3085 store_beep
, INTRUSION_ALARM_BASE
+ 1);
3086 static SENSOR_DEVICE_ATTR(beep_enable
, S_IWUSR
| S_IRUGO
, show_beep
,
3087 store_beep
, BEEP_ENABLE_BASE
);
3089 static umode_t
nct6775_other_is_visible(struct kobject
*kobj
,
3090 struct attribute
*attr
, int index
)
3092 struct device
*dev
= container_of(kobj
, struct device
, kobj
);
3093 struct nct6775_data
*data
= dev_get_drvdata(dev
);
3095 if (index
== 0 && !data
->have_vid
)
3098 if (index
== 1 || index
== 2) {
3099 if (data
->ALARM_BITS
[INTRUSION_ALARM_BASE
+ index
- 1] < 0)
3103 if (index
== 3 || index
== 4) {
3104 if (data
->BEEP_BITS
[INTRUSION_ALARM_BASE
+ index
- 3] < 0)
3112 * nct6775_other_is_visible uses the index into the following array
3113 * to determine if attributes should be created or not.
3114 * Any change in order or content must be matched.
3116 static struct attribute
*nct6775_attributes_other
[] = {
3117 &dev_attr_cpu0_vid
.attr
, /* 0 */
3118 &sensor_dev_attr_intrusion0_alarm
.dev_attr
.attr
, /* 1 */
3119 &sensor_dev_attr_intrusion1_alarm
.dev_attr
.attr
, /* 2 */
3120 &sensor_dev_attr_intrusion0_beep
.dev_attr
.attr
, /* 3 */
3121 &sensor_dev_attr_intrusion1_beep
.dev_attr
.attr
, /* 4 */
3122 &sensor_dev_attr_beep_enable
.dev_attr
.attr
, /* 5 */
3127 static const struct attribute_group nct6775_group_other
= {
3128 .attrs
= nct6775_attributes_other
,
3129 .is_visible
= nct6775_other_is_visible
,
3132 static inline void nct6775_init_device(struct nct6775_data
*data
)
3137 /* Start monitoring if needed */
3138 if (data
->REG_CONFIG
) {
3139 tmp
= nct6775_read_value(data
, data
->REG_CONFIG
);
3141 nct6775_write_value(data
, data
->REG_CONFIG
, tmp
| 0x01);
3144 /* Enable temperature sensors if needed */
3145 for (i
= 0; i
< NUM_TEMP
; i
++) {
3146 if (!(data
->have_temp
& (1 << i
)))
3148 if (!data
->reg_temp_config
[i
])
3150 tmp
= nct6775_read_value(data
, data
->reg_temp_config
[i
]);
3152 nct6775_write_value(data
, data
->reg_temp_config
[i
],
3156 /* Enable VBAT monitoring if needed */
3157 tmp
= nct6775_read_value(data
, data
->REG_VBAT
);
3159 nct6775_write_value(data
, data
->REG_VBAT
, tmp
| 0x01);
3161 diode
= nct6775_read_value(data
, data
->REG_DIODE
);
3163 for (i
= 0; i
< data
->temp_fixed_num
; i
++) {
3164 if (!(data
->have_temp_fixed
& (1 << i
)))
3166 if ((tmp
& (data
->DIODE_MASK
<< i
))) /* diode */
3168 = 3 - ((diode
>> i
) & data
->DIODE_MASK
);
3169 else /* thermistor */
3170 data
->temp_type
[i
] = 4;
3175 nct6775_check_fan_inputs(struct nct6775_data
*data
)
3177 bool fan3pin
, fan4pin
, fan4min
, fan5pin
, fan6pin
;
3178 bool pwm3pin
, pwm4pin
, pwm5pin
, pwm6pin
;
3179 int sioreg
= data
->sioreg
;
3182 /* Store SIO_REG_ENABLE for use during resume */
3183 superio_select(sioreg
, NCT6775_LD_HWM
);
3184 data
->sio_reg_enable
= superio_inb(sioreg
, SIO_REG_ENABLE
);
3186 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3187 if (data
->kind
== nct6775
) {
3188 regval
= superio_inb(sioreg
, 0x2c);
3190 fan3pin
= regval
& (1 << 6);
3191 pwm3pin
= regval
& (1 << 7);
3193 /* On NCT6775, fan4 shares pins with the fdc interface */
3194 fan4pin
= !(superio_inb(sioreg
, 0x2A) & 0x80);
3201 } else if (data
->kind
== nct6776
) {
3202 bool gpok
= superio_inb(sioreg
, 0x27) & 0x80;
3203 const char *board_vendor
, *board_name
;
3205 board_vendor
= dmi_get_system_info(DMI_BOARD_VENDOR
);
3206 board_name
= dmi_get_system_info(DMI_BOARD_NAME
);
3208 if (board_name
&& board_vendor
&&
3209 !strcmp(board_vendor
, "ASRock")) {
3211 * Auxiliary fan monitoring is not enabled on ASRock
3212 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3213 * Observed with BIOS version 2.00.
3215 if (!strcmp(board_name
, "Z77 Pro4-M")) {
3216 if ((data
->sio_reg_enable
& 0xe0) != 0xe0) {
3217 data
->sio_reg_enable
|= 0xe0;
3218 superio_outb(sioreg
, SIO_REG_ENABLE
,
3219 data
->sio_reg_enable
);
3224 if (data
->sio_reg_enable
& 0x80)
3227 fan3pin
= !(superio_inb(sioreg
, 0x24) & 0x40);
3229 if (data
->sio_reg_enable
& 0x40)
3232 fan4pin
= superio_inb(sioreg
, 0x1C) & 0x01;
3234 if (data
->sio_reg_enable
& 0x20)
3237 fan5pin
= superio_inb(sioreg
, 0x1C) & 0x02;
3245 } else if (data
->kind
== nct6106
) {
3246 regval
= superio_inb(sioreg
, 0x24);
3247 fan3pin
= !(regval
& 0x80);
3248 pwm3pin
= regval
& 0x08;
3257 } else { /* NCT6779D, NCT6791D, or NCT6792D */
3258 regval
= superio_inb(sioreg
, 0x1c);
3260 fan3pin
= !(regval
& (1 << 5));
3261 fan4pin
= !(regval
& (1 << 6));
3262 fan5pin
= !(regval
& (1 << 7));
3264 pwm3pin
= !(regval
& (1 << 0));
3265 pwm4pin
= !(regval
& (1 << 1));
3266 pwm5pin
= !(regval
& (1 << 2));
3270 if (data
->kind
== nct6791
|| data
->kind
== nct6792
) {
3271 regval
= superio_inb(sioreg
, 0x2d);
3272 fan6pin
= (regval
& (1 << 1));
3273 pwm6pin
= (regval
& (1 << 0));
3274 } else { /* NCT6779D */
3280 /* fan 1 and 2 (0x03) are always present */
3281 data
->has_fan
= 0x03 | (fan3pin
<< 2) | (fan4pin
<< 3) |
3282 (fan5pin
<< 4) | (fan6pin
<< 5);
3283 data
->has_fan_min
= 0x03 | (fan3pin
<< 2) | (fan4min
<< 3) |
3285 data
->has_pwm
= 0x03 | (pwm3pin
<< 2) | (pwm4pin
<< 3) |
3286 (pwm5pin
<< 4) | (pwm6pin
<< 5);
3289 static void add_temp_sensors(struct nct6775_data
*data
, const u16
*regp
,
3290 int *available
, int *mask
)
3295 for (i
= 0; i
< data
->pwm_num
&& *available
; i
++) {
3300 src
= nct6775_read_value(data
, regp
[i
]);
3302 if (!src
|| (*mask
& (1 << src
)))
3304 if (src
>= data
->temp_label_num
||
3305 !strlen(data
->temp_label
[src
]))
3308 index
= __ffs(*available
);
3309 nct6775_write_value(data
, data
->REG_TEMP_SOURCE
[index
], src
);
3310 *available
&= ~(1 << index
);
3315 static int nct6775_probe(struct platform_device
*pdev
)
3317 struct device
*dev
= &pdev
->dev
;
3318 struct nct6775_sio_data
*sio_data
= dev_get_platdata(dev
);
3319 struct nct6775_data
*data
;
3320 struct resource
*res
;
3322 int src
, mask
, available
;
3323 const u16
*reg_temp
, *reg_temp_over
, *reg_temp_hyst
, *reg_temp_config
;
3324 const u16
*reg_temp_mon
, *reg_temp_alternate
, *reg_temp_crit
;
3325 const u16
*reg_temp_crit_l
= NULL
, *reg_temp_crit_h
= NULL
;
3326 int num_reg_temp
, num_reg_temp_mon
;
3328 struct attribute_group
*group
;
3329 struct device
*hwmon_dev
;
3330 int num_attr_groups
= 0;
3332 res
= platform_get_resource(pdev
, IORESOURCE_IO
, 0);
3333 if (!devm_request_region(&pdev
->dev
, res
->start
, IOREGION_LENGTH
,
3337 data
= devm_kzalloc(&pdev
->dev
, sizeof(struct nct6775_data
),
3342 data
->kind
= sio_data
->kind
;
3343 data
->sioreg
= sio_data
->sioreg
;
3344 data
->addr
= res
->start
;
3345 mutex_init(&data
->update_lock
);
3346 data
->name
= nct6775_device_names
[data
->kind
];
3347 data
->bank
= 0xff; /* Force initial bank selection */
3348 platform_set_drvdata(pdev
, data
);
3350 switch (data
->kind
) {
3354 data
->auto_pwm_num
= 4;
3355 data
->temp_fixed_num
= 3;
3356 data
->num_temp_alarms
= 6;
3357 data
->num_temp_beeps
= 6;
3359 data
->fan_from_reg
= fan_from_reg13
;
3360 data
->fan_from_reg_min
= fan_from_reg13
;
3362 data
->temp_label
= nct6776_temp_label
;
3363 data
->temp_label_num
= ARRAY_SIZE(nct6776_temp_label
);
3365 data
->REG_VBAT
= NCT6106_REG_VBAT
;
3366 data
->REG_DIODE
= NCT6106_REG_DIODE
;
3367 data
->DIODE_MASK
= NCT6106_DIODE_MASK
;
3368 data
->REG_VIN
= NCT6106_REG_IN
;
3369 data
->REG_IN_MINMAX
[0] = NCT6106_REG_IN_MIN
;
3370 data
->REG_IN_MINMAX
[1] = NCT6106_REG_IN_MAX
;
3371 data
->REG_TARGET
= NCT6106_REG_TARGET
;
3372 data
->REG_FAN
= NCT6106_REG_FAN
;
3373 data
->REG_FAN_MODE
= NCT6106_REG_FAN_MODE
;
3374 data
->REG_FAN_MIN
= NCT6106_REG_FAN_MIN
;
3375 data
->REG_FAN_PULSES
= NCT6106_REG_FAN_PULSES
;
3376 data
->FAN_PULSE_SHIFT
= NCT6106_FAN_PULSE_SHIFT
;
3377 data
->REG_FAN_TIME
[0] = NCT6106_REG_FAN_STOP_TIME
;
3378 data
->REG_FAN_TIME
[1] = NCT6106_REG_FAN_STEP_UP_TIME
;
3379 data
->REG_FAN_TIME
[2] = NCT6106_REG_FAN_STEP_DOWN_TIME
;
3380 data
->REG_PWM
[0] = NCT6106_REG_PWM
;
3381 data
->REG_PWM
[1] = NCT6106_REG_FAN_START_OUTPUT
;
3382 data
->REG_PWM
[2] = NCT6106_REG_FAN_STOP_OUTPUT
;
3383 data
->REG_PWM
[5] = NCT6106_REG_WEIGHT_DUTY_STEP
;
3384 data
->REG_PWM
[6] = NCT6106_REG_WEIGHT_DUTY_BASE
;
3385 data
->REG_PWM_READ
= NCT6106_REG_PWM_READ
;
3386 data
->REG_PWM_MODE
= NCT6106_REG_PWM_MODE
;
3387 data
->PWM_MODE_MASK
= NCT6106_PWM_MODE_MASK
;
3388 data
->REG_AUTO_TEMP
= NCT6106_REG_AUTO_TEMP
;
3389 data
->REG_AUTO_PWM
= NCT6106_REG_AUTO_PWM
;
3390 data
->REG_CRITICAL_TEMP
= NCT6106_REG_CRITICAL_TEMP
;
3391 data
->REG_CRITICAL_TEMP_TOLERANCE
3392 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE
;
3393 data
->REG_CRITICAL_PWM_ENABLE
= NCT6106_REG_CRITICAL_PWM_ENABLE
;
3394 data
->CRITICAL_PWM_ENABLE_MASK
3395 = NCT6106_CRITICAL_PWM_ENABLE_MASK
;
3396 data
->REG_CRITICAL_PWM
= NCT6106_REG_CRITICAL_PWM
;
3397 data
->REG_TEMP_OFFSET
= NCT6106_REG_TEMP_OFFSET
;
3398 data
->REG_TEMP_SOURCE
= NCT6106_REG_TEMP_SOURCE
;
3399 data
->REG_TEMP_SEL
= NCT6106_REG_TEMP_SEL
;
3400 data
->REG_WEIGHT_TEMP_SEL
= NCT6106_REG_WEIGHT_TEMP_SEL
;
3401 data
->REG_WEIGHT_TEMP
[0] = NCT6106_REG_WEIGHT_TEMP_STEP
;
3402 data
->REG_WEIGHT_TEMP
[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL
;
3403 data
->REG_WEIGHT_TEMP
[2] = NCT6106_REG_WEIGHT_TEMP_BASE
;
3404 data
->REG_ALARM
= NCT6106_REG_ALARM
;
3405 data
->ALARM_BITS
= NCT6106_ALARM_BITS
;
3406 data
->REG_BEEP
= NCT6106_REG_BEEP
;
3407 data
->BEEP_BITS
= NCT6106_BEEP_BITS
;
3409 reg_temp
= NCT6106_REG_TEMP
;
3410 reg_temp_mon
= NCT6106_REG_TEMP_MON
;
3411 num_reg_temp
= ARRAY_SIZE(NCT6106_REG_TEMP
);
3412 num_reg_temp_mon
= ARRAY_SIZE(NCT6106_REG_TEMP_MON
);
3413 reg_temp_over
= NCT6106_REG_TEMP_OVER
;
3414 reg_temp_hyst
= NCT6106_REG_TEMP_HYST
;
3415 reg_temp_config
= NCT6106_REG_TEMP_CONFIG
;
3416 reg_temp_alternate
= NCT6106_REG_TEMP_ALTERNATE
;
3417 reg_temp_crit
= NCT6106_REG_TEMP_CRIT
;
3418 reg_temp_crit_l
= NCT6106_REG_TEMP_CRIT_L
;
3419 reg_temp_crit_h
= NCT6106_REG_TEMP_CRIT_H
;
3425 data
->auto_pwm_num
= 6;
3426 data
->has_fan_div
= true;
3427 data
->temp_fixed_num
= 3;
3428 data
->num_temp_alarms
= 3;
3429 data
->num_temp_beeps
= 3;
3431 data
->ALARM_BITS
= NCT6775_ALARM_BITS
;
3432 data
->BEEP_BITS
= NCT6775_BEEP_BITS
;
3434 data
->fan_from_reg
= fan_from_reg16
;
3435 data
->fan_from_reg_min
= fan_from_reg8
;
3436 data
->target_temp_mask
= 0x7f;
3437 data
->tolerance_mask
= 0x0f;
3438 data
->speed_tolerance_limit
= 15;
3440 data
->temp_label
= nct6775_temp_label
;
3441 data
->temp_label_num
= ARRAY_SIZE(nct6775_temp_label
);
3443 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3444 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3445 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3446 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3447 data
->REG_VIN
= NCT6775_REG_IN
;
3448 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3449 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3450 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3451 data
->REG_FAN
= NCT6775_REG_FAN
;
3452 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3453 data
->REG_FAN_MIN
= NCT6775_REG_FAN_MIN
;
3454 data
->REG_FAN_PULSES
= NCT6775_REG_FAN_PULSES
;
3455 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3456 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3457 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3458 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3459 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3460 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3461 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3462 data
->REG_PWM
[3] = NCT6775_REG_FAN_MAX_OUTPUT
;
3463 data
->REG_PWM
[4] = NCT6775_REG_FAN_STEP_OUTPUT
;
3464 data
->REG_PWM
[5] = NCT6775_REG_WEIGHT_DUTY_STEP
;
3465 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3466 data
->REG_PWM_MODE
= NCT6775_REG_PWM_MODE
;
3467 data
->PWM_MODE_MASK
= NCT6775_PWM_MODE_MASK
;
3468 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3469 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3470 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3471 data
->REG_CRITICAL_TEMP_TOLERANCE
3472 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3473 data
->REG_TEMP_OFFSET
= NCT6775_REG_TEMP_OFFSET
;
3474 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3475 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3476 data
->REG_WEIGHT_TEMP_SEL
= NCT6775_REG_WEIGHT_TEMP_SEL
;
3477 data
->REG_WEIGHT_TEMP
[0] = NCT6775_REG_WEIGHT_TEMP_STEP
;
3478 data
->REG_WEIGHT_TEMP
[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL
;
3479 data
->REG_WEIGHT_TEMP
[2] = NCT6775_REG_WEIGHT_TEMP_BASE
;
3480 data
->REG_ALARM
= NCT6775_REG_ALARM
;
3481 data
->REG_BEEP
= NCT6775_REG_BEEP
;
3483 reg_temp
= NCT6775_REG_TEMP
;
3484 reg_temp_mon
= NCT6775_REG_TEMP_MON
;
3485 num_reg_temp
= ARRAY_SIZE(NCT6775_REG_TEMP
);
3486 num_reg_temp_mon
= ARRAY_SIZE(NCT6775_REG_TEMP_MON
);
3487 reg_temp_over
= NCT6775_REG_TEMP_OVER
;
3488 reg_temp_hyst
= NCT6775_REG_TEMP_HYST
;
3489 reg_temp_config
= NCT6775_REG_TEMP_CONFIG
;
3490 reg_temp_alternate
= NCT6775_REG_TEMP_ALTERNATE
;
3491 reg_temp_crit
= NCT6775_REG_TEMP_CRIT
;
3497 data
->auto_pwm_num
= 4;
3498 data
->has_fan_div
= false;
3499 data
->temp_fixed_num
= 3;
3500 data
->num_temp_alarms
= 3;
3501 data
->num_temp_beeps
= 6;
3503 data
->ALARM_BITS
= NCT6776_ALARM_BITS
;
3504 data
->BEEP_BITS
= NCT6776_BEEP_BITS
;
3506 data
->fan_from_reg
= fan_from_reg13
;
3507 data
->fan_from_reg_min
= fan_from_reg13
;
3508 data
->target_temp_mask
= 0xff;
3509 data
->tolerance_mask
= 0x07;
3510 data
->speed_tolerance_limit
= 63;
3512 data
->temp_label
= nct6776_temp_label
;
3513 data
->temp_label_num
= ARRAY_SIZE(nct6776_temp_label
);
3515 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3516 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3517 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3518 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3519 data
->REG_VIN
= NCT6775_REG_IN
;
3520 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3521 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3522 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3523 data
->REG_FAN
= NCT6775_REG_FAN
;
3524 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3525 data
->REG_FAN_MIN
= NCT6776_REG_FAN_MIN
;
3526 data
->REG_FAN_PULSES
= NCT6776_REG_FAN_PULSES
;
3527 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3528 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3529 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3530 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3531 data
->REG_TOLERANCE_H
= NCT6776_REG_TOLERANCE_H
;
3532 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3533 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3534 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3535 data
->REG_PWM
[5] = NCT6775_REG_WEIGHT_DUTY_STEP
;
3536 data
->REG_PWM
[6] = NCT6776_REG_WEIGHT_DUTY_BASE
;
3537 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3538 data
->REG_PWM_MODE
= NCT6776_REG_PWM_MODE
;
3539 data
->PWM_MODE_MASK
= NCT6776_PWM_MODE_MASK
;
3540 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3541 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3542 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3543 data
->REG_CRITICAL_TEMP_TOLERANCE
3544 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3545 data
->REG_TEMP_OFFSET
= NCT6775_REG_TEMP_OFFSET
;
3546 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3547 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3548 data
->REG_WEIGHT_TEMP_SEL
= NCT6775_REG_WEIGHT_TEMP_SEL
;
3549 data
->REG_WEIGHT_TEMP
[0] = NCT6775_REG_WEIGHT_TEMP_STEP
;
3550 data
->REG_WEIGHT_TEMP
[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL
;
3551 data
->REG_WEIGHT_TEMP
[2] = NCT6775_REG_WEIGHT_TEMP_BASE
;
3552 data
->REG_ALARM
= NCT6775_REG_ALARM
;
3553 data
->REG_BEEP
= NCT6776_REG_BEEP
;
3555 reg_temp
= NCT6775_REG_TEMP
;
3556 reg_temp_mon
= NCT6775_REG_TEMP_MON
;
3557 num_reg_temp
= ARRAY_SIZE(NCT6775_REG_TEMP
);
3558 num_reg_temp_mon
= ARRAY_SIZE(NCT6775_REG_TEMP_MON
);
3559 reg_temp_over
= NCT6775_REG_TEMP_OVER
;
3560 reg_temp_hyst
= NCT6775_REG_TEMP_HYST
;
3561 reg_temp_config
= NCT6776_REG_TEMP_CONFIG
;
3562 reg_temp_alternate
= NCT6776_REG_TEMP_ALTERNATE
;
3563 reg_temp_crit
= NCT6776_REG_TEMP_CRIT
;
3569 data
->auto_pwm_num
= 4;
3570 data
->has_fan_div
= false;
3571 data
->temp_fixed_num
= 6;
3572 data
->num_temp_alarms
= 2;
3573 data
->num_temp_beeps
= 2;
3575 data
->ALARM_BITS
= NCT6779_ALARM_BITS
;
3576 data
->BEEP_BITS
= NCT6779_BEEP_BITS
;
3578 data
->fan_from_reg
= fan_from_reg13
;
3579 data
->fan_from_reg_min
= fan_from_reg13
;
3580 data
->target_temp_mask
= 0xff;
3581 data
->tolerance_mask
= 0x07;
3582 data
->speed_tolerance_limit
= 63;
3584 data
->temp_label
= nct6779_temp_label
;
3585 data
->temp_label_num
= ARRAY_SIZE(nct6779_temp_label
);
3587 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3588 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3589 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3590 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3591 data
->REG_VIN
= NCT6779_REG_IN
;
3592 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3593 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3594 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3595 data
->REG_FAN
= NCT6779_REG_FAN
;
3596 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3597 data
->REG_FAN_MIN
= NCT6776_REG_FAN_MIN
;
3598 data
->REG_FAN_PULSES
= NCT6779_REG_FAN_PULSES
;
3599 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3600 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3601 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3602 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3603 data
->REG_TOLERANCE_H
= NCT6776_REG_TOLERANCE_H
;
3604 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3605 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3606 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3607 data
->REG_PWM
[5] = NCT6775_REG_WEIGHT_DUTY_STEP
;
3608 data
->REG_PWM
[6] = NCT6776_REG_WEIGHT_DUTY_BASE
;
3609 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3610 data
->REG_PWM_MODE
= NCT6776_REG_PWM_MODE
;
3611 data
->PWM_MODE_MASK
= NCT6776_PWM_MODE_MASK
;
3612 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3613 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3614 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3615 data
->REG_CRITICAL_TEMP_TOLERANCE
3616 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3617 data
->REG_CRITICAL_PWM_ENABLE
= NCT6779_REG_CRITICAL_PWM_ENABLE
;
3618 data
->CRITICAL_PWM_ENABLE_MASK
3619 = NCT6779_CRITICAL_PWM_ENABLE_MASK
;
3620 data
->REG_CRITICAL_PWM
= NCT6779_REG_CRITICAL_PWM
;
3621 data
->REG_TEMP_OFFSET
= NCT6779_REG_TEMP_OFFSET
;
3622 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3623 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3624 data
->REG_WEIGHT_TEMP_SEL
= NCT6775_REG_WEIGHT_TEMP_SEL
;
3625 data
->REG_WEIGHT_TEMP
[0] = NCT6775_REG_WEIGHT_TEMP_STEP
;
3626 data
->REG_WEIGHT_TEMP
[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL
;
3627 data
->REG_WEIGHT_TEMP
[2] = NCT6775_REG_WEIGHT_TEMP_BASE
;
3628 data
->REG_ALARM
= NCT6779_REG_ALARM
;
3629 data
->REG_BEEP
= NCT6776_REG_BEEP
;
3631 reg_temp
= NCT6779_REG_TEMP
;
3632 reg_temp_mon
= NCT6779_REG_TEMP_MON
;
3633 num_reg_temp
= ARRAY_SIZE(NCT6779_REG_TEMP
);
3634 num_reg_temp_mon
= ARRAY_SIZE(NCT6779_REG_TEMP_MON
);
3635 reg_temp_over
= NCT6779_REG_TEMP_OVER
;
3636 reg_temp_hyst
= NCT6779_REG_TEMP_HYST
;
3637 reg_temp_config
= NCT6779_REG_TEMP_CONFIG
;
3638 reg_temp_alternate
= NCT6779_REG_TEMP_ALTERNATE
;
3639 reg_temp_crit
= NCT6779_REG_TEMP_CRIT
;
3646 data
->auto_pwm_num
= 4;
3647 data
->has_fan_div
= false;
3648 data
->temp_fixed_num
= 6;
3649 data
->num_temp_alarms
= 2;
3650 data
->num_temp_beeps
= 2;
3652 data
->ALARM_BITS
= NCT6791_ALARM_BITS
;
3653 data
->BEEP_BITS
= NCT6779_BEEP_BITS
;
3655 data
->fan_from_reg
= fan_from_reg13
;
3656 data
->fan_from_reg_min
= fan_from_reg13
;
3657 data
->target_temp_mask
= 0xff;
3658 data
->tolerance_mask
= 0x07;
3659 data
->speed_tolerance_limit
= 63;
3661 data
->temp_label
= nct6779_temp_label
;
3662 data
->temp_label_num
= ARRAY_SIZE(nct6779_temp_label
);
3664 data
->REG_CONFIG
= NCT6775_REG_CONFIG
;
3665 data
->REG_VBAT
= NCT6775_REG_VBAT
;
3666 data
->REG_DIODE
= NCT6775_REG_DIODE
;
3667 data
->DIODE_MASK
= NCT6775_DIODE_MASK
;
3668 data
->REG_VIN
= NCT6779_REG_IN
;
3669 data
->REG_IN_MINMAX
[0] = NCT6775_REG_IN_MIN
;
3670 data
->REG_IN_MINMAX
[1] = NCT6775_REG_IN_MAX
;
3671 data
->REG_TARGET
= NCT6775_REG_TARGET
;
3672 data
->REG_FAN
= NCT6779_REG_FAN
;
3673 data
->REG_FAN_MODE
= NCT6775_REG_FAN_MODE
;
3674 data
->REG_FAN_MIN
= NCT6776_REG_FAN_MIN
;
3675 data
->REG_FAN_PULSES
= NCT6779_REG_FAN_PULSES
;
3676 data
->FAN_PULSE_SHIFT
= NCT6775_FAN_PULSE_SHIFT
;
3677 data
->REG_FAN_TIME
[0] = NCT6775_REG_FAN_STOP_TIME
;
3678 data
->REG_FAN_TIME
[1] = NCT6775_REG_FAN_STEP_UP_TIME
;
3679 data
->REG_FAN_TIME
[2] = NCT6775_REG_FAN_STEP_DOWN_TIME
;
3680 data
->REG_TOLERANCE_H
= NCT6776_REG_TOLERANCE_H
;
3681 data
->REG_PWM
[0] = NCT6775_REG_PWM
;
3682 data
->REG_PWM
[1] = NCT6775_REG_FAN_START_OUTPUT
;
3683 data
->REG_PWM
[2] = NCT6775_REG_FAN_STOP_OUTPUT
;
3684 data
->REG_PWM
[5] = NCT6791_REG_WEIGHT_DUTY_STEP
;
3685 data
->REG_PWM
[6] = NCT6791_REG_WEIGHT_DUTY_BASE
;
3686 data
->REG_PWM_READ
= NCT6775_REG_PWM_READ
;
3687 data
->REG_PWM_MODE
= NCT6776_REG_PWM_MODE
;
3688 data
->PWM_MODE_MASK
= NCT6776_PWM_MODE_MASK
;
3689 data
->REG_AUTO_TEMP
= NCT6775_REG_AUTO_TEMP
;
3690 data
->REG_AUTO_PWM
= NCT6775_REG_AUTO_PWM
;
3691 data
->REG_CRITICAL_TEMP
= NCT6775_REG_CRITICAL_TEMP
;
3692 data
->REG_CRITICAL_TEMP_TOLERANCE
3693 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE
;
3694 data
->REG_CRITICAL_PWM_ENABLE
= NCT6779_REG_CRITICAL_PWM_ENABLE
;
3695 data
->CRITICAL_PWM_ENABLE_MASK
3696 = NCT6779_CRITICAL_PWM_ENABLE_MASK
;
3697 data
->REG_CRITICAL_PWM
= NCT6779_REG_CRITICAL_PWM
;
3698 data
->REG_TEMP_OFFSET
= NCT6779_REG_TEMP_OFFSET
;
3699 data
->REG_TEMP_SOURCE
= NCT6775_REG_TEMP_SOURCE
;
3700 data
->REG_TEMP_SEL
= NCT6775_REG_TEMP_SEL
;
3701 data
->REG_WEIGHT_TEMP_SEL
= NCT6791_REG_WEIGHT_TEMP_SEL
;
3702 data
->REG_WEIGHT_TEMP
[0] = NCT6791_REG_WEIGHT_TEMP_STEP
;
3703 data
->REG_WEIGHT_TEMP
[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL
;
3704 data
->REG_WEIGHT_TEMP
[2] = NCT6791_REG_WEIGHT_TEMP_BASE
;
3705 data
->REG_ALARM
= NCT6791_REG_ALARM
;
3706 if (data
->kind
== nct6791
)
3707 data
->REG_BEEP
= NCT6776_REG_BEEP
;
3709 data
->REG_BEEP
= NCT6792_REG_BEEP
;
3711 reg_temp
= NCT6779_REG_TEMP
;
3712 num_reg_temp
= ARRAY_SIZE(NCT6779_REG_TEMP
);
3713 if (data
->kind
== nct6791
) {
3714 reg_temp_mon
= NCT6779_REG_TEMP_MON
;
3715 num_reg_temp_mon
= ARRAY_SIZE(NCT6779_REG_TEMP_MON
);
3717 reg_temp_mon
= NCT6792_REG_TEMP_MON
;
3718 num_reg_temp_mon
= ARRAY_SIZE(NCT6792_REG_TEMP_MON
);
3720 reg_temp_over
= NCT6779_REG_TEMP_OVER
;
3721 reg_temp_hyst
= NCT6779_REG_TEMP_HYST
;
3722 reg_temp_config
= NCT6779_REG_TEMP_CONFIG
;
3723 reg_temp_alternate
= NCT6779_REG_TEMP_ALTERNATE
;
3724 reg_temp_crit
= NCT6779_REG_TEMP_CRIT
;
3730 data
->have_in
= (1 << data
->in_num
) - 1;
3731 data
->have_temp
= 0;
3734 * On some boards, not all available temperature sources are monitored,
3735 * even though some of the monitoring registers are unused.
3736 * Get list of unused monitoring registers, then detect if any fan
3737 * controls are configured to use unmonitored temperature sources.
3738 * If so, assign the unmonitored temperature sources to available
3739 * monitoring registers.
3743 for (i
= 0; i
< num_reg_temp
; i
++) {
3744 if (reg_temp
[i
] == 0)
3747 src
= nct6775_read_value(data
, data
->REG_TEMP_SOURCE
[i
]) & 0x1f;
3748 if (!src
|| (mask
& (1 << src
)))
3749 available
|= 1 << i
;
3755 * Now find unmonitored temperature registers and enable monitoring
3756 * if additional monitoring registers are available.
3758 add_temp_sensors(data
, data
->REG_TEMP_SEL
, &available
, &mask
);
3759 add_temp_sensors(data
, data
->REG_WEIGHT_TEMP_SEL
, &available
, &mask
);
3762 s
= NUM_TEMP_FIXED
; /* First dynamic temperature attribute */
3763 for (i
= 0; i
< num_reg_temp
; i
++) {
3764 if (reg_temp
[i
] == 0)
3767 src
= nct6775_read_value(data
, data
->REG_TEMP_SOURCE
[i
]) & 0x1f;
3768 if (!src
|| (mask
& (1 << src
)))
3771 if (src
>= data
->temp_label_num
||
3772 !strlen(data
->temp_label
[src
])) {
3774 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3775 src
, i
, data
->REG_TEMP_SOURCE
[i
], reg_temp
[i
]);
3781 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3782 if (src
<= data
->temp_fixed_num
) {
3783 data
->have_temp
|= 1 << (src
- 1);
3784 data
->have_temp_fixed
|= 1 << (src
- 1);
3785 data
->reg_temp
[0][src
- 1] = reg_temp
[i
];
3786 data
->reg_temp
[1][src
- 1] = reg_temp_over
[i
];
3787 data
->reg_temp
[2][src
- 1] = reg_temp_hyst
[i
];
3788 if (reg_temp_crit_h
&& reg_temp_crit_h
[i
])
3789 data
->reg_temp
[3][src
- 1] = reg_temp_crit_h
[i
];
3790 else if (reg_temp_crit
[src
- 1])
3791 data
->reg_temp
[3][src
- 1]
3792 = reg_temp_crit
[src
- 1];
3793 if (reg_temp_crit_l
&& reg_temp_crit_l
[i
])
3794 data
->reg_temp
[4][src
- 1] = reg_temp_crit_l
[i
];
3795 data
->reg_temp_config
[src
- 1] = reg_temp_config
[i
];
3796 data
->temp_src
[src
- 1] = src
;
3803 /* Use dynamic index for other sources */
3804 data
->have_temp
|= 1 << s
;
3805 data
->reg_temp
[0][s
] = reg_temp
[i
];
3806 data
->reg_temp
[1][s
] = reg_temp_over
[i
];
3807 data
->reg_temp
[2][s
] = reg_temp_hyst
[i
];
3808 data
->reg_temp_config
[s
] = reg_temp_config
[i
];
3809 if (reg_temp_crit_h
&& reg_temp_crit_h
[i
])
3810 data
->reg_temp
[3][s
] = reg_temp_crit_h
[i
];
3811 else if (reg_temp_crit
[src
- 1])
3812 data
->reg_temp
[3][s
] = reg_temp_crit
[src
- 1];
3813 if (reg_temp_crit_l
&& reg_temp_crit_l
[i
])
3814 data
->reg_temp
[4][s
] = reg_temp_crit_l
[i
];
3816 data
->temp_src
[s
] = src
;
3821 * Repeat with temperatures used for fan control.
3822 * This set of registers does not support limits.
3824 for (i
= 0; i
< num_reg_temp_mon
; i
++) {
3825 if (reg_temp_mon
[i
] == 0)
3828 src
= nct6775_read_value(data
, data
->REG_TEMP_SEL
[i
]) & 0x1f;
3829 if (!src
|| (mask
& (1 << src
)))
3832 if (src
>= data
->temp_label_num
||
3833 !strlen(data
->temp_label
[src
])) {
3835 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3836 src
, i
, data
->REG_TEMP_SEL
[i
],
3843 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3844 if (src
<= data
->temp_fixed_num
) {
3845 if (data
->have_temp
& (1 << (src
- 1)))
3847 data
->have_temp
|= 1 << (src
- 1);
3848 data
->have_temp_fixed
|= 1 << (src
- 1);
3849 data
->reg_temp
[0][src
- 1] = reg_temp_mon
[i
];
3850 data
->temp_src
[src
- 1] = src
;
3857 /* Use dynamic index for other sources */
3858 data
->have_temp
|= 1 << s
;
3859 data
->reg_temp
[0][s
] = reg_temp_mon
[i
];
3860 data
->temp_src
[s
] = src
;
3864 #ifdef USE_ALTERNATE
3866 * Go through the list of alternate temp registers and enable
3868 * The temperature is already monitored if the respective bit in <mask>
3871 for (i
= 0; i
< data
->temp_label_num
- 1; i
++) {
3872 if (!reg_temp_alternate
[i
])
3874 if (mask
& (1 << (i
+ 1)))
3876 if (i
< data
->temp_fixed_num
) {
3877 if (data
->have_temp
& (1 << i
))
3879 data
->have_temp
|= 1 << i
;
3880 data
->have_temp_fixed
|= 1 << i
;
3881 data
->reg_temp
[0][i
] = reg_temp_alternate
[i
];
3882 if (i
< num_reg_temp
) {
3883 data
->reg_temp
[1][i
] = reg_temp_over
[i
];
3884 data
->reg_temp
[2][i
] = reg_temp_hyst
[i
];
3886 data
->temp_src
[i
] = i
+ 1;
3890 if (s
>= NUM_TEMP
) /* Abort if no more space */
3893 data
->have_temp
|= 1 << s
;
3894 data
->reg_temp
[0][s
] = reg_temp_alternate
[i
];
3895 data
->temp_src
[s
] = i
+ 1;
3898 #endif /* USE_ALTERNATE */
3900 /* Initialize the chip */
3901 nct6775_init_device(data
);
3903 err
= superio_enter(sio_data
->sioreg
);
3907 cr2a
= superio_inb(sio_data
->sioreg
, 0x2a);
3908 switch (data
->kind
) {
3910 data
->have_vid
= (cr2a
& 0x40);
3913 data
->have_vid
= (cr2a
& 0x60) == 0x40;
3924 * We can get the VID input values directly at logical device D 0xe3.
3926 if (data
->have_vid
) {
3927 superio_select(sio_data
->sioreg
, NCT6775_LD_VID
);
3928 data
->vid
= superio_inb(sio_data
->sioreg
, 0xe3);
3929 data
->vrm
= vid_which_vrm();
3935 superio_select(sio_data
->sioreg
, NCT6775_LD_HWM
);
3936 tmp
= superio_inb(sio_data
->sioreg
,
3937 NCT6775_REG_CR_FAN_DEBOUNCE
);
3938 switch (data
->kind
) {
3954 superio_outb(sio_data
->sioreg
, NCT6775_REG_CR_FAN_DEBOUNCE
,
3956 dev_info(&pdev
->dev
, "Enabled fan debounce for chip %s\n",
3960 nct6775_check_fan_inputs(data
);
3962 superio_exit(sio_data
->sioreg
);
3964 /* Read fan clock dividers immediately */
3965 nct6775_init_fan_common(dev
, data
);
3967 /* Register sysfs hooks */
3968 group
= nct6775_create_attr_group(dev
, &nct6775_pwm_template_group
,
3971 return PTR_ERR(group
);
3973 data
->groups
[num_attr_groups
++] = group
;
3975 group
= nct6775_create_attr_group(dev
, &nct6775_in_template_group
,
3976 fls(data
->have_in
));
3978 return PTR_ERR(group
);
3980 data
->groups
[num_attr_groups
++] = group
;
3982 group
= nct6775_create_attr_group(dev
, &nct6775_fan_template_group
,
3983 fls(data
->has_fan
));
3985 return PTR_ERR(group
);
3987 data
->groups
[num_attr_groups
++] = group
;
3989 group
= nct6775_create_attr_group(dev
, &nct6775_temp_template_group
,
3990 fls(data
->have_temp
));
3992 return PTR_ERR(group
);
3994 data
->groups
[num_attr_groups
++] = group
;
3995 data
->groups
[num_attr_groups
++] = &nct6775_group_other
;
3997 hwmon_dev
= devm_hwmon_device_register_with_groups(dev
, data
->name
,
3998 data
, data
->groups
);
3999 return PTR_ERR_OR_ZERO(hwmon_dev
);
4002 static void nct6791_enable_io_mapping(int sioaddr
)
4006 val
= superio_inb(sioaddr
, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE
);
4008 pr_info("Enabling hardware monitor logical device mappings.\n");
4009 superio_outb(sioaddr
, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE
,
4014 static int __maybe_unused
nct6775_suspend(struct device
*dev
)
4016 struct nct6775_data
*data
= nct6775_update_device(dev
);
4018 mutex_lock(&data
->update_lock
);
4019 data
->vbat
= nct6775_read_value(data
, data
->REG_VBAT
);
4020 if (data
->kind
== nct6775
) {
4021 data
->fandiv1
= nct6775_read_value(data
, NCT6775_REG_FANDIV1
);
4022 data
->fandiv2
= nct6775_read_value(data
, NCT6775_REG_FANDIV2
);
4024 mutex_unlock(&data
->update_lock
);
4029 static int __maybe_unused
nct6775_resume(struct device
*dev
)
4031 struct nct6775_data
*data
= dev_get_drvdata(dev
);
4032 int sioreg
= data
->sioreg
;
4036 mutex_lock(&data
->update_lock
);
4037 data
->bank
= 0xff; /* Force initial bank selection */
4039 err
= superio_enter(sioreg
);
4043 superio_select(sioreg
, NCT6775_LD_HWM
);
4044 reg
= superio_inb(sioreg
, SIO_REG_ENABLE
);
4045 if (reg
!= data
->sio_reg_enable
)
4046 superio_outb(sioreg
, SIO_REG_ENABLE
, data
->sio_reg_enable
);
4048 if (data
->kind
== nct6791
|| data
->kind
== nct6792
)
4049 nct6791_enable_io_mapping(sioreg
);
4051 superio_exit(sioreg
);
4053 /* Restore limits */
4054 for (i
= 0; i
< data
->in_num
; i
++) {
4055 if (!(data
->have_in
& (1 << i
)))
4058 nct6775_write_value(data
, data
->REG_IN_MINMAX
[0][i
],
4060 nct6775_write_value(data
, data
->REG_IN_MINMAX
[1][i
],
4064 for (i
= 0; i
< ARRAY_SIZE(data
->fan_min
); i
++) {
4065 if (!(data
->has_fan_min
& (1 << i
)))
4068 nct6775_write_value(data
, data
->REG_FAN_MIN
[i
],
4072 for (i
= 0; i
< NUM_TEMP
; i
++) {
4073 if (!(data
->have_temp
& (1 << i
)))
4076 for (j
= 1; j
< ARRAY_SIZE(data
->reg_temp
); j
++)
4077 if (data
->reg_temp
[j
][i
])
4078 nct6775_write_temp(data
, data
->reg_temp
[j
][i
],
4082 /* Restore other settings */
4083 nct6775_write_value(data
, data
->REG_VBAT
, data
->vbat
);
4084 if (data
->kind
== nct6775
) {
4085 nct6775_write_value(data
, NCT6775_REG_FANDIV1
, data
->fandiv1
);
4086 nct6775_write_value(data
, NCT6775_REG_FANDIV2
, data
->fandiv2
);
4090 /* Force re-reading all values */
4091 data
->valid
= false;
4092 mutex_unlock(&data
->update_lock
);
4097 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops
, nct6775_suspend
, nct6775_resume
);
4099 static struct platform_driver nct6775_driver
= {
4102 .pm
= &nct6775_dev_pm_ops
,
4104 .probe
= nct6775_probe
,
4107 static const char * const nct6775_sio_names
[] __initconst
= {
4116 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4117 static int __init
nct6775_find(int sioaddr
, struct nct6775_sio_data
*sio_data
)
4123 err
= superio_enter(sioaddr
);
4130 val
= (superio_inb(sioaddr
, SIO_REG_DEVID
) << 8)
4131 | superio_inb(sioaddr
, SIO_REG_DEVID
+ 1);
4132 switch (val
& SIO_ID_MASK
) {
4133 case SIO_NCT6106_ID
:
4134 sio_data
->kind
= nct6106
;
4136 case SIO_NCT6775_ID
:
4137 sio_data
->kind
= nct6775
;
4139 case SIO_NCT6776_ID
:
4140 sio_data
->kind
= nct6776
;
4142 case SIO_NCT6779_ID
:
4143 sio_data
->kind
= nct6779
;
4145 case SIO_NCT6791_ID
:
4146 sio_data
->kind
= nct6791
;
4148 case SIO_NCT6792_ID
:
4149 sio_data
->kind
= nct6792
;
4153 pr_debug("unsupported chip ID: 0x%04x\n", val
);
4154 superio_exit(sioaddr
);
4158 /* We have a known chip, find the HWM I/O address */
4159 superio_select(sioaddr
, NCT6775_LD_HWM
);
4160 val
= (superio_inb(sioaddr
, SIO_REG_ADDR
) << 8)
4161 | superio_inb(sioaddr
, SIO_REG_ADDR
+ 1);
4162 addr
= val
& IOREGION_ALIGNMENT
;
4164 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4165 superio_exit(sioaddr
);
4169 /* Activate logical device if needed */
4170 val
= superio_inb(sioaddr
, SIO_REG_ENABLE
);
4171 if (!(val
& 0x01)) {
4172 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4173 superio_outb(sioaddr
, SIO_REG_ENABLE
, val
| 0x01);
4176 if (sio_data
->kind
== nct6791
|| sio_data
->kind
== nct6792
)
4177 nct6791_enable_io_mapping(sioaddr
);
4179 superio_exit(sioaddr
);
4180 pr_info("Found %s or compatible chip at %#x:%#x\n",
4181 nct6775_sio_names
[sio_data
->kind
], sioaddr
, addr
);
4182 sio_data
->sioreg
= sioaddr
;
4188 * when Super-I/O functions move to a separate file, the Super-I/O
4189 * bus will manage the lifetime of the device and this module will only keep
4190 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4191 * must keep track of the device
4193 static struct platform_device
*pdev
[2];
4195 static int __init
sensors_nct6775_init(void)
4200 struct resource res
;
4201 struct nct6775_sio_data sio_data
;
4202 int sioaddr
[2] = { 0x2e, 0x4e };
4204 err
= platform_driver_register(&nct6775_driver
);
4209 * initialize sio_data->kind and sio_data->sioreg.
4211 * when Super-I/O functions move to a separate file, the Super-I/O
4212 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4213 * nct6775 hardware monitor, and call probe()
4215 for (i
= 0; i
< ARRAY_SIZE(pdev
); i
++) {
4216 address
= nct6775_find(sioaddr
[i
], &sio_data
);
4222 pdev
[i
] = platform_device_alloc(DRVNAME
, address
);
4225 goto exit_device_unregister
;
4228 err
= platform_device_add_data(pdev
[i
], &sio_data
,
4229 sizeof(struct nct6775_sio_data
));
4231 goto exit_device_put
;
4233 memset(&res
, 0, sizeof(res
));
4235 res
.start
= address
+ IOREGION_OFFSET
;
4236 res
.end
= address
+ IOREGION_OFFSET
+ IOREGION_LENGTH
- 1;
4237 res
.flags
= IORESOURCE_IO
;
4239 err
= acpi_check_resource_conflict(&res
);
4241 platform_device_put(pdev
[i
]);
4246 err
= platform_device_add_resources(pdev
[i
], &res
, 1);
4248 goto exit_device_put
;
4250 /* platform_device_add calls probe() */
4251 err
= platform_device_add(pdev
[i
]);
4253 goto exit_device_put
;
4257 goto exit_unregister
;
4263 platform_device_put(pdev
[i
]);
4264 exit_device_unregister
:
4267 platform_device_unregister(pdev
[i
]);
4270 platform_driver_unregister(&nct6775_driver
);
4274 static void __exit
sensors_nct6775_exit(void)
4278 for (i
= 0; i
< ARRAY_SIZE(pdev
); i
++) {
4280 platform_device_unregister(pdev
[i
]);
4282 platform_driver_unregister(&nct6775_driver
);
4285 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4286 MODULE_DESCRIPTION("NCT6106D/NCT6775F/NCT6776F/NCT6779D/NCT6791D/NCT6792D driver");
4287 MODULE_LICENSE("GPL");
4289 module_init(sensors_nct6775_init
);
4290 module_exit(sensors_nct6775_exit
);