2420f1c6f4e98c4252c2f477d626085f5795ac55
[deliverable/linux.git] / drivers / hwmon / w83627ehf.c
1 /*
2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8 Daniel J Blueman <daniel.blueman@gmail.com>
9
10 Shamelessly ripped from the w83627hf driver
11 Copyright (C) 2003 Mark Studebaker
12
13 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
14 in testing and debugging this driver.
15
16 This driver also supports the W83627EHG, which is the lead-free
17 version of the W83627EHF.
18
19 This program is free software; you can redistribute it and/or modify
20 it under the terms of the GNU General Public License as published by
21 the Free Software Foundation; either version 2 of the License, or
22 (at your option) any later version.
23
24 This program is distributed in the hope that it will be useful,
25 but WITHOUT ANY WARRANTY; without even the implied warranty of
26 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 GNU General Public License for more details.
28
29 You should have received a copy of the GNU General Public License
30 along with this program; if not, write to the Free Software
31 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32
33
34 Supports the following chips:
35
36 Chip #vin #fan #pwm #temp chip IDs man ID
37 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 0x8860 0xa1
39 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
40 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
41 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
42 w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3
43 */
44
45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
46
47 #include <linux/module.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/jiffies.h>
51 #include <linux/platform_device.h>
52 #include <linux/hwmon.h>
53 #include <linux/hwmon-sysfs.h>
54 #include <linux/hwmon-vid.h>
55 #include <linux/err.h>
56 #include <linux/mutex.h>
57 #include <linux/acpi.h>
58 #include <linux/io.h>
59 #include "lm75.h"
60
61 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg, w83667hg_b };
62
63 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
64 static const char * const w83627ehf_device_names[] = {
65 "w83627ehf",
66 "w83627dhg",
67 "w83627dhg",
68 "w83667hg",
69 "w83667hg",
70 };
71
72 static unsigned short force_id;
73 module_param(force_id, ushort, 0);
74 MODULE_PARM_DESC(force_id, "Override the detected device ID");
75
76 #define DRVNAME "w83627ehf"
77
78 /*
79 * Super-I/O constants and functions
80 */
81
82 #define W83627EHF_LD_HWM 0x0b
83 #define W83667HG_LD_VID 0x0d
84
85 #define SIO_REG_LDSEL 0x07 /* Logical device select */
86 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
87 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
88 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
89 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
90 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
91 #define SIO_REG_VID_DATA 0xF1 /* VID data */
92
93 #define SIO_W83627EHF_ID 0x8850
94 #define SIO_W83627EHG_ID 0x8860
95 #define SIO_W83627DHG_ID 0xa020
96 #define SIO_W83627DHG_P_ID 0xb070
97 #define SIO_W83667HG_ID 0xa510
98 #define SIO_W83667HG_B_ID 0xb350
99 #define SIO_ID_MASK 0xFFF0
100
101 static inline void
102 superio_outb(int ioreg, int reg, int val)
103 {
104 outb(reg, ioreg);
105 outb(val, ioreg + 1);
106 }
107
108 static inline int
109 superio_inb(int ioreg, int reg)
110 {
111 outb(reg, ioreg);
112 return inb(ioreg + 1);
113 }
114
115 static inline void
116 superio_select(int ioreg, int ld)
117 {
118 outb(SIO_REG_LDSEL, ioreg);
119 outb(ld, ioreg + 1);
120 }
121
122 static inline void
123 superio_enter(int ioreg)
124 {
125 outb(0x87, ioreg);
126 outb(0x87, ioreg);
127 }
128
129 static inline void
130 superio_exit(int ioreg)
131 {
132 outb(0xaa, ioreg);
133 outb(0x02, ioreg);
134 outb(0x02, ioreg + 1);
135 }
136
137 /*
138 * ISA constants
139 */
140
141 #define IOREGION_ALIGNMENT (~7)
142 #define IOREGION_OFFSET 5
143 #define IOREGION_LENGTH 2
144 #define ADDR_REG_OFFSET 0
145 #define DATA_REG_OFFSET 1
146
147 #define W83627EHF_REG_BANK 0x4E
148 #define W83627EHF_REG_CONFIG 0x40
149
150 /* Not currently used:
151 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
152 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
153 * REG_MAN_ID is at port 0x4f
154 * REG_CHIP_ID is at port 0x58 */
155
156 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
157 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
158
159 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
160 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
161 (0x554 + (((nr) - 7) * 2)))
162 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
163 (0x555 + (((nr) - 7) * 2)))
164 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
165 (0x550 + (nr) - 7))
166
167 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
168 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
169 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
170 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
171
172 /* Fan clock dividers are spread over the following five registers */
173 #define W83627EHF_REG_FANDIV1 0x47
174 #define W83627EHF_REG_FANDIV2 0x4B
175 #define W83627EHF_REG_VBAT 0x5D
176 #define W83627EHF_REG_DIODE 0x59
177 #define W83627EHF_REG_SMI_OVT 0x4C
178
179 #define W83627EHF_REG_ALARM1 0x459
180 #define W83627EHF_REG_ALARM2 0x45A
181 #define W83627EHF_REG_ALARM3 0x45B
182
183 /* SmartFan registers */
184 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
185 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
186
187 /* DC or PWM output fan configuration */
188 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
189 0x04, /* SYS FAN0 output mode and PWM mode */
190 0x04, /* CPU FAN0 output mode and PWM mode */
191 0x12, /* AUX FAN mode */
192 0x62, /* CPU FAN1 mode */
193 };
194
195 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
196 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
197
198 /* FAN Duty Cycle, be used to control */
199 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
200 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
201 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
202
203 /* Advanced Fan control, some values are common for all fans */
204 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
205 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
206 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
207
208 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
209 = { 0xff, 0x67, 0xff, 0x69 };
210 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
211 = { 0xff, 0x68, 0xff, 0x6a };
212
213 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
214 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
215 = { 0x68, 0x6a, 0x6c };
216
217 static const char *const w83667hg_b_temp_label[] = {
218 "SYSTIN",
219 "CPUTIN",
220 "AUXTIN",
221 "AMDTSI",
222 "PECI Agent 1",
223 "PECI Agent 2",
224 "PECI Agent 3",
225 "PECI Agent 4"
226 };
227
228 #define NUM_REG_TEMP 4
229
230 static inline int is_word_sized(u16 reg)
231 {
232 return (((reg & 0xff00) == 0x100
233 || (reg & 0xff00) == 0x200)
234 && ((reg & 0x00ff) == 0x50
235 || (reg & 0x00ff) == 0x53
236 || (reg & 0x00ff) == 0x55));
237 }
238
239 /*
240 * Conversions
241 */
242
243 /* 1 is PWM mode, output in ms */
244 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
245 {
246 return mode ? 100 * reg : 400 * reg;
247 }
248
249 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
250 {
251 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
252 (msec + 200) / 400), 1, 255);
253 }
254
255 static inline unsigned int
256 fan_from_reg(u8 reg, unsigned int div)
257 {
258 if (reg == 0 || reg == 255)
259 return 0;
260 return 1350000U / (reg * div);
261 }
262
263 static inline unsigned int
264 div_from_reg(u8 reg)
265 {
266 return 1 << reg;
267 }
268
269 static inline int
270 temp_from_reg(u16 reg, s16 regval)
271 {
272 if (is_word_sized(reg))
273 return LM75_TEMP_FROM_REG(regval);
274 return regval * 1000;
275 }
276
277 static inline s16
278 temp_to_reg(u16 reg, long temp)
279 {
280 if (is_word_sized(reg))
281 return LM75_TEMP_TO_REG(temp);
282 return DIV_ROUND_CLOSEST(SENSORS_LIMIT(temp, -127000, 128000), 1000);
283 }
284
285 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
286
287 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
288
289 static inline long in_from_reg(u8 reg, u8 nr)
290 {
291 return reg * scale_in[nr];
292 }
293
294 static inline u8 in_to_reg(u32 val, u8 nr)
295 {
296 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0,
297 255);
298 }
299
300 /*
301 * Data structures and manipulation thereof
302 */
303
304 struct w83627ehf_data {
305 int addr; /* IO base of hw monitor block */
306 const char *name;
307
308 struct device *hwmon_dev;
309 struct mutex lock;
310
311 u8 temp_src[NUM_REG_TEMP];
312 const char * const *temp_label;
313
314 const u16 *REG_PWM;
315 const u16 *REG_TARGET;
316 const u16 *REG_FAN;
317 const u16 *REG_FAN_MIN;
318 const u16 *REG_FAN_START_OUTPUT;
319 const u16 *REG_FAN_STOP_OUTPUT;
320 const u16 *REG_FAN_STOP_TIME;
321 const u16 *REG_FAN_MAX_OUTPUT;
322 const u16 *REG_FAN_STEP_OUTPUT;
323
324 struct mutex update_lock;
325 char valid; /* !=0 if following fields are valid */
326 unsigned long last_updated; /* In jiffies */
327
328 /* Register values */
329 u8 bank; /* current register bank */
330 u8 in_num; /* number of in inputs we have */
331 u8 in[10]; /* Register value */
332 u8 in_max[10]; /* Register value */
333 u8 in_min[10]; /* Register value */
334 u8 fan[5];
335 u8 fan_min[5];
336 u8 fan_div[5];
337 u8 has_fan; /* some fan inputs can be disabled */
338 u8 temp_type[3];
339 s16 temp[4];
340 s16 temp_max[4];
341 s16 temp_max_hyst[4];
342 u32 alarms;
343
344 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
345 u8 pwm_enable[4]; /* 1->manual
346 2->thermal cruise mode (also called SmartFan I)
347 3->fan speed cruise mode
348 4->variable thermal cruise (also called
349 SmartFan III) */
350 u8 pwm_num; /* number of pwm */
351 u8 pwm[4];
352 u8 target_temp[4];
353 u8 tolerance[4];
354
355 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
356 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
357 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
358 u8 fan_max_output[4]; /* maximum fan speed */
359 u8 fan_step_output[4]; /* rate of change output value */
360
361 u8 vid;
362 u8 vrm;
363
364 u8 have_temp;
365 u8 in6_skip;
366 };
367
368 struct w83627ehf_sio_data {
369 int sioreg;
370 enum kinds kind;
371 };
372
373 /*
374 * On older chips, only registers 0x50-0x5f are banked.
375 * On more recent chips, all registers are banked.
376 * Assume that is the case and set the bank number for each access.
377 * Cache the bank number so it only needs to be set if it changes.
378 */
379 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
380 {
381 u8 bank = reg >> 8;
382 if (data->bank != bank) {
383 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
384 outb_p(bank, data->addr + DATA_REG_OFFSET);
385 data->bank = bank;
386 }
387 }
388
389 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
390 {
391 int res, word_sized = is_word_sized(reg);
392
393 mutex_lock(&data->lock);
394
395 w83627ehf_set_bank(data, reg);
396 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
397 res = inb_p(data->addr + DATA_REG_OFFSET);
398 if (word_sized) {
399 outb_p((reg & 0xff) + 1,
400 data->addr + ADDR_REG_OFFSET);
401 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
402 }
403
404 mutex_unlock(&data->lock);
405 return res;
406 }
407
408 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
409 u16 value)
410 {
411 int word_sized = is_word_sized(reg);
412
413 mutex_lock(&data->lock);
414
415 w83627ehf_set_bank(data, reg);
416 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
417 if (word_sized) {
418 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
419 outb_p((reg & 0xff) + 1,
420 data->addr + ADDR_REG_OFFSET);
421 }
422 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
423
424 mutex_unlock(&data->lock);
425 return 0;
426 }
427
428 /* This function assumes that the caller holds data->update_lock */
429 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
430 {
431 u8 reg;
432
433 switch (nr) {
434 case 0:
435 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
436 | ((data->fan_div[0] & 0x03) << 4);
437 /* fan5 input control bit is write only, compute the value */
438 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
439 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
440 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
441 | ((data->fan_div[0] & 0x04) << 3);
442 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
443 break;
444 case 1:
445 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
446 | ((data->fan_div[1] & 0x03) << 6);
447 /* fan5 input control bit is write only, compute the value */
448 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
449 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
450 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
451 | ((data->fan_div[1] & 0x04) << 4);
452 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
453 break;
454 case 2:
455 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
456 | ((data->fan_div[2] & 0x03) << 6);
457 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
458 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
459 | ((data->fan_div[2] & 0x04) << 5);
460 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
461 break;
462 case 3:
463 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
464 | (data->fan_div[3] & 0x03);
465 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
466 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
467 | ((data->fan_div[3] & 0x04) << 5);
468 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
469 break;
470 case 4:
471 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
472 | ((data->fan_div[4] & 0x03) << 2)
473 | ((data->fan_div[4] & 0x04) << 5);
474 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
475 break;
476 }
477 }
478
479 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
480 {
481 int i;
482
483 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
484 data->fan_div[0] = (i >> 4) & 0x03;
485 data->fan_div[1] = (i >> 6) & 0x03;
486 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
487 data->fan_div[2] = (i >> 6) & 0x03;
488 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
489 data->fan_div[0] |= (i >> 3) & 0x04;
490 data->fan_div[1] |= (i >> 4) & 0x04;
491 data->fan_div[2] |= (i >> 5) & 0x04;
492 if (data->has_fan & ((1 << 3) | (1 << 4))) {
493 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
494 data->fan_div[3] = i & 0x03;
495 data->fan_div[4] = ((i >> 2) & 0x03)
496 | ((i >> 5) & 0x04);
497 }
498 if (data->has_fan & (1 << 3)) {
499 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
500 data->fan_div[3] |= (i >> 5) & 0x04;
501 }
502 }
503
504 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
505 {
506 struct w83627ehf_data *data = dev_get_drvdata(dev);
507 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
508 int i;
509
510 mutex_lock(&data->update_lock);
511
512 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
513 || !data->valid) {
514 /* Fan clock dividers */
515 w83627ehf_update_fan_div(data);
516
517 /* Measured voltages and limits */
518 for (i = 0; i < data->in_num; i++) {
519 data->in[i] = w83627ehf_read_value(data,
520 W83627EHF_REG_IN(i));
521 data->in_min[i] = w83627ehf_read_value(data,
522 W83627EHF_REG_IN_MIN(i));
523 data->in_max[i] = w83627ehf_read_value(data,
524 W83627EHF_REG_IN_MAX(i));
525 }
526
527 /* Measured fan speeds and limits */
528 for (i = 0; i < 5; i++) {
529 if (!(data->has_fan & (1 << i)))
530 continue;
531
532 data->fan[i] = w83627ehf_read_value(data,
533 data->REG_FAN[i]);
534 data->fan_min[i] = w83627ehf_read_value(data,
535 data->REG_FAN_MIN[i]);
536
537 /* If we failed to measure the fan speed and clock
538 divider can be increased, let's try that for next
539 time */
540 if (data->fan[i] == 0xff
541 && data->fan_div[i] < 0x07) {
542 dev_dbg(dev, "Increasing fan%d "
543 "clock divider from %u to %u\n",
544 i + 1, div_from_reg(data->fan_div[i]),
545 div_from_reg(data->fan_div[i] + 1));
546 data->fan_div[i]++;
547 w83627ehf_write_fan_div(data, i);
548 /* Preserve min limit if possible */
549 if (data->fan_min[i] >= 2
550 && data->fan_min[i] != 255)
551 w83627ehf_write_value(data,
552 data->REG_FAN_MIN[i],
553 (data->fan_min[i] /= 2));
554 }
555 }
556
557 for (i = 0; i < data->pwm_num; i++) {
558 if (!(data->has_fan & (1 << i)))
559 continue;
560
561 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
562 if (i != 1) {
563 pwmcfg = w83627ehf_read_value(data,
564 W83627EHF_REG_PWM_ENABLE[i]);
565 tolerance = w83627ehf_read_value(data,
566 W83627EHF_REG_TOLERANCE[i]);
567 }
568 data->pwm_mode[i] =
569 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
570 ? 0 : 1;
571 data->pwm_enable[i] =
572 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
573 & 3) + 1;
574 data->pwm[i] = w83627ehf_read_value(data,
575 data->REG_PWM[i]);
576 data->fan_start_output[i] = w83627ehf_read_value(data,
577 data->REG_FAN_START_OUTPUT[i]);
578 data->fan_stop_output[i] = w83627ehf_read_value(data,
579 data->REG_FAN_STOP_OUTPUT[i]);
580 data->fan_stop_time[i] = w83627ehf_read_value(data,
581 data->REG_FAN_STOP_TIME[i]);
582
583 if (data->REG_FAN_MAX_OUTPUT[i] != 0xff)
584 data->fan_max_output[i] =
585 w83627ehf_read_value(data,
586 data->REG_FAN_MAX_OUTPUT[i]);
587
588 if (data->REG_FAN_STEP_OUTPUT[i] != 0xff)
589 data->fan_step_output[i] =
590 w83627ehf_read_value(data,
591 data->REG_FAN_STEP_OUTPUT[i]);
592
593 data->target_temp[i] =
594 w83627ehf_read_value(data,
595 data->REG_TARGET[i]) &
596 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
597 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
598 & 0x0f;
599 }
600
601 /* Measured temperatures and limits */
602 for (i = 0; i < NUM_REG_TEMP; i++) {
603 if (!(data->have_temp & (1 << i)))
604 continue;
605 data->temp[i]
606 = w83627ehf_read_value(data, W83627EHF_REG_TEMP[i]);
607 if (i > 2)
608 break;
609 data->temp_max[i]
610 = w83627ehf_read_value(data,
611 W83627EHF_REG_TEMP_OVER[i]);
612 data->temp_max_hyst[i]
613 = w83627ehf_read_value(data,
614 W83627EHF_REG_TEMP_HYST[i]);
615 }
616
617 data->alarms = w83627ehf_read_value(data,
618 W83627EHF_REG_ALARM1) |
619 (w83627ehf_read_value(data,
620 W83627EHF_REG_ALARM2) << 8) |
621 (w83627ehf_read_value(data,
622 W83627EHF_REG_ALARM3) << 16);
623
624 data->last_updated = jiffies;
625 data->valid = 1;
626 }
627
628 mutex_unlock(&data->update_lock);
629 return data;
630 }
631
632 /*
633 * Sysfs callback functions
634 */
635 #define show_in_reg(reg) \
636 static ssize_t \
637 show_##reg(struct device *dev, struct device_attribute *attr, \
638 char *buf) \
639 { \
640 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
641 struct sensor_device_attribute *sensor_attr = \
642 to_sensor_dev_attr(attr); \
643 int nr = sensor_attr->index; \
644 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
645 }
646 show_in_reg(in)
647 show_in_reg(in_min)
648 show_in_reg(in_max)
649
650 #define store_in_reg(REG, reg) \
651 static ssize_t \
652 store_in_##reg(struct device *dev, struct device_attribute *attr, \
653 const char *buf, size_t count) \
654 { \
655 struct w83627ehf_data *data = dev_get_drvdata(dev); \
656 struct sensor_device_attribute *sensor_attr = \
657 to_sensor_dev_attr(attr); \
658 int nr = sensor_attr->index; \
659 unsigned long val; \
660 int err; \
661 err = strict_strtoul(buf, 10, &val); \
662 if (err < 0) \
663 return err; \
664 mutex_lock(&data->update_lock); \
665 data->in_##reg[nr] = in_to_reg(val, nr); \
666 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
667 data->in_##reg[nr]); \
668 mutex_unlock(&data->update_lock); \
669 return count; \
670 }
671
672 store_in_reg(MIN, min)
673 store_in_reg(MAX, max)
674
675 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
676 char *buf)
677 {
678 struct w83627ehf_data *data = w83627ehf_update_device(dev);
679 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
680 int nr = sensor_attr->index;
681 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
682 }
683
684 static struct sensor_device_attribute sda_in_input[] = {
685 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
686 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
687 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
688 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
689 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
690 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
691 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
692 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
693 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
694 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
695 };
696
697 static struct sensor_device_attribute sda_in_alarm[] = {
698 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
699 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
700 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
701 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
702 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
703 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
704 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
705 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
706 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
707 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
708 };
709
710 static struct sensor_device_attribute sda_in_min[] = {
711 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
712 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
713 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
714 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
715 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
716 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
717 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
718 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
719 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
720 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
721 };
722
723 static struct sensor_device_attribute sda_in_max[] = {
724 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
725 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
726 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
727 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
728 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
729 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
730 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
731 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
732 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
733 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
734 };
735
736 #define show_fan_reg(reg) \
737 static ssize_t \
738 show_##reg(struct device *dev, struct device_attribute *attr, \
739 char *buf) \
740 { \
741 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
742 struct sensor_device_attribute *sensor_attr = \
743 to_sensor_dev_attr(attr); \
744 int nr = sensor_attr->index; \
745 return sprintf(buf, "%d\n", \
746 fan_from_reg(data->reg[nr], \
747 div_from_reg(data->fan_div[nr]))); \
748 }
749 show_fan_reg(fan);
750 show_fan_reg(fan_min);
751
752 static ssize_t
753 show_fan_div(struct device *dev, struct device_attribute *attr,
754 char *buf)
755 {
756 struct w83627ehf_data *data = w83627ehf_update_device(dev);
757 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
758 int nr = sensor_attr->index;
759 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
760 }
761
762 static ssize_t
763 store_fan_min(struct device *dev, struct device_attribute *attr,
764 const char *buf, size_t count)
765 {
766 struct w83627ehf_data *data = dev_get_drvdata(dev);
767 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
768 int nr = sensor_attr->index;
769 unsigned long val;
770 int err;
771 unsigned int reg;
772 u8 new_div;
773
774 err = strict_strtoul(buf, 10, &val);
775 if (err < 0)
776 return err;
777
778 mutex_lock(&data->update_lock);
779 if (!val) {
780 /* No min limit, alarm disabled */
781 data->fan_min[nr] = 255;
782 new_div = data->fan_div[nr]; /* No change */
783 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
784 } else if ((reg = 1350000U / val) >= 128 * 255) {
785 /* Speed below this value cannot possibly be represented,
786 even with the highest divider (128) */
787 data->fan_min[nr] = 254;
788 new_div = 7; /* 128 == (1 << 7) */
789 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
790 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
791 } else if (!reg) {
792 /* Speed above this value cannot possibly be represented,
793 even with the lowest divider (1) */
794 data->fan_min[nr] = 1;
795 new_div = 0; /* 1 == (1 << 0) */
796 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
797 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
798 } else {
799 /* Automatically pick the best divider, i.e. the one such
800 that the min limit will correspond to a register value
801 in the 96..192 range */
802 new_div = 0;
803 while (reg > 192 && new_div < 7) {
804 reg >>= 1;
805 new_div++;
806 }
807 data->fan_min[nr] = reg;
808 }
809
810 /* Write both the fan clock divider (if it changed) and the new
811 fan min (unconditionally) */
812 if (new_div != data->fan_div[nr]) {
813 /* Preserve the fan speed reading */
814 if (data->fan[nr] != 0xff) {
815 if (new_div > data->fan_div[nr])
816 data->fan[nr] >>= new_div - data->fan_div[nr];
817 else if (data->fan[nr] & 0x80)
818 data->fan[nr] = 0xff;
819 else
820 data->fan[nr] <<= data->fan_div[nr] - new_div;
821 }
822
823 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
824 nr + 1, div_from_reg(data->fan_div[nr]),
825 div_from_reg(new_div));
826 data->fan_div[nr] = new_div;
827 w83627ehf_write_fan_div(data, nr);
828 /* Give the chip time to sample a new speed value */
829 data->last_updated = jiffies;
830 }
831 w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
832 data->fan_min[nr]);
833 mutex_unlock(&data->update_lock);
834
835 return count;
836 }
837
838 static struct sensor_device_attribute sda_fan_input[] = {
839 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
840 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
841 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
842 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
843 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
844 };
845
846 static struct sensor_device_attribute sda_fan_alarm[] = {
847 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
848 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
849 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
850 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
851 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
852 };
853
854 static struct sensor_device_attribute sda_fan_min[] = {
855 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
856 store_fan_min, 0),
857 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
858 store_fan_min, 1),
859 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
860 store_fan_min, 2),
861 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
862 store_fan_min, 3),
863 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
864 store_fan_min, 4),
865 };
866
867 static struct sensor_device_attribute sda_fan_div[] = {
868 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
869 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
870 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
871 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
872 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
873 };
874
875 static ssize_t
876 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
877 {
878 struct w83627ehf_data *data = w83627ehf_update_device(dev);
879 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
880 int nr = sensor_attr->index;
881 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
882 }
883
884 #define show_temp_reg(REG, reg) \
885 static ssize_t \
886 show_##reg(struct device *dev, struct device_attribute *attr, \
887 char *buf) \
888 { \
889 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
890 struct sensor_device_attribute *sensor_attr = \
891 to_sensor_dev_attr(attr); \
892 int nr = sensor_attr->index; \
893 return sprintf(buf, "%d\n", \
894 temp_from_reg(W83627EHF_REG_##REG[nr], data->reg[nr])); \
895 }
896 show_temp_reg(TEMP, temp);
897 show_temp_reg(TEMP_OVER, temp_max);
898 show_temp_reg(TEMP_HYST, temp_max_hyst);
899
900 #define store_temp_reg(REG, reg) \
901 static ssize_t \
902 store_##reg(struct device *dev, struct device_attribute *attr, \
903 const char *buf, size_t count) \
904 { \
905 struct w83627ehf_data *data = dev_get_drvdata(dev); \
906 struct sensor_device_attribute *sensor_attr = \
907 to_sensor_dev_attr(attr); \
908 int nr = sensor_attr->index; \
909 int err; \
910 long val; \
911 err = strict_strtol(buf, 10, &val); \
912 if (err < 0) \
913 return err; \
914 mutex_lock(&data->update_lock); \
915 data->reg[nr] = temp_to_reg(W83627EHF_REG_TEMP_##REG[nr], val); \
916 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
917 data->reg[nr]); \
918 mutex_unlock(&data->update_lock); \
919 return count; \
920 }
921 store_temp_reg(OVER, temp_max);
922 store_temp_reg(HYST, temp_max_hyst);
923
924 static ssize_t
925 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
926 {
927 struct w83627ehf_data *data = w83627ehf_update_device(dev);
928 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
929 int nr = sensor_attr->index;
930 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
931 }
932
933 static struct sensor_device_attribute sda_temp_input[] = {
934 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
935 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
936 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
937 SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
938 };
939
940 static struct sensor_device_attribute sda_temp_label[] = {
941 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
942 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
943 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
944 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
945 };
946
947 static struct sensor_device_attribute sda_temp_max[] = {
948 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
949 store_temp_max, 0),
950 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
951 store_temp_max, 1),
952 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
953 store_temp_max, 2),
954 };
955
956 static struct sensor_device_attribute sda_temp_max_hyst[] = {
957 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
958 store_temp_max_hyst, 0),
959 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
960 store_temp_max_hyst, 1),
961 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
962 store_temp_max_hyst, 2),
963 };
964
965 static struct sensor_device_attribute sda_temp_alarm[] = {
966 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
967 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
968 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
969 };
970
971 static struct sensor_device_attribute sda_temp_type[] = {
972 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
973 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
974 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
975 };
976
977 #define show_pwm_reg(reg) \
978 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
979 char *buf) \
980 { \
981 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
982 struct sensor_device_attribute *sensor_attr = \
983 to_sensor_dev_attr(attr); \
984 int nr = sensor_attr->index; \
985 return sprintf(buf, "%d\n", data->reg[nr]); \
986 }
987
988 show_pwm_reg(pwm_mode)
989 show_pwm_reg(pwm_enable)
990 show_pwm_reg(pwm)
991
992 static ssize_t
993 store_pwm_mode(struct device *dev, struct device_attribute *attr,
994 const char *buf, size_t count)
995 {
996 struct w83627ehf_data *data = dev_get_drvdata(dev);
997 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
998 int nr = sensor_attr->index;
999 unsigned long val;
1000 int err;
1001 u16 reg;
1002
1003 err = strict_strtoul(buf, 10, &val);
1004 if (err < 0)
1005 return err;
1006
1007 if (val > 1)
1008 return -EINVAL;
1009 mutex_lock(&data->update_lock);
1010 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1011 data->pwm_mode[nr] = val;
1012 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1013 if (!val)
1014 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1015 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1016 mutex_unlock(&data->update_lock);
1017 return count;
1018 }
1019
1020 static ssize_t
1021 store_pwm(struct device *dev, struct device_attribute *attr,
1022 const char *buf, size_t count)
1023 {
1024 struct w83627ehf_data *data = dev_get_drvdata(dev);
1025 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1026 int nr = sensor_attr->index;
1027 unsigned long val;
1028 int err;
1029
1030 err = strict_strtoul(buf, 10, &val);
1031 if (err < 0)
1032 return err;
1033
1034 val = SENSORS_LIMIT(val, 0, 255);
1035
1036 mutex_lock(&data->update_lock);
1037 data->pwm[nr] = val;
1038 w83627ehf_write_value(data, data->REG_PWM[nr], val);
1039 mutex_unlock(&data->update_lock);
1040 return count;
1041 }
1042
1043 static ssize_t
1044 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1045 const char *buf, size_t count)
1046 {
1047 struct w83627ehf_data *data = dev_get_drvdata(dev);
1048 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1049 int nr = sensor_attr->index;
1050 unsigned long val;
1051 int err;
1052 u16 reg;
1053
1054 err = strict_strtoul(buf, 10, &val);
1055 if (err < 0)
1056 return err;
1057
1058 if (!val || (val > 4))
1059 return -EINVAL;
1060 mutex_lock(&data->update_lock);
1061 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1062 data->pwm_enable[nr] = val;
1063 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1064 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1065 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1066 mutex_unlock(&data->update_lock);
1067 return count;
1068 }
1069
1070
1071 #define show_tol_temp(reg) \
1072 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1073 char *buf) \
1074 { \
1075 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1076 struct sensor_device_attribute *sensor_attr = \
1077 to_sensor_dev_attr(attr); \
1078 int nr = sensor_attr->index; \
1079 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1080 }
1081
1082 show_tol_temp(tolerance)
1083 show_tol_temp(target_temp)
1084
1085 static ssize_t
1086 store_target_temp(struct device *dev, struct device_attribute *attr,
1087 const char *buf, size_t count)
1088 {
1089 struct w83627ehf_data *data = dev_get_drvdata(dev);
1090 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1091 int nr = sensor_attr->index;
1092 long val;
1093 int err;
1094
1095 err = strict_strtol(buf, 10, &val);
1096 if (err < 0)
1097 return err;
1098
1099 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1100
1101 mutex_lock(&data->update_lock);
1102 data->target_temp[nr] = val;
1103 w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1104 mutex_unlock(&data->update_lock);
1105 return count;
1106 }
1107
1108 static ssize_t
1109 store_tolerance(struct device *dev, struct device_attribute *attr,
1110 const char *buf, size_t count)
1111 {
1112 struct w83627ehf_data *data = dev_get_drvdata(dev);
1113 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1114 int nr = sensor_attr->index;
1115 u16 reg;
1116 long val;
1117 int err;
1118
1119 err = strict_strtol(buf, 10, &val);
1120 if (err < 0)
1121 return err;
1122
1123 /* Limit the temp to 0C - 15C */
1124 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1125
1126 mutex_lock(&data->update_lock);
1127 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1128 data->tolerance[nr] = val;
1129 if (nr == 1)
1130 reg = (reg & 0x0f) | (val << 4);
1131 else
1132 reg = (reg & 0xf0) | val;
1133 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1134 mutex_unlock(&data->update_lock);
1135 return count;
1136 }
1137
1138 static struct sensor_device_attribute sda_pwm[] = {
1139 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1140 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1141 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1142 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1143 };
1144
1145 static struct sensor_device_attribute sda_pwm_mode[] = {
1146 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1147 store_pwm_mode, 0),
1148 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1149 store_pwm_mode, 1),
1150 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1151 store_pwm_mode, 2),
1152 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1153 store_pwm_mode, 3),
1154 };
1155
1156 static struct sensor_device_attribute sda_pwm_enable[] = {
1157 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1158 store_pwm_enable, 0),
1159 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1160 store_pwm_enable, 1),
1161 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1162 store_pwm_enable, 2),
1163 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1164 store_pwm_enable, 3),
1165 };
1166
1167 static struct sensor_device_attribute sda_target_temp[] = {
1168 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1169 store_target_temp, 0),
1170 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1171 store_target_temp, 1),
1172 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1173 store_target_temp, 2),
1174 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1175 store_target_temp, 3),
1176 };
1177
1178 static struct sensor_device_attribute sda_tolerance[] = {
1179 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1180 store_tolerance, 0),
1181 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1182 store_tolerance, 1),
1183 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1184 store_tolerance, 2),
1185 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1186 store_tolerance, 3),
1187 };
1188
1189 /* Smart Fan registers */
1190
1191 #define fan_functions(reg, REG) \
1192 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1193 char *buf) \
1194 { \
1195 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1196 struct sensor_device_attribute *sensor_attr = \
1197 to_sensor_dev_attr(attr); \
1198 int nr = sensor_attr->index; \
1199 return sprintf(buf, "%d\n", data->reg[nr]); \
1200 } \
1201 static ssize_t \
1202 store_##reg(struct device *dev, struct device_attribute *attr, \
1203 const char *buf, size_t count) \
1204 { \
1205 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1206 struct sensor_device_attribute *sensor_attr = \
1207 to_sensor_dev_attr(attr); \
1208 int nr = sensor_attr->index; \
1209 unsigned long val; \
1210 int err; \
1211 err = strict_strtoul(buf, 10, &val); \
1212 if (err < 0) \
1213 return err; \
1214 val = SENSORS_LIMIT(val, 1, 255); \
1215 mutex_lock(&data->update_lock); \
1216 data->reg[nr] = val; \
1217 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1218 mutex_unlock(&data->update_lock); \
1219 return count; \
1220 }
1221
1222 fan_functions(fan_start_output, FAN_START_OUTPUT)
1223 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1224 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1225 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1226
1227 #define fan_time_functions(reg, REG) \
1228 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1229 char *buf) \
1230 { \
1231 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1232 struct sensor_device_attribute *sensor_attr = \
1233 to_sensor_dev_attr(attr); \
1234 int nr = sensor_attr->index; \
1235 return sprintf(buf, "%d\n", \
1236 step_time_from_reg(data->reg[nr], \
1237 data->pwm_mode[nr])); \
1238 } \
1239 \
1240 static ssize_t \
1241 store_##reg(struct device *dev, struct device_attribute *attr, \
1242 const char *buf, size_t count) \
1243 { \
1244 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1245 struct sensor_device_attribute *sensor_attr = \
1246 to_sensor_dev_attr(attr); \
1247 int nr = sensor_attr->index; \
1248 unsigned long val; \
1249 int err; \
1250 err = strict_strtoul(buf, 10, &val); \
1251 if (err < 0) \
1252 return err; \
1253 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1254 mutex_lock(&data->update_lock); \
1255 data->reg[nr] = val; \
1256 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1257 mutex_unlock(&data->update_lock); \
1258 return count; \
1259 } \
1260
1261 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1262
1263 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1264 char *buf)
1265 {
1266 struct w83627ehf_data *data = dev_get_drvdata(dev);
1267
1268 return sprintf(buf, "%s\n", data->name);
1269 }
1270 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1271
1272 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1273 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1274 store_fan_stop_time, 3),
1275 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1276 store_fan_start_output, 3),
1277 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1278 store_fan_stop_output, 3),
1279 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1280 store_fan_max_output, 3),
1281 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1282 store_fan_step_output, 3),
1283 };
1284
1285 static struct sensor_device_attribute sda_sf3_arrays[] = {
1286 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1287 store_fan_stop_time, 0),
1288 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1289 store_fan_stop_time, 1),
1290 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1291 store_fan_stop_time, 2),
1292 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1293 store_fan_start_output, 0),
1294 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1295 store_fan_start_output, 1),
1296 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1297 store_fan_start_output, 2),
1298 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1299 store_fan_stop_output, 0),
1300 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1301 store_fan_stop_output, 1),
1302 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1303 store_fan_stop_output, 2),
1304 };
1305
1306
1307 /*
1308 * pwm1 and pwm3 don't support max and step settings on all chips.
1309 * Need to check support while generating/removing attribute files.
1310 */
1311 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1312 SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1313 store_fan_max_output, 0),
1314 SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1315 store_fan_step_output, 0),
1316 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1317 store_fan_max_output, 1),
1318 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1319 store_fan_step_output, 1),
1320 SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1321 store_fan_max_output, 2),
1322 SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1323 store_fan_step_output, 2),
1324 };
1325
1326 static ssize_t
1327 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1328 {
1329 struct w83627ehf_data *data = dev_get_drvdata(dev);
1330 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1331 }
1332 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1333
1334 /*
1335 * Driver and device management
1336 */
1337
1338 static void w83627ehf_device_remove_files(struct device *dev)
1339 {
1340 /* some entries in the following arrays may not have been used in
1341 * device_create_file(), but device_remove_file() will ignore them */
1342 int i;
1343 struct w83627ehf_data *data = dev_get_drvdata(dev);
1344
1345 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1346 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1347 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1348 struct sensor_device_attribute *attr =
1349 &sda_sf3_max_step_arrays[i];
1350 if (data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1351 device_remove_file(dev, &attr->dev_attr);
1352 }
1353 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1354 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1355 for (i = 0; i < data->in_num; i++) {
1356 if ((i == 6) && data->in6_skip)
1357 continue;
1358 device_remove_file(dev, &sda_in_input[i].dev_attr);
1359 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1360 device_remove_file(dev, &sda_in_min[i].dev_attr);
1361 device_remove_file(dev, &sda_in_max[i].dev_attr);
1362 }
1363 for (i = 0; i < 5; i++) {
1364 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1365 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1366 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1367 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1368 }
1369 for (i = 0; i < data->pwm_num; i++) {
1370 device_remove_file(dev, &sda_pwm[i].dev_attr);
1371 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1372 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1373 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1374 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1375 }
1376 for (i = 0; i < NUM_REG_TEMP; i++) {
1377 if (!(data->have_temp & (1 << i)))
1378 continue;
1379 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1380 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1381 if (i > 2)
1382 break;
1383 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1384 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1385 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1386 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1387 }
1388
1389 device_remove_file(dev, &dev_attr_name);
1390 device_remove_file(dev, &dev_attr_cpu0_vid);
1391 }
1392
1393 /* Get the monitoring functions started */
1394 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1395 {
1396 int i;
1397 u8 tmp, diode;
1398
1399 /* Start monitoring is needed */
1400 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1401 if (!(tmp & 0x01))
1402 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1403 tmp | 0x01);
1404
1405 /* Enable temperature sensors if needed */
1406 for (i = 0; i < NUM_REG_TEMP; i++) {
1407 if (!(data->have_temp & (1 << i)))
1408 continue;
1409 if (!W83627EHF_REG_TEMP_CONFIG[i])
1410 continue;
1411 tmp = w83627ehf_read_value(data,
1412 W83627EHF_REG_TEMP_CONFIG[i]);
1413 if (tmp & 0x01)
1414 w83627ehf_write_value(data,
1415 W83627EHF_REG_TEMP_CONFIG[i],
1416 tmp & 0xfe);
1417 }
1418
1419 /* Enable VBAT monitoring if needed */
1420 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1421 if (!(tmp & 0x01))
1422 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1423
1424 /* Get thermal sensor types */
1425 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1426 for (i = 0; i < 3; i++) {
1427 if ((tmp & (0x02 << i)))
1428 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1429 else
1430 data->temp_type[i] = 4; /* thermistor */
1431 }
1432 }
1433
1434 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1435 {
1436 struct device *dev = &pdev->dev;
1437 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1438 struct w83627ehf_data *data;
1439 struct resource *res;
1440 u8 fan4pin, fan5pin, en_vrm10;
1441 int i, err = 0;
1442
1443 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1444 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1445 err = -EBUSY;
1446 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1447 (unsigned long)res->start,
1448 (unsigned long)res->start + IOREGION_LENGTH - 1);
1449 goto exit;
1450 }
1451
1452 data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL);
1453 if (!data) {
1454 err = -ENOMEM;
1455 goto exit_release;
1456 }
1457
1458 data->addr = res->start;
1459 mutex_init(&data->lock);
1460 mutex_init(&data->update_lock);
1461 data->name = w83627ehf_device_names[sio_data->kind];
1462 platform_set_drvdata(pdev, data);
1463
1464 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1465 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1466 /* 667HG has 3 pwms */
1467 data->pwm_num = (sio_data->kind == w83667hg
1468 || sio_data->kind == w83667hg_b) ? 3 : 4;
1469
1470 data->have_temp = 0x07;
1471 /* Check temp3 configuration bit for 667HG */
1472 if (sio_data->kind == w83667hg) {
1473 u8 reg;
1474
1475 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1476 if (reg & 0x01)
1477 data->have_temp &= ~(1 << 2);
1478 else
1479 data->in6_skip = 1; /* Either temp3 or in6 */
1480 } else if (sio_data->kind == w83667hg_b) {
1481 u8 reg;
1482
1483 reg = w83627ehf_read_value(data, 0x4a);
1484 data->temp_src[0] = reg >> 5;
1485 reg = w83627ehf_read_value(data, 0x49);
1486 data->temp_src[1] = reg & 0x07;
1487 data->temp_src[2] = (reg >> 4) & 0x07;
1488
1489 /*
1490 * W83667HG-B has another temperature register at 0x7e.
1491 * The temperature source is selected with register 0x7d.
1492 * Support it if the source differs from already reported
1493 * sources.
1494 */
1495 reg = w83627ehf_read_value(data, 0x7d);
1496 reg &= 0x07;
1497 if (reg != data->temp_src[0] && reg != data->temp_src[1]
1498 && reg != data->temp_src[2]) {
1499 data->temp_src[3] = reg;
1500 data->have_temp |= 1 << 3;
1501 }
1502
1503 /*
1504 * Chip supports either AUXTIN or VIN3. Try to find out which
1505 * one.
1506 */
1507 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1508 if (data->temp_src[2] == 2 && (reg & 0x01))
1509 data->have_temp &= ~(1 << 2);
1510
1511 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
1512 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
1513 data->in6_skip = 1;
1514
1515 data->temp_label = w83667hg_b_temp_label;
1516 }
1517
1518 data->REG_PWM = W83627EHF_REG_PWM;
1519 data->REG_TARGET = W83627EHF_REG_TARGET;
1520 data->REG_FAN = W83627EHF_REG_FAN;
1521 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
1522 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
1523 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
1524 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
1525 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
1526 if (sio_data->kind == w83667hg_b) {
1527 data->REG_FAN_MAX_OUTPUT =
1528 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
1529 data->REG_FAN_STEP_OUTPUT =
1530 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
1531 } else {
1532 data->REG_FAN_MAX_OUTPUT =
1533 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
1534 data->REG_FAN_STEP_OUTPUT =
1535 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
1536 }
1537
1538 /* Initialize the chip */
1539 w83627ehf_init_device(data);
1540
1541 data->vrm = vid_which_vrm();
1542 superio_enter(sio_data->sioreg);
1543 /* Read VID value */
1544 if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1545 /* W83667HG has different pins for VID input and output, so
1546 we can get the VID input values directly at logical device D
1547 0xe3. */
1548 superio_select(sio_data->sioreg, W83667HG_LD_VID);
1549 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1550 err = device_create_file(dev, &dev_attr_cpu0_vid);
1551 if (err)
1552 goto exit_release;
1553 } else {
1554 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1555 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
1556 /* Set VID input sensibility if needed. In theory the
1557 BIOS should have set it, but in practice it's not
1558 always the case. We only do it for the W83627EHF/EHG
1559 because the W83627DHG is more complex in this
1560 respect. */
1561 if (sio_data->kind == w83627ehf) {
1562 en_vrm10 = superio_inb(sio_data->sioreg,
1563 SIO_REG_EN_VRM10);
1564 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1565 dev_warn(dev, "Setting VID input "
1566 "voltage to TTL\n");
1567 superio_outb(sio_data->sioreg,
1568 SIO_REG_EN_VRM10,
1569 en_vrm10 & ~0x08);
1570 } else if (!(en_vrm10 & 0x08)
1571 && data->vrm == 100) {
1572 dev_warn(dev, "Setting VID input "
1573 "voltage to VRM10\n");
1574 superio_outb(sio_data->sioreg,
1575 SIO_REG_EN_VRM10,
1576 en_vrm10 | 0x08);
1577 }
1578 }
1579
1580 data->vid = superio_inb(sio_data->sioreg,
1581 SIO_REG_VID_DATA);
1582 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
1583 data->vid &= 0x3f;
1584
1585 err = device_create_file(dev, &dev_attr_cpu0_vid);
1586 if (err)
1587 goto exit_release;
1588 } else {
1589 dev_info(dev, "VID pins in output mode, CPU VID not "
1590 "available\n");
1591 }
1592 }
1593
1594 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1595 if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1596 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1597 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1598 } else {
1599 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1600 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1601 }
1602 superio_exit(sio_data->sioreg);
1603
1604 /* It looks like fan4 and fan5 pins can be alternatively used
1605 as fan on/off switches, but fan5 control is write only :/
1606 We assume that if the serial interface is disabled, designers
1607 connected fan5 as input unless they are emitting log 1, which
1608 is not the default. */
1609
1610 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1611 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1612 if ((i & (1 << 2)) && fan4pin)
1613 data->has_fan |= (1 << 3);
1614 if (!(i & (1 << 1)) && fan5pin)
1615 data->has_fan |= (1 << 4);
1616
1617 /* Read fan clock dividers immediately */
1618 w83627ehf_update_fan_div(data);
1619
1620 /* Register sysfs hooks */
1621 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
1622 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
1623 if (err)
1624 goto exit_remove;
1625 }
1626
1627 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1628 struct sensor_device_attribute *attr =
1629 &sda_sf3_max_step_arrays[i];
1630 if (data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
1631 err = device_create_file(dev, &attr->dev_attr);
1632 if (err)
1633 goto exit_remove;
1634 }
1635 }
1636 /* if fan4 is enabled create the sf3 files for it */
1637 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
1638 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1639 err = device_create_file(dev,
1640 &sda_sf3_arrays_fan4[i].dev_attr);
1641 if (err)
1642 goto exit_remove;
1643 }
1644
1645 for (i = 0; i < data->in_num; i++) {
1646 if ((i == 6) && data->in6_skip)
1647 continue;
1648 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1649 || (err = device_create_file(dev,
1650 &sda_in_alarm[i].dev_attr))
1651 || (err = device_create_file(dev,
1652 &sda_in_min[i].dev_attr))
1653 || (err = device_create_file(dev,
1654 &sda_in_max[i].dev_attr)))
1655 goto exit_remove;
1656 }
1657
1658 for (i = 0; i < 5; i++) {
1659 if (data->has_fan & (1 << i)) {
1660 if ((err = device_create_file(dev,
1661 &sda_fan_input[i].dev_attr))
1662 || (err = device_create_file(dev,
1663 &sda_fan_alarm[i].dev_attr))
1664 || (err = device_create_file(dev,
1665 &sda_fan_div[i].dev_attr))
1666 || (err = device_create_file(dev,
1667 &sda_fan_min[i].dev_attr)))
1668 goto exit_remove;
1669 if (i < data->pwm_num &&
1670 ((err = device_create_file(dev,
1671 &sda_pwm[i].dev_attr))
1672 || (err = device_create_file(dev,
1673 &sda_pwm_mode[i].dev_attr))
1674 || (err = device_create_file(dev,
1675 &sda_pwm_enable[i].dev_attr))
1676 || (err = device_create_file(dev,
1677 &sda_target_temp[i].dev_attr))
1678 || (err = device_create_file(dev,
1679 &sda_tolerance[i].dev_attr))))
1680 goto exit_remove;
1681 }
1682 }
1683
1684 for (i = 0; i < NUM_REG_TEMP; i++) {
1685 if (!(data->have_temp & (1 << i)))
1686 continue;
1687 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
1688 if (err)
1689 goto exit_remove;
1690 if (data->temp_label) {
1691 err = device_create_file(dev,
1692 &sda_temp_label[i].dev_attr);
1693 if (err)
1694 goto exit_remove;
1695 }
1696 if (i > 2)
1697 break;
1698 if ((err = device_create_file(dev, &sda_temp_max[i].dev_attr))
1699 || (err = device_create_file(dev,
1700 &sda_temp_max_hyst[i].dev_attr))
1701 || (err = device_create_file(dev,
1702 &sda_temp_alarm[i].dev_attr))
1703 || (err = device_create_file(dev,
1704 &sda_temp_type[i].dev_attr)))
1705 goto exit_remove;
1706 }
1707
1708 err = device_create_file(dev, &dev_attr_name);
1709 if (err)
1710 goto exit_remove;
1711
1712 data->hwmon_dev = hwmon_device_register(dev);
1713 if (IS_ERR(data->hwmon_dev)) {
1714 err = PTR_ERR(data->hwmon_dev);
1715 goto exit_remove;
1716 }
1717
1718 return 0;
1719
1720 exit_remove:
1721 w83627ehf_device_remove_files(dev);
1722 kfree(data);
1723 platform_set_drvdata(pdev, NULL);
1724 exit_release:
1725 release_region(res->start, IOREGION_LENGTH);
1726 exit:
1727 return err;
1728 }
1729
1730 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1731 {
1732 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1733
1734 hwmon_device_unregister(data->hwmon_dev);
1735 w83627ehf_device_remove_files(&pdev->dev);
1736 release_region(data->addr, IOREGION_LENGTH);
1737 platform_set_drvdata(pdev, NULL);
1738 kfree(data);
1739
1740 return 0;
1741 }
1742
1743 static struct platform_driver w83627ehf_driver = {
1744 .driver = {
1745 .owner = THIS_MODULE,
1746 .name = DRVNAME,
1747 },
1748 .probe = w83627ehf_probe,
1749 .remove = __devexit_p(w83627ehf_remove),
1750 };
1751
1752 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1753 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1754 struct w83627ehf_sio_data *sio_data)
1755 {
1756 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1757 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1758 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1759 static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
1760 static const char __initdata sio_name_W83667HG[] = "W83667HG";
1761 static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
1762
1763 u16 val;
1764 const char *sio_name;
1765
1766 superio_enter(sioaddr);
1767
1768 if (force_id)
1769 val = force_id;
1770 else
1771 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1772 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1773 switch (val & SIO_ID_MASK) {
1774 case SIO_W83627EHF_ID:
1775 sio_data->kind = w83627ehf;
1776 sio_name = sio_name_W83627EHF;
1777 break;
1778 case SIO_W83627EHG_ID:
1779 sio_data->kind = w83627ehf;
1780 sio_name = sio_name_W83627EHG;
1781 break;
1782 case SIO_W83627DHG_ID:
1783 sio_data->kind = w83627dhg;
1784 sio_name = sio_name_W83627DHG;
1785 break;
1786 case SIO_W83627DHG_P_ID:
1787 sio_data->kind = w83627dhg_p;
1788 sio_name = sio_name_W83627DHG_P;
1789 break;
1790 case SIO_W83667HG_ID:
1791 sio_data->kind = w83667hg;
1792 sio_name = sio_name_W83667HG;
1793 break;
1794 case SIO_W83667HG_B_ID:
1795 sio_data->kind = w83667hg_b;
1796 sio_name = sio_name_W83667HG_B;
1797 break;
1798 default:
1799 if (val != 0xffff)
1800 pr_debug("unsupported chip ID: 0x%04x\n", val);
1801 superio_exit(sioaddr);
1802 return -ENODEV;
1803 }
1804
1805 /* We have a known chip, find the HWM I/O address */
1806 superio_select(sioaddr, W83627EHF_LD_HWM);
1807 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1808 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1809 *addr = val & IOREGION_ALIGNMENT;
1810 if (*addr == 0) {
1811 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
1812 superio_exit(sioaddr);
1813 return -ENODEV;
1814 }
1815
1816 /* Activate logical device if needed */
1817 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1818 if (!(val & 0x01)) {
1819 pr_warn("Forcibly enabling Super-I/O. "
1820 "Sensor is probably unusable.\n");
1821 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1822 }
1823
1824 superio_exit(sioaddr);
1825 pr_info("Found %s chip at %#x\n", sio_name, *addr);
1826 sio_data->sioreg = sioaddr;
1827
1828 return 0;
1829 }
1830
1831 /* when Super-I/O functions move to a separate file, the Super-I/O
1832 * bus will manage the lifetime of the device and this module will only keep
1833 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1834 * must keep track of the device */
1835 static struct platform_device *pdev;
1836
1837 static int __init sensors_w83627ehf_init(void)
1838 {
1839 int err;
1840 unsigned short address;
1841 struct resource res;
1842 struct w83627ehf_sio_data sio_data;
1843
1844 /* initialize sio_data->kind and sio_data->sioreg.
1845 *
1846 * when Super-I/O functions move to a separate file, the Super-I/O
1847 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1848 * w83627ehf hardware monitor, and call probe() */
1849 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1850 w83627ehf_find(0x4e, &address, &sio_data))
1851 return -ENODEV;
1852
1853 err = platform_driver_register(&w83627ehf_driver);
1854 if (err)
1855 goto exit;
1856
1857 pdev = platform_device_alloc(DRVNAME, address);
1858 if (!pdev) {
1859 err = -ENOMEM;
1860 pr_err("Device allocation failed\n");
1861 goto exit_unregister;
1862 }
1863
1864 err = platform_device_add_data(pdev, &sio_data,
1865 sizeof(struct w83627ehf_sio_data));
1866 if (err) {
1867 pr_err("Platform data allocation failed\n");
1868 goto exit_device_put;
1869 }
1870
1871 memset(&res, 0, sizeof(res));
1872 res.name = DRVNAME;
1873 res.start = address + IOREGION_OFFSET;
1874 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1875 res.flags = IORESOURCE_IO;
1876
1877 err = acpi_check_resource_conflict(&res);
1878 if (err)
1879 goto exit_device_put;
1880
1881 err = platform_device_add_resources(pdev, &res, 1);
1882 if (err) {
1883 pr_err("Device resource addition failed (%d)\n", err);
1884 goto exit_device_put;
1885 }
1886
1887 /* platform_device_add calls probe() */
1888 err = platform_device_add(pdev);
1889 if (err) {
1890 pr_err("Device addition failed (%d)\n", err);
1891 goto exit_device_put;
1892 }
1893
1894 return 0;
1895
1896 exit_device_put:
1897 platform_device_put(pdev);
1898 exit_unregister:
1899 platform_driver_unregister(&w83627ehf_driver);
1900 exit:
1901 return err;
1902 }
1903
1904 static void __exit sensors_w83627ehf_exit(void)
1905 {
1906 platform_device_unregister(pdev);
1907 platform_driver_unregister(&w83627ehf_driver);
1908 }
1909
1910 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1911 MODULE_DESCRIPTION("W83627EHF driver");
1912 MODULE_LICENSE("GPL");
1913
1914 module_init(sensors_w83627ehf_init);
1915 module_exit(sensors_w83627ehf_exit);
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