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2ffb84f9c6b713ef579a510090434d340ac1e272
[deliverable/linux.git] / drivers / hwmon / w83627hf.c
1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
31 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
32
33 For other winbond chips, and for i2c support in the above chips,
34 use w83781d.c.
35
36 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
37 supported yet.
38 */
39
40 #include <linux/module.h>
41 #include <linux/init.h>
42 #include <linux/slab.h>
43 #include <linux/jiffies.h>
44 #include <linux/i2c.h>
45 #include <linux/i2c-isa.h>
46 #include <linux/hwmon.h>
47 #include <linux/hwmon-vid.h>
48 #include <linux/err.h>
49 #include <asm/io.h>
50 #include "lm75.h"
51
52 static u16 force_addr;
53 module_param(force_addr, ushort, 0);
54 MODULE_PARM_DESC(force_addr,
55 "Initialize the base address of the sensors");
56 static u8 force_i2c = 0x1f;
57 module_param(force_i2c, byte, 0);
58 MODULE_PARM_DESC(force_i2c,
59 "Initialize the i2c address of the sensors");
60
61 /* The actual ISA address is read from Super-I/O configuration space */
62 static unsigned short address;
63
64 /* Insmod parameters */
65 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
66
67 static int reset;
68 module_param(reset, bool, 0);
69 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
70
71 static int init = 1;
72 module_param(init, bool, 0);
73 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74
75 /* modified from kernel/include/traps.c */
76 static int REG; /* The register to read/write */
77 #define DEV 0x07 /* Register: Logical device select */
78 static int VAL; /* The value to read/write */
79
80 /* logical device numbers for superio_select (below) */
81 #define W83627HF_LD_FDC 0x00
82 #define W83627HF_LD_PRT 0x01
83 #define W83627HF_LD_UART1 0x02
84 #define W83627HF_LD_UART2 0x03
85 #define W83627HF_LD_KBC 0x05
86 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
87 #define W83627HF_LD_GAME 0x07
88 #define W83627HF_LD_MIDI 0x07
89 #define W83627HF_LD_GPIO1 0x07
90 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
91 #define W83627HF_LD_GPIO2 0x08
92 #define W83627HF_LD_GPIO3 0x09
93 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
94 #define W83627HF_LD_ACPI 0x0a
95 #define W83627HF_LD_HWM 0x0b
96
97 #define DEVID 0x20 /* Register: Device ID */
98
99 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
100 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
101 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
102
103 static inline void
104 superio_outb(int reg, int val)
105 {
106 outb(reg, REG);
107 outb(val, VAL);
108 }
109
110 static inline int
111 superio_inb(int reg)
112 {
113 outb(reg, REG);
114 return inb(VAL);
115 }
116
117 static inline void
118 superio_select(int ld)
119 {
120 outb(DEV, REG);
121 outb(ld, VAL);
122 }
123
124 static inline void
125 superio_enter(void)
126 {
127 outb(0x87, REG);
128 outb(0x87, REG);
129 }
130
131 static inline void
132 superio_exit(void)
133 {
134 outb(0xAA, REG);
135 }
136
137 #define W627_DEVID 0x52
138 #define W627THF_DEVID 0x82
139 #define W697_DEVID 0x60
140 #define W637_DEVID 0x70
141 #define WINB_ACT_REG 0x30
142 #define WINB_BASE_REG 0x60
143 /* Constants specified below */
144
145 /* Alignment of the base address */
146 #define WINB_ALIGNMENT ~7
147
148 /* Offset & size of I/O region we are interested in */
149 #define WINB_REGION_OFFSET 5
150 #define WINB_REGION_SIZE 2
151
152 /* Where are the sensors address/data registers relative to the base address */
153 #define W83781D_ADDR_REG_OFFSET 5
154 #define W83781D_DATA_REG_OFFSET 6
155
156 /* The W83781D registers */
157 /* The W83782D registers for nr=7,8 are in bank 5 */
158 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
159 (0x554 + (((nr) - 7) * 2)))
160 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
161 (0x555 + (((nr) - 7) * 2)))
162 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
163 (0x550 + (nr) - 7))
164
165 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
166 #define W83781D_REG_FAN(nr) (0x27 + (nr))
167
168 #define W83781D_REG_TEMP2_CONFIG 0x152
169 #define W83781D_REG_TEMP3_CONFIG 0x252
170 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
171 ((nr == 2) ? (0x0150) : \
172 (0x27)))
173 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
174 ((nr == 2) ? (0x153) : \
175 (0x3A)))
176 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
177 ((nr == 2) ? (0x155) : \
178 (0x39)))
179
180 #define W83781D_REG_BANK 0x4E
181
182 #define W83781D_REG_CONFIG 0x40
183 #define W83781D_REG_ALARM1 0x459
184 #define W83781D_REG_ALARM2 0x45A
185 #define W83781D_REG_ALARM3 0x45B
186
187 #define W83781D_REG_BEEP_CONFIG 0x4D
188 #define W83781D_REG_BEEP_INTS1 0x56
189 #define W83781D_REG_BEEP_INTS2 0x57
190 #define W83781D_REG_BEEP_INTS3 0x453
191
192 #define W83781D_REG_VID_FANDIV 0x47
193
194 #define W83781D_REG_CHIPID 0x49
195 #define W83781D_REG_WCHIPID 0x58
196 #define W83781D_REG_CHIPMAN 0x4F
197 #define W83781D_REG_PIN 0x4B
198
199 #define W83781D_REG_VBAT 0x5D
200
201 #define W83627HF_REG_PWM1 0x5A
202 #define W83627HF_REG_PWM2 0x5B
203
204 #define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */
205 #define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */
206 #define W83627THF_REG_PWM3 0x11 /* 637HF too */
207
208 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */
209
210 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
211 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
212 W83627THF_REG_PWM3 };
213 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
214 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
215
216 #define W83781D_REG_I2C_ADDR 0x48
217 #define W83781D_REG_I2C_SUBADDR 0x4A
218
219 /* Sensor selection */
220 #define W83781D_REG_SCFG1 0x5D
221 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
222 #define W83781D_REG_SCFG2 0x59
223 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
224 #define W83781D_DEFAULT_BETA 3435
225
226 /* Conversions. Limit checking is only done on the TO_REG
227 variants. Note that you should be a bit careful with which arguments
228 these macros are called: arguments may be evaluated more than once.
229 Fixing this is just not worth it. */
230 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
231 #define IN_FROM_REG(val) ((val) * 16)
232
233 static inline u8 FAN_TO_REG(long rpm, int div)
234 {
235 if (rpm == 0)
236 return 255;
237 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
238 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
239 254);
240 }
241
242 #define TEMP_MIN (-128000)
243 #define TEMP_MAX ( 127000)
244
245 /* TEMP: 0.001C/bit (-128C to +127C)
246 REG: 1C/bit, two's complement */
247 static u8 TEMP_TO_REG(int temp)
248 {
249 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
250 ntemp += (ntemp<0 ? -500 : 500);
251 return (u8)(ntemp / 1000);
252 }
253
254 static int TEMP_FROM_REG(u8 reg)
255 {
256 return (s8)reg * 1000;
257 }
258
259 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
260
261 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
262
263 #define BEEP_MASK_FROM_REG(val) (val)
264 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
265 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
266 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
267
268 #define DIV_FROM_REG(val) (1 << (val))
269
270 static inline u8 DIV_TO_REG(long val)
271 {
272 int i;
273 val = SENSORS_LIMIT(val, 1, 128) >> 1;
274 for (i = 0; i < 7; i++) {
275 if (val == 0)
276 break;
277 val >>= 1;
278 }
279 return ((u8) i);
280 }
281
282 /* For each registered chip, we need to keep some data in memory. That
283 data is pointed to by w83627hf_list[NR]->data. The structure itself is
284 dynamically allocated, at the same time when a new client is allocated. */
285 struct w83627hf_data {
286 struct i2c_client client;
287 struct class_device *class_dev;
288 struct semaphore lock;
289 enum chips type;
290
291 struct semaphore update_lock;
292 char valid; /* !=0 if following fields are valid */
293 unsigned long last_updated; /* In jiffies */
294
295 struct i2c_client *lm75; /* for secondary I2C addresses */
296 /* pointer to array of 2 subclients */
297
298 u8 in[9]; /* Register value */
299 u8 in_max[9]; /* Register value */
300 u8 in_min[9]; /* Register value */
301 u8 fan[3]; /* Register value */
302 u8 fan_min[3]; /* Register value */
303 u8 temp;
304 u8 temp_max; /* Register value */
305 u8 temp_max_hyst; /* Register value */
306 u16 temp_add[2]; /* Register value */
307 u16 temp_max_add[2]; /* Register value */
308 u16 temp_max_hyst_add[2]; /* Register value */
309 u8 fan_div[3]; /* Register encoding, shifted right */
310 u8 vid; /* Register encoding, combined */
311 u32 alarms; /* Register encoding, combined */
312 u32 beep_mask; /* Register encoding, combined */
313 u8 beep_enable; /* Boolean */
314 u8 pwm[3]; /* Register value */
315 u16 sens[3]; /* 782D/783S only.
316 1 = pentium diode; 2 = 3904 diode;
317 3000-5000 = thermistor beta.
318 Default = 3435.
319 Other Betas unimplemented */
320 u8 vrm;
321 u8 vrm_ovt; /* Register value, 627thf & 637hf only */
322 };
323
324
325 static int w83627hf_detect(struct i2c_adapter *adapter);
326 static int w83627hf_detach_client(struct i2c_client *client);
327
328 static int w83627hf_read_value(struct i2c_client *client, u16 register);
329 static int w83627hf_write_value(struct i2c_client *client, u16 register,
330 u16 value);
331 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
332 static void w83627hf_init_client(struct i2c_client *client);
333
334 static struct i2c_driver w83627hf_driver = {
335 .driver = {
336 .owner = THIS_MODULE,
337 .name = "w83627hf",
338 },
339 .attach_adapter = w83627hf_detect,
340 .detach_client = w83627hf_detach_client,
341 };
342
343 /* following are the sysfs callback functions */
344 #define show_in_reg(reg) \
345 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
346 { \
347 struct w83627hf_data *data = w83627hf_update_device(dev); \
348 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
349 }
350 show_in_reg(in)
351 show_in_reg(in_min)
352 show_in_reg(in_max)
353
354 #define store_in_reg(REG, reg) \
355 static ssize_t \
356 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
357 { \
358 struct i2c_client *client = to_i2c_client(dev); \
359 struct w83627hf_data *data = i2c_get_clientdata(client); \
360 u32 val; \
361 \
362 val = simple_strtoul(buf, NULL, 10); \
363 \
364 down(&data->update_lock); \
365 data->in_##reg[nr] = IN_TO_REG(val); \
366 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
367 data->in_##reg[nr]); \
368 \
369 up(&data->update_lock); \
370 return count; \
371 }
372 store_in_reg(MIN, min)
373 store_in_reg(MAX, max)
374
375 #define sysfs_in_offset(offset) \
376 static ssize_t \
377 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
378 { \
379 return show_in(dev, buf, offset); \
380 } \
381 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
382
383 #define sysfs_in_reg_offset(reg, offset) \
384 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
385 { \
386 return show_in_##reg (dev, buf, offset); \
387 } \
388 static ssize_t \
389 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
390 const char *buf, size_t count) \
391 { \
392 return store_in_##reg (dev, buf, count, offset); \
393 } \
394 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
395 show_regs_in_##reg##offset, store_regs_in_##reg##offset);
396
397 #define sysfs_in_offsets(offset) \
398 sysfs_in_offset(offset) \
399 sysfs_in_reg_offset(min, offset) \
400 sysfs_in_reg_offset(max, offset)
401
402 sysfs_in_offsets(1);
403 sysfs_in_offsets(2);
404 sysfs_in_offsets(3);
405 sysfs_in_offsets(4);
406 sysfs_in_offsets(5);
407 sysfs_in_offsets(6);
408 sysfs_in_offsets(7);
409 sysfs_in_offsets(8);
410
411 /* use a different set of functions for in0 */
412 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
413 {
414 long in0;
415
416 if ((data->vrm_ovt & 0x01) &&
417 (w83627thf == data->type || w83637hf == data->type))
418
419 /* use VRM9 calculation */
420 in0 = (long)((reg * 488 + 70000 + 50) / 100);
421 else
422 /* use VRM8 (standard) calculation */
423 in0 = (long)IN_FROM_REG(reg);
424
425 return sprintf(buf,"%ld\n", in0);
426 }
427
428 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
429 {
430 struct w83627hf_data *data = w83627hf_update_device(dev);
431 return show_in_0(data, buf, data->in[0]);
432 }
433
434 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
435 {
436 struct w83627hf_data *data = w83627hf_update_device(dev);
437 return show_in_0(data, buf, data->in_min[0]);
438 }
439
440 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
441 {
442 struct w83627hf_data *data = w83627hf_update_device(dev);
443 return show_in_0(data, buf, data->in_max[0]);
444 }
445
446 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
447 const char *buf, size_t count)
448 {
449 struct i2c_client *client = to_i2c_client(dev);
450 struct w83627hf_data *data = i2c_get_clientdata(client);
451 u32 val;
452
453 val = simple_strtoul(buf, NULL, 10);
454
455 down(&data->update_lock);
456
457 if ((data->vrm_ovt & 0x01) &&
458 (w83627thf == data->type || w83637hf == data->type))
459
460 /* use VRM9 calculation */
461 data->in_min[0] =
462 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
463 255);
464 else
465 /* use VRM8 (standard) calculation */
466 data->in_min[0] = IN_TO_REG(val);
467
468 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
469 up(&data->update_lock);
470 return count;
471 }
472
473 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
474 const char *buf, size_t count)
475 {
476 struct i2c_client *client = to_i2c_client(dev);
477 struct w83627hf_data *data = i2c_get_clientdata(client);
478 u32 val;
479
480 val = simple_strtoul(buf, NULL, 10);
481
482 down(&data->update_lock);
483
484 if ((data->vrm_ovt & 0x01) &&
485 (w83627thf == data->type || w83637hf == data->type))
486
487 /* use VRM9 calculation */
488 data->in_max[0] =
489 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
490 255);
491 else
492 /* use VRM8 (standard) calculation */
493 data->in_max[0] = IN_TO_REG(val);
494
495 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
496 up(&data->update_lock);
497 return count;
498 }
499
500 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
501 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
502 show_regs_in_min0, store_regs_in_min0);
503 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
504 show_regs_in_max0, store_regs_in_max0);
505
506 #define device_create_file_in(client, offset) \
507 do { \
508 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
509 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
510 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
511 } while (0)
512
513 #define show_fan_reg(reg) \
514 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
515 { \
516 struct w83627hf_data *data = w83627hf_update_device(dev); \
517 return sprintf(buf,"%ld\n", \
518 FAN_FROM_REG(data->reg[nr-1], \
519 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
520 }
521 show_fan_reg(fan);
522 show_fan_reg(fan_min);
523
524 static ssize_t
525 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
526 {
527 struct i2c_client *client = to_i2c_client(dev);
528 struct w83627hf_data *data = i2c_get_clientdata(client);
529 u32 val;
530
531 val = simple_strtoul(buf, NULL, 10);
532
533 down(&data->update_lock);
534 data->fan_min[nr - 1] =
535 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
536 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
537 data->fan_min[nr - 1]);
538
539 up(&data->update_lock);
540 return count;
541 }
542
543 #define sysfs_fan_offset(offset) \
544 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
545 { \
546 return show_fan(dev, buf, offset); \
547 } \
548 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
549
550 #define sysfs_fan_min_offset(offset) \
551 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
552 { \
553 return show_fan_min(dev, buf, offset); \
554 } \
555 static ssize_t \
556 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
557 { \
558 return store_fan_min(dev, buf, count, offset); \
559 } \
560 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
561 show_regs_fan_min##offset, store_regs_fan_min##offset);
562
563 sysfs_fan_offset(1);
564 sysfs_fan_min_offset(1);
565 sysfs_fan_offset(2);
566 sysfs_fan_min_offset(2);
567 sysfs_fan_offset(3);
568 sysfs_fan_min_offset(3);
569
570 #define device_create_file_fan(client, offset) \
571 do { \
572 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
573 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
574 } while (0)
575
576 #define show_temp_reg(reg) \
577 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
578 { \
579 struct w83627hf_data *data = w83627hf_update_device(dev); \
580 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
581 return sprintf(buf,"%ld\n", \
582 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
583 } else { /* TEMP1 */ \
584 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
585 } \
586 }
587 show_temp_reg(temp);
588 show_temp_reg(temp_max);
589 show_temp_reg(temp_max_hyst);
590
591 #define store_temp_reg(REG, reg) \
592 static ssize_t \
593 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
594 { \
595 struct i2c_client *client = to_i2c_client(dev); \
596 struct w83627hf_data *data = i2c_get_clientdata(client); \
597 u32 val; \
598 \
599 val = simple_strtoul(buf, NULL, 10); \
600 \
601 down(&data->update_lock); \
602 \
603 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
604 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
605 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
606 data->temp_##reg##_add[nr-2]); \
607 } else { /* TEMP1 */ \
608 data->temp_##reg = TEMP_TO_REG(val); \
609 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
610 data->temp_##reg); \
611 } \
612 \
613 up(&data->update_lock); \
614 return count; \
615 }
616 store_temp_reg(OVER, max);
617 store_temp_reg(HYST, max_hyst);
618
619 #define sysfs_temp_offset(offset) \
620 static ssize_t \
621 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
622 { \
623 return show_temp(dev, buf, offset); \
624 } \
625 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
626
627 #define sysfs_temp_reg_offset(reg, offset) \
628 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
629 { \
630 return show_temp_##reg (dev, buf, offset); \
631 } \
632 static ssize_t \
633 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
634 const char *buf, size_t count) \
635 { \
636 return store_temp_##reg (dev, buf, count, offset); \
637 } \
638 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
639 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
640
641 #define sysfs_temp_offsets(offset) \
642 sysfs_temp_offset(offset) \
643 sysfs_temp_reg_offset(max, offset) \
644 sysfs_temp_reg_offset(max_hyst, offset)
645
646 sysfs_temp_offsets(1);
647 sysfs_temp_offsets(2);
648 sysfs_temp_offsets(3);
649
650 #define device_create_file_temp(client, offset) \
651 do { \
652 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
653 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
654 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
655 } while (0)
656
657 static ssize_t
658 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
659 {
660 struct w83627hf_data *data = w83627hf_update_device(dev);
661 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
662 }
663 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
664 #define device_create_file_vid(client) \
665 device_create_file(&client->dev, &dev_attr_cpu0_vid)
666
667 static ssize_t
668 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
669 {
670 struct w83627hf_data *data = w83627hf_update_device(dev);
671 return sprintf(buf, "%ld\n", (long) data->vrm);
672 }
673 static ssize_t
674 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
675 {
676 struct i2c_client *client = to_i2c_client(dev);
677 struct w83627hf_data *data = i2c_get_clientdata(client);
678 u32 val;
679
680 val = simple_strtoul(buf, NULL, 10);
681 data->vrm = val;
682
683 return count;
684 }
685 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
686 #define device_create_file_vrm(client) \
687 device_create_file(&client->dev, &dev_attr_vrm)
688
689 static ssize_t
690 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
691 {
692 struct w83627hf_data *data = w83627hf_update_device(dev);
693 return sprintf(buf, "%ld\n", (long) data->alarms);
694 }
695 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
696 #define device_create_file_alarms(client) \
697 device_create_file(&client->dev, &dev_attr_alarms)
698
699 #define show_beep_reg(REG, reg) \
700 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
701 { \
702 struct w83627hf_data *data = w83627hf_update_device(dev); \
703 return sprintf(buf,"%ld\n", \
704 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
705 }
706 show_beep_reg(ENABLE, enable)
707 show_beep_reg(MASK, mask)
708
709 #define BEEP_ENABLE 0 /* Store beep_enable */
710 #define BEEP_MASK 1 /* Store beep_mask */
711
712 static ssize_t
713 store_beep_reg(struct device *dev, const char *buf, size_t count,
714 int update_mask)
715 {
716 struct i2c_client *client = to_i2c_client(dev);
717 struct w83627hf_data *data = i2c_get_clientdata(client);
718 u32 val, val2;
719
720 val = simple_strtoul(buf, NULL, 10);
721
722 down(&data->update_lock);
723
724 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
725 data->beep_mask = BEEP_MASK_TO_REG(val);
726 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
727 data->beep_mask & 0xff);
728 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
729 ((data->beep_mask) >> 16) & 0xff);
730 val2 = (data->beep_mask >> 8) & 0x7f;
731 } else { /* We are storing beep_enable */
732 val2 =
733 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
734 data->beep_enable = BEEP_ENABLE_TO_REG(val);
735 }
736
737 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
738 val2 | data->beep_enable << 7);
739
740 up(&data->update_lock);
741 return count;
742 }
743
744 #define sysfs_beep(REG, reg) \
745 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
746 { \
747 return show_beep_##reg(dev, attr, buf); \
748 } \
749 static ssize_t \
750 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
751 { \
752 return store_beep_reg(dev, buf, count, BEEP_##REG); \
753 } \
754 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
755 show_regs_beep_##reg, store_regs_beep_##reg);
756
757 sysfs_beep(ENABLE, enable);
758 sysfs_beep(MASK, mask);
759
760 #define device_create_file_beep(client) \
761 do { \
762 device_create_file(&client->dev, &dev_attr_beep_enable); \
763 device_create_file(&client->dev, &dev_attr_beep_mask); \
764 } while (0)
765
766 static ssize_t
767 show_fan_div_reg(struct device *dev, char *buf, int nr)
768 {
769 struct w83627hf_data *data = w83627hf_update_device(dev);
770 return sprintf(buf, "%ld\n",
771 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
772 }
773
774 /* Note: we save and restore the fan minimum here, because its value is
775 determined in part by the fan divisor. This follows the principle of
776 least suprise; the user doesn't expect the fan minimum to change just
777 because the divisor changed. */
778 static ssize_t
779 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
780 {
781 struct i2c_client *client = to_i2c_client(dev);
782 struct w83627hf_data *data = i2c_get_clientdata(client);
783 unsigned long min;
784 u8 reg;
785 unsigned long val = simple_strtoul(buf, NULL, 10);
786
787 down(&data->update_lock);
788
789 /* Save fan_min */
790 min = FAN_FROM_REG(data->fan_min[nr],
791 DIV_FROM_REG(data->fan_div[nr]));
792
793 data->fan_div[nr] = DIV_TO_REG(val);
794
795 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
796 & (nr==0 ? 0xcf : 0x3f))
797 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
798 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
799
800 reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
801 & ~(1 << (5 + nr)))
802 | ((data->fan_div[nr] & 0x04) << (3 + nr));
803 w83627hf_write_value(client, W83781D_REG_VBAT, reg);
804
805 /* Restore fan_min */
806 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
807 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
808
809 up(&data->update_lock);
810 return count;
811 }
812
813 #define sysfs_fan_div(offset) \
814 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
815 { \
816 return show_fan_div_reg(dev, buf, offset); \
817 } \
818 static ssize_t \
819 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
820 const char *buf, size_t count) \
821 { \
822 return store_fan_div_reg(dev, buf, count, offset - 1); \
823 } \
824 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
825 show_regs_fan_div_##offset, store_regs_fan_div_##offset);
826
827 sysfs_fan_div(1);
828 sysfs_fan_div(2);
829 sysfs_fan_div(3);
830
831 #define device_create_file_fan_div(client, offset) \
832 do { \
833 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
834 } while (0)
835
836 static ssize_t
837 show_pwm_reg(struct device *dev, char *buf, int nr)
838 {
839 struct w83627hf_data *data = w83627hf_update_device(dev);
840 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
841 }
842
843 static ssize_t
844 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
845 {
846 struct i2c_client *client = to_i2c_client(dev);
847 struct w83627hf_data *data = i2c_get_clientdata(client);
848 u32 val;
849
850 val = simple_strtoul(buf, NULL, 10);
851
852 down(&data->update_lock);
853
854 if (data->type == w83627thf) {
855 /* bits 0-3 are reserved in 627THF */
856 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
857 w83627hf_write_value(client,
858 W836X7HF_REG_PWM(data->type, nr),
859 data->pwm[nr - 1] |
860 (w83627hf_read_value(client,
861 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
862 } else {
863 data->pwm[nr - 1] = PWM_TO_REG(val);
864 w83627hf_write_value(client,
865 W836X7HF_REG_PWM(data->type, nr),
866 data->pwm[nr - 1]);
867 }
868
869 up(&data->update_lock);
870 return count;
871 }
872
873 #define sysfs_pwm(offset) \
874 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
875 { \
876 return show_pwm_reg(dev, buf, offset); \
877 } \
878 static ssize_t \
879 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
880 { \
881 return store_pwm_reg(dev, buf, count, offset); \
882 } \
883 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
884 show_regs_pwm_##offset, store_regs_pwm_##offset);
885
886 sysfs_pwm(1);
887 sysfs_pwm(2);
888 sysfs_pwm(3);
889
890 #define device_create_file_pwm(client, offset) \
891 do { \
892 device_create_file(&client->dev, &dev_attr_pwm##offset); \
893 } while (0)
894
895 static ssize_t
896 show_sensor_reg(struct device *dev, char *buf, int nr)
897 {
898 struct w83627hf_data *data = w83627hf_update_device(dev);
899 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
900 }
901
902 static ssize_t
903 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
904 {
905 struct i2c_client *client = to_i2c_client(dev);
906 struct w83627hf_data *data = i2c_get_clientdata(client);
907 u32 val, tmp;
908
909 val = simple_strtoul(buf, NULL, 10);
910
911 down(&data->update_lock);
912
913 switch (val) {
914 case 1: /* PII/Celeron diode */
915 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
916 w83627hf_write_value(client, W83781D_REG_SCFG1,
917 tmp | BIT_SCFG1[nr - 1]);
918 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
919 w83627hf_write_value(client, W83781D_REG_SCFG2,
920 tmp | BIT_SCFG2[nr - 1]);
921 data->sens[nr - 1] = val;
922 break;
923 case 2: /* 3904 */
924 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
925 w83627hf_write_value(client, W83781D_REG_SCFG1,
926 tmp | BIT_SCFG1[nr - 1]);
927 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
928 w83627hf_write_value(client, W83781D_REG_SCFG2,
929 tmp & ~BIT_SCFG2[nr - 1]);
930 data->sens[nr - 1] = val;
931 break;
932 case W83781D_DEFAULT_BETA: /* thermistor */
933 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
934 w83627hf_write_value(client, W83781D_REG_SCFG1,
935 tmp & ~BIT_SCFG1[nr - 1]);
936 data->sens[nr - 1] = val;
937 break;
938 default:
939 dev_err(&client->dev,
940 "Invalid sensor type %ld; must be 1, 2, or %d\n",
941 (long) val, W83781D_DEFAULT_BETA);
942 break;
943 }
944
945 up(&data->update_lock);
946 return count;
947 }
948
949 #define sysfs_sensor(offset) \
950 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
951 { \
952 return show_sensor_reg(dev, buf, offset); \
953 } \
954 static ssize_t \
955 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
956 { \
957 return store_sensor_reg(dev, buf, count, offset); \
958 } \
959 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
960 show_regs_sensor_##offset, store_regs_sensor_##offset);
961
962 sysfs_sensor(1);
963 sysfs_sensor(2);
964 sysfs_sensor(3);
965
966 #define device_create_file_sensor(client, offset) \
967 do { \
968 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
969 } while (0)
970
971
972 static int __init w83627hf_find(int sioaddr, unsigned short *addr)
973 {
974 u16 val;
975
976 REG = sioaddr;
977 VAL = sioaddr + 1;
978
979 superio_enter();
980 val= superio_inb(DEVID);
981 if(val != W627_DEVID &&
982 val != W627THF_DEVID &&
983 val != W697_DEVID &&
984 val != W637_DEVID) {
985 superio_exit();
986 return -ENODEV;
987 }
988
989 superio_select(W83627HF_LD_HWM);
990 val = (superio_inb(WINB_BASE_REG) << 8) |
991 superio_inb(WINB_BASE_REG + 1);
992 *addr = val & WINB_ALIGNMENT;
993 if (*addr == 0 && force_addr == 0) {
994 superio_exit();
995 return -ENODEV;
996 }
997
998 superio_exit();
999 return 0;
1000 }
1001
1002 static int w83627hf_detect(struct i2c_adapter *adapter)
1003 {
1004 int val, kind;
1005 struct i2c_client *new_client;
1006 struct w83627hf_data *data;
1007 int err = 0;
1008 const char *client_name = "";
1009
1010 if(force_addr)
1011 address = force_addr & WINB_ALIGNMENT;
1012
1013 if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1014 w83627hf_driver.driver.name)) {
1015 err = -EBUSY;
1016 goto ERROR0;
1017 }
1018
1019 if(force_addr) {
1020 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1021 superio_enter();
1022 superio_select(W83627HF_LD_HWM);
1023 superio_outb(WINB_BASE_REG, address >> 8);
1024 superio_outb(WINB_BASE_REG+1, address & 0xff);
1025 superio_exit();
1026 }
1027
1028 superio_enter();
1029 val= superio_inb(DEVID);
1030 if(val == W627_DEVID)
1031 kind = w83627hf;
1032 else if(val == W697_DEVID)
1033 kind = w83697hf;
1034 else if(val == W627THF_DEVID)
1035 kind = w83627thf;
1036 else if(val == W637_DEVID)
1037 kind = w83637hf;
1038 else {
1039 dev_info(&adapter->dev,
1040 "Unsupported chip (dev_id=0x%02X).\n", val);
1041 goto ERROR1;
1042 }
1043
1044 superio_select(W83627HF_LD_HWM);
1045 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1046 superio_outb(WINB_ACT_REG, 1);
1047 superio_exit();
1048
1049 /* OK. For now, we presume we have a valid client. We now create the
1050 client structure, even though we cannot fill it completely yet.
1051 But it allows us to access w83627hf_{read,write}_value. */
1052
1053 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1054 err = -ENOMEM;
1055 goto ERROR1;
1056 }
1057
1058 new_client = &data->client;
1059 i2c_set_clientdata(new_client, data);
1060 new_client->addr = address;
1061 init_MUTEX(&data->lock);
1062 new_client->adapter = adapter;
1063 new_client->driver = &w83627hf_driver;
1064 new_client->flags = 0;
1065
1066
1067 if (kind == w83627hf) {
1068 client_name = "w83627hf";
1069 } else if (kind == w83627thf) {
1070 client_name = "w83627thf";
1071 } else if (kind == w83697hf) {
1072 client_name = "w83697hf";
1073 } else if (kind == w83637hf) {
1074 client_name = "w83637hf";
1075 }
1076
1077 /* Fill in the remaining client fields and put into the global list */
1078 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1079 data->type = kind;
1080 data->valid = 0;
1081 init_MUTEX(&data->update_lock);
1082
1083 /* Tell the I2C layer a new client has arrived */
1084 if ((err = i2c_attach_client(new_client)))
1085 goto ERROR2;
1086
1087 data->lm75 = NULL;
1088
1089 /* Initialize the chip */
1090 w83627hf_init_client(new_client);
1091
1092 /* A few vars need to be filled upon startup */
1093 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1094 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1095 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1096
1097 /* Register sysfs hooks */
1098 data->class_dev = hwmon_device_register(&new_client->dev);
1099 if (IS_ERR(data->class_dev)) {
1100 err = PTR_ERR(data->class_dev);
1101 goto ERROR3;
1102 }
1103
1104 device_create_file_in(new_client, 0);
1105 if (kind != w83697hf)
1106 device_create_file_in(new_client, 1);
1107 device_create_file_in(new_client, 2);
1108 device_create_file_in(new_client, 3);
1109 device_create_file_in(new_client, 4);
1110 if (kind != w83627thf && kind != w83637hf) {
1111 device_create_file_in(new_client, 5);
1112 device_create_file_in(new_client, 6);
1113 }
1114 device_create_file_in(new_client, 7);
1115 device_create_file_in(new_client, 8);
1116
1117 device_create_file_fan(new_client, 1);
1118 device_create_file_fan(new_client, 2);
1119 if (kind != w83697hf)
1120 device_create_file_fan(new_client, 3);
1121
1122 device_create_file_temp(new_client, 1);
1123 device_create_file_temp(new_client, 2);
1124 if (kind != w83697hf)
1125 device_create_file_temp(new_client, 3);
1126
1127 if (kind != w83697hf && data->vid != 0xff) {
1128 device_create_file_vid(new_client);
1129 device_create_file_vrm(new_client);
1130 }
1131
1132 device_create_file_fan_div(new_client, 1);
1133 device_create_file_fan_div(new_client, 2);
1134 if (kind != w83697hf)
1135 device_create_file_fan_div(new_client, 3);
1136
1137 device_create_file_alarms(new_client);
1138
1139 device_create_file_beep(new_client);
1140
1141 device_create_file_pwm(new_client, 1);
1142 device_create_file_pwm(new_client, 2);
1143 if (kind == w83627thf || kind == w83637hf)
1144 device_create_file_pwm(new_client, 3);
1145
1146 device_create_file_sensor(new_client, 1);
1147 device_create_file_sensor(new_client, 2);
1148 if (kind != w83697hf)
1149 device_create_file_sensor(new_client, 3);
1150
1151 return 0;
1152
1153 ERROR3:
1154 i2c_detach_client(new_client);
1155 ERROR2:
1156 kfree(data);
1157 ERROR1:
1158 release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1159 ERROR0:
1160 return err;
1161 }
1162
1163 static int w83627hf_detach_client(struct i2c_client *client)
1164 {
1165 struct w83627hf_data *data = i2c_get_clientdata(client);
1166 int err;
1167
1168 hwmon_device_unregister(data->class_dev);
1169
1170 if ((err = i2c_detach_client(client)))
1171 return err;
1172
1173 release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1174 kfree(data);
1175
1176 return 0;
1177 }
1178
1179
1180 /*
1181 ISA access must always be locked explicitly!
1182 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1183 would slow down the W83781D access and should not be necessary.
1184 There are some ugly typecasts here, but the good news is - they should
1185 nowhere else be necessary! */
1186 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1187 {
1188 struct w83627hf_data *data = i2c_get_clientdata(client);
1189 int res, word_sized;
1190
1191 down(&data->lock);
1192 word_sized = (((reg & 0xff00) == 0x100)
1193 || ((reg & 0xff00) == 0x200))
1194 && (((reg & 0x00ff) == 0x50)
1195 || ((reg & 0x00ff) == 0x53)
1196 || ((reg & 0x00ff) == 0x55));
1197 if (reg & 0xff00) {
1198 outb_p(W83781D_REG_BANK,
1199 client->addr + W83781D_ADDR_REG_OFFSET);
1200 outb_p(reg >> 8,
1201 client->addr + W83781D_DATA_REG_OFFSET);
1202 }
1203 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1204 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1205 if (word_sized) {
1206 outb_p((reg & 0xff) + 1,
1207 client->addr + W83781D_ADDR_REG_OFFSET);
1208 res =
1209 (res << 8) + inb_p(client->addr +
1210 W83781D_DATA_REG_OFFSET);
1211 }
1212 if (reg & 0xff00) {
1213 outb_p(W83781D_REG_BANK,
1214 client->addr + W83781D_ADDR_REG_OFFSET);
1215 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1216 }
1217 up(&data->lock);
1218 return res;
1219 }
1220
1221 static int w83627thf_read_gpio5(struct i2c_client *client)
1222 {
1223 int res = 0xff, sel;
1224
1225 superio_enter();
1226 superio_select(W83627HF_LD_GPIO5);
1227
1228 /* Make sure these GPIO pins are enabled */
1229 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1230 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1231 goto exit;
1232 }
1233
1234 /* Make sure the pins are configured for input
1235 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1236 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1237 if ((sel & 0x1f) != 0x1f) {
1238 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1239 "function\n");
1240 goto exit;
1241 }
1242
1243 dev_info(&client->dev, "Reading VID from GPIO5\n");
1244 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1245
1246 exit:
1247 superio_exit();
1248 return res;
1249 }
1250
1251 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1252 {
1253 struct w83627hf_data *data = i2c_get_clientdata(client);
1254 int word_sized;
1255
1256 down(&data->lock);
1257 word_sized = (((reg & 0xff00) == 0x100)
1258 || ((reg & 0xff00) == 0x200))
1259 && (((reg & 0x00ff) == 0x53)
1260 || ((reg & 0x00ff) == 0x55));
1261 if (reg & 0xff00) {
1262 outb_p(W83781D_REG_BANK,
1263 client->addr + W83781D_ADDR_REG_OFFSET);
1264 outb_p(reg >> 8,
1265 client->addr + W83781D_DATA_REG_OFFSET);
1266 }
1267 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1268 if (word_sized) {
1269 outb_p(value >> 8,
1270 client->addr + W83781D_DATA_REG_OFFSET);
1271 outb_p((reg & 0xff) + 1,
1272 client->addr + W83781D_ADDR_REG_OFFSET);
1273 }
1274 outb_p(value & 0xff,
1275 client->addr + W83781D_DATA_REG_OFFSET);
1276 if (reg & 0xff00) {
1277 outb_p(W83781D_REG_BANK,
1278 client->addr + W83781D_ADDR_REG_OFFSET);
1279 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1280 }
1281 up(&data->lock);
1282 return 0;
1283 }
1284
1285 static void w83627hf_init_client(struct i2c_client *client)
1286 {
1287 struct w83627hf_data *data = i2c_get_clientdata(client);
1288 int i;
1289 int type = data->type;
1290 u8 tmp;
1291
1292 if (reset) {
1293 /* Resetting the chip has been the default for a long time,
1294 but repeatedly caused problems (fans going to full
1295 speed...) so it is now optional. It might even go away if
1296 nobody reports it as being useful, as I see very little
1297 reason why this would be needed at all. */
1298 dev_info(&client->dev, "If reset=1 solved a problem you were "
1299 "having, please report!\n");
1300
1301 /* save this register */
1302 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1303 /* Reset all except Watchdog values and last conversion values
1304 This sets fan-divs to 2, among others */
1305 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1306 /* Restore the register and disable power-on abnormal beep.
1307 This saves FAN 1/2/3 input/output values set by BIOS. */
1308 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1309 /* Disable master beep-enable (reset turns it on).
1310 Individual beeps should be reset to off but for some reason
1311 disabling this bit helps some people not get beeped */
1312 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1313 }
1314
1315 /* Minimize conflicts with other winbond i2c-only clients... */
1316 /* disable i2c subclients... how to disable main i2c client?? */
1317 /* force i2c address to relatively uncommon address */
1318 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1319 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1320
1321 /* Read VID only once */
1322 if (w83627hf == data->type || w83637hf == data->type) {
1323 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1324 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1325 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1326 } else if (w83627thf == data->type) {
1327 data->vid = w83627thf_read_gpio5(client);
1328 }
1329
1330 /* Read VRM & OVT Config only once */
1331 if (w83627thf == data->type || w83637hf == data->type) {
1332 data->vrm_ovt =
1333 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1334 }
1335
1336 /* Convert VID to voltage based on VRM */
1337 data->vrm = vid_which_vrm();
1338
1339 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1340 for (i = 1; i <= 3; i++) {
1341 if (!(tmp & BIT_SCFG1[i - 1])) {
1342 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1343 } else {
1344 if (w83627hf_read_value
1345 (client,
1346 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1347 data->sens[i - 1] = 1;
1348 else
1349 data->sens[i - 1] = 2;
1350 }
1351 if ((type == w83697hf) && (i == 2))
1352 break;
1353 }
1354
1355 if(init) {
1356 /* Enable temp2 */
1357 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1358 if (tmp & 0x01) {
1359 dev_warn(&client->dev, "Enabling temp2, readings "
1360 "might not make sense\n");
1361 w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1362 tmp & 0xfe);
1363 }
1364
1365 /* Enable temp3 */
1366 if (type != w83697hf) {
1367 tmp = w83627hf_read_value(client,
1368 W83781D_REG_TEMP3_CONFIG);
1369 if (tmp & 0x01) {
1370 dev_warn(&client->dev, "Enabling temp3, "
1371 "readings might not make sense\n");
1372 w83627hf_write_value(client,
1373 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1374 }
1375 }
1376 }
1377
1378 /* Start monitoring */
1379 w83627hf_write_value(client, W83781D_REG_CONFIG,
1380 (w83627hf_read_value(client,
1381 W83781D_REG_CONFIG) & 0xf7)
1382 | 0x01);
1383 }
1384
1385 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1386 {
1387 struct i2c_client *client = to_i2c_client(dev);
1388 struct w83627hf_data *data = i2c_get_clientdata(client);
1389 int i;
1390
1391 down(&data->update_lock);
1392
1393 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1394 || !data->valid) {
1395 for (i = 0; i <= 8; i++) {
1396 /* skip missing sensors */
1397 if (((data->type == w83697hf) && (i == 1)) ||
1398 ((data->type == w83627thf || data->type == w83637hf)
1399 && (i == 5 || i == 6)))
1400 continue;
1401 data->in[i] =
1402 w83627hf_read_value(client, W83781D_REG_IN(i));
1403 data->in_min[i] =
1404 w83627hf_read_value(client,
1405 W83781D_REG_IN_MIN(i));
1406 data->in_max[i] =
1407 w83627hf_read_value(client,
1408 W83781D_REG_IN_MAX(i));
1409 }
1410 for (i = 1; i <= 3; i++) {
1411 data->fan[i - 1] =
1412 w83627hf_read_value(client, W83781D_REG_FAN(i));
1413 data->fan_min[i - 1] =
1414 w83627hf_read_value(client,
1415 W83781D_REG_FAN_MIN(i));
1416 }
1417 for (i = 1; i <= 3; i++) {
1418 u8 tmp = w83627hf_read_value(client,
1419 W836X7HF_REG_PWM(data->type, i));
1420 /* bits 0-3 are reserved in 627THF */
1421 if (data->type == w83627thf)
1422 tmp &= 0xf0;
1423 data->pwm[i - 1] = tmp;
1424 if(i == 2 &&
1425 (data->type == w83627hf || data->type == w83697hf))
1426 break;
1427 }
1428
1429 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1430 data->temp_max =
1431 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1432 data->temp_max_hyst =
1433 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1434 data->temp_add[0] =
1435 w83627hf_read_value(client, W83781D_REG_TEMP(2));
1436 data->temp_max_add[0] =
1437 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1438 data->temp_max_hyst_add[0] =
1439 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1440 if (data->type != w83697hf) {
1441 data->temp_add[1] =
1442 w83627hf_read_value(client, W83781D_REG_TEMP(3));
1443 data->temp_max_add[1] =
1444 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1445 data->temp_max_hyst_add[1] =
1446 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1447 }
1448
1449 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1450 data->fan_div[0] = (i >> 4) & 0x03;
1451 data->fan_div[1] = (i >> 6) & 0x03;
1452 if (data->type != w83697hf) {
1453 data->fan_div[2] = (w83627hf_read_value(client,
1454 W83781D_REG_PIN) >> 6) & 0x03;
1455 }
1456 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1457 data->fan_div[0] |= (i >> 3) & 0x04;
1458 data->fan_div[1] |= (i >> 4) & 0x04;
1459 if (data->type != w83697hf)
1460 data->fan_div[2] |= (i >> 5) & 0x04;
1461 data->alarms =
1462 w83627hf_read_value(client, W83781D_REG_ALARM1) |
1463 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1464 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1465 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1466 data->beep_enable = i >> 7;
1467 data->beep_mask = ((i & 0x7f) << 8) |
1468 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1469 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1470 data->last_updated = jiffies;
1471 data->valid = 1;
1472 }
1473
1474 up(&data->update_lock);
1475
1476 return data;
1477 }
1478
1479 static int __init sensors_w83627hf_init(void)
1480 {
1481 if (w83627hf_find(0x2e, &address)
1482 && w83627hf_find(0x4e, &address)) {
1483 return -ENODEV;
1484 }
1485
1486 return i2c_isa_add_driver(&w83627hf_driver);
1487 }
1488
1489 static void __exit sensors_w83627hf_exit(void)
1490 {
1491 i2c_isa_del_driver(&w83627hf_driver);
1492 }
1493
1494 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1495 "Philip Edelbrock <phil@netroedge.com>, "
1496 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1497 MODULE_DESCRIPTION("W83627HF driver");
1498 MODULE_LICENSE("GPL");
1499
1500 module_init(sensors_w83627hf_init);
1501 module_exit(sensors_w83627hf_exit);
Linux kernel - Deliverables
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