2 * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
3 * (http://www.opencores.org/projects.cgi/web/i2c/overview).
5 * Peter Korsgaard <jacmet@sunsite.dk>
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
13 * This driver can be used from the device tree, see
14 * Documentation/devicetree/bindings/i2c/ocore-i2c.txt
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/errno.h>
20 #include <linux/platform_device.h>
21 #include <linux/i2c.h>
22 #include <linux/interrupt.h>
23 #include <linux/wait.h>
24 #include <linux/i2c-ocores.h>
25 #include <linux/slab.h>
27 #include <linux/of_i2c.h>
28 #include <linux/log2.h>
34 wait_queue_head_t wait
;
35 struct i2c_adapter adap
;
39 int state
; /* see STATE_ */
44 #define OCI2C_PRELOW 0
45 #define OCI2C_PREHIGH 1
46 #define OCI2C_CONTROL 2
48 #define OCI2C_CMD 4 /* write only */
49 #define OCI2C_STATUS 4 /* read only, same address as OCI2C_CMD */
51 #define OCI2C_CTRL_IEN 0x40
52 #define OCI2C_CTRL_EN 0x80
54 #define OCI2C_CMD_START 0x91
55 #define OCI2C_CMD_STOP 0x41
56 #define OCI2C_CMD_READ 0x21
57 #define OCI2C_CMD_WRITE 0x11
58 #define OCI2C_CMD_READ_ACK 0x21
59 #define OCI2C_CMD_READ_NACK 0x29
60 #define OCI2C_CMD_IACK 0x01
62 #define OCI2C_STAT_IF 0x01
63 #define OCI2C_STAT_TIP 0x02
64 #define OCI2C_STAT_ARBLOST 0x20
65 #define OCI2C_STAT_BUSY 0x40
66 #define OCI2C_STAT_NACK 0x80
74 static inline void oc_setreg(struct ocores_i2c
*i2c
, int reg
, u8 value
)
76 if (i2c
->reg_io_width
== 4)
77 iowrite32(value
, i2c
->base
+ (reg
<< i2c
->reg_shift
));
78 else if (i2c
->reg_io_width
== 2)
79 iowrite16(value
, i2c
->base
+ (reg
<< i2c
->reg_shift
));
81 iowrite8(value
, i2c
->base
+ (reg
<< i2c
->reg_shift
));
84 static inline u8
oc_getreg(struct ocores_i2c
*i2c
, int reg
)
86 if (i2c
->reg_io_width
== 4)
87 return ioread32(i2c
->base
+ (reg
<< i2c
->reg_shift
));
88 else if (i2c
->reg_io_width
== 2)
89 return ioread16(i2c
->base
+ (reg
<< i2c
->reg_shift
));
91 return ioread8(i2c
->base
+ (reg
<< i2c
->reg_shift
));
94 static void ocores_process(struct ocores_i2c
*i2c
)
96 struct i2c_msg
*msg
= i2c
->msg
;
97 u8 stat
= oc_getreg(i2c
, OCI2C_STATUS
);
99 if ((i2c
->state
== STATE_DONE
) || (i2c
->state
== STATE_ERROR
)) {
100 /* stop has been sent */
101 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_IACK
);
107 if (stat
& OCI2C_STAT_ARBLOST
) {
108 i2c
->state
= STATE_ERROR
;
109 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_STOP
);
113 if ((i2c
->state
== STATE_START
) || (i2c
->state
== STATE_WRITE
)) {
115 (msg
->flags
& I2C_M_RD
) ? STATE_READ
: STATE_WRITE
;
117 if (stat
& OCI2C_STAT_NACK
) {
118 i2c
->state
= STATE_ERROR
;
119 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_STOP
);
123 msg
->buf
[i2c
->pos
++] = oc_getreg(i2c
, OCI2C_DATA
);
126 if (i2c
->pos
== msg
->len
) {
132 if (i2c
->nmsgs
) { /* end? */
134 if (!(msg
->flags
& I2C_M_NOSTART
)) {
135 u8 addr
= (msg
->addr
<< 1);
137 if (msg
->flags
& I2C_M_RD
)
140 i2c
->state
= STATE_START
;
142 oc_setreg(i2c
, OCI2C_DATA
, addr
);
143 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_START
);
146 i2c
->state
= (msg
->flags
& I2C_M_RD
)
147 ? STATE_READ
: STATE_WRITE
;
149 i2c
->state
= STATE_DONE
;
150 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_STOP
);
155 if (i2c
->state
== STATE_READ
) {
156 oc_setreg(i2c
, OCI2C_CMD
, i2c
->pos
== (msg
->len
-1) ?
157 OCI2C_CMD_READ_NACK
: OCI2C_CMD_READ_ACK
);
159 oc_setreg(i2c
, OCI2C_DATA
, msg
->buf
[i2c
->pos
++]);
160 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_WRITE
);
164 static irqreturn_t
ocores_isr(int irq
, void *dev_id
)
166 struct ocores_i2c
*i2c
= dev_id
;
173 static int ocores_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
, int num
)
175 struct ocores_i2c
*i2c
= i2c_get_adapdata(adap
);
180 i2c
->state
= STATE_START
;
182 oc_setreg(i2c
, OCI2C_DATA
,
183 (i2c
->msg
->addr
<< 1) |
184 ((i2c
->msg
->flags
& I2C_M_RD
) ? 1:0));
186 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_START
);
188 if (wait_event_timeout(i2c
->wait
, (i2c
->state
== STATE_ERROR
) ||
189 (i2c
->state
== STATE_DONE
), HZ
))
190 return (i2c
->state
== STATE_DONE
) ? num
: -EIO
;
195 static void ocores_init(struct ocores_i2c
*i2c
)
198 u8 ctrl
= oc_getreg(i2c
, OCI2C_CONTROL
);
200 /* make sure the device is disabled */
201 oc_setreg(i2c
, OCI2C_CONTROL
, ctrl
& ~(OCI2C_CTRL_EN
|OCI2C_CTRL_IEN
));
203 prescale
= (i2c
->clock_khz
/ (5*100)) - 1;
204 oc_setreg(i2c
, OCI2C_PRELOW
, prescale
& 0xff);
205 oc_setreg(i2c
, OCI2C_PREHIGH
, prescale
>> 8);
207 /* Init the device */
208 oc_setreg(i2c
, OCI2C_CMD
, OCI2C_CMD_IACK
);
209 oc_setreg(i2c
, OCI2C_CONTROL
, ctrl
| OCI2C_CTRL_IEN
| OCI2C_CTRL_EN
);
213 static u32
ocores_func(struct i2c_adapter
*adap
)
215 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
218 static const struct i2c_algorithm ocores_algorithm
= {
219 .master_xfer
= ocores_xfer
,
220 .functionality
= ocores_func
,
223 static struct i2c_adapter ocores_adapter
= {
224 .owner
= THIS_MODULE
,
225 .name
= "i2c-ocores",
226 .class = I2C_CLASS_HWMON
| I2C_CLASS_SPD
,
227 .algo
= &ocores_algorithm
,
231 static int ocores_i2c_of_probe(struct platform_device
*pdev
,
232 struct ocores_i2c
*i2c
)
234 struct device_node
*np
= pdev
->dev
.of_node
;
237 if (of_property_read_u32(np
, "reg-shift", &i2c
->reg_shift
)) {
238 /* no 'reg-shift', check for deprecated 'regstep' */
239 if (!of_property_read_u32(np
, "regstep", &val
)) {
240 if (!is_power_of_2(val
)) {
241 dev_err(&pdev
->dev
, "invalid regstep %d\n",
245 i2c
->reg_shift
= ilog2(val
);
247 "regstep property deprecated, use reg-shift\n");
251 if (of_property_read_u32(np
, "clock-frequency", &val
)) {
253 "Missing required parameter 'clock-frequency'\n");
256 i2c
->clock_khz
= val
/ 1000;
258 of_property_read_u32(pdev
->dev
.of_node
, "reg-io-width",
263 #define ocores_i2c_of_probe(pdev,i2c) -ENODEV
266 static int __devinit
ocores_i2c_probe(struct platform_device
*pdev
)
268 struct ocores_i2c
*i2c
;
269 struct ocores_i2c_platform_data
*pdata
;
270 struct resource
*res
, *res2
;
274 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
278 res2
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
282 i2c
= devm_kzalloc(&pdev
->dev
, sizeof(*i2c
), GFP_KERNEL
);
286 if (!devm_request_mem_region(&pdev
->dev
, res
->start
,
287 resource_size(res
), pdev
->name
)) {
288 dev_err(&pdev
->dev
, "Memory region busy\n");
292 i2c
->base
= devm_ioremap_nocache(&pdev
->dev
, res
->start
,
295 dev_err(&pdev
->dev
, "Unable to map registers\n");
299 pdata
= pdev
->dev
.platform_data
;
301 i2c
->reg_shift
= pdata
->reg_shift
;
302 i2c
->reg_io_width
= pdata
->reg_io_width
;
303 i2c
->clock_khz
= pdata
->clock_khz
;
305 ret
= ocores_i2c_of_probe(pdev
, i2c
);
310 if (i2c
->reg_io_width
== 0)
311 i2c
->reg_io_width
= 1; /* Set to default value */
315 init_waitqueue_head(&i2c
->wait
);
316 ret
= devm_request_irq(&pdev
->dev
, res2
->start
, ocores_isr
, 0,
319 dev_err(&pdev
->dev
, "Cannot claim IRQ\n");
323 /* hook up driver to tree */
324 platform_set_drvdata(pdev
, i2c
);
325 i2c
->adap
= ocores_adapter
;
326 i2c_set_adapdata(&i2c
->adap
, i2c
);
327 i2c
->adap
.dev
.parent
= &pdev
->dev
;
328 i2c
->adap
.dev
.of_node
= pdev
->dev
.of_node
;
330 /* add i2c adapter to i2c tree */
331 ret
= i2c_add_adapter(&i2c
->adap
);
333 dev_err(&pdev
->dev
, "Failed to add adapter\n");
337 /* add in known devices to the bus */
339 for (i
= 0; i
< pdata
->num_devices
; i
++)
340 i2c_new_device(&i2c
->adap
, pdata
->devices
+ i
);
342 of_i2c_register_devices(&i2c
->adap
);
348 static int __devexit
ocores_i2c_remove(struct platform_device
*pdev
)
350 struct ocores_i2c
*i2c
= platform_get_drvdata(pdev
);
352 /* disable i2c logic */
353 oc_setreg(i2c
, OCI2C_CONTROL
, oc_getreg(i2c
, OCI2C_CONTROL
)
354 & ~(OCI2C_CTRL_EN
|OCI2C_CTRL_IEN
));
356 /* remove adapter & data */
357 i2c_del_adapter(&i2c
->adap
);
358 platform_set_drvdata(pdev
, NULL
);
364 static int ocores_i2c_suspend(struct device
*dev
)
366 struct ocores_i2c
*i2c
= dev_get_drvdata(dev
);
367 u8 ctrl
= oc_getreg(i2c
, OCI2C_CONTROL
);
369 /* make sure the device is disabled */
370 oc_setreg(i2c
, OCI2C_CONTROL
, ctrl
& ~(OCI2C_CTRL_EN
|OCI2C_CTRL_IEN
));
375 static int ocores_i2c_resume(struct device
*dev
)
377 struct ocores_i2c
*i2c
= dev_get_drvdata(dev
);
384 static SIMPLE_DEV_PM_OPS(ocores_i2c_pm
, ocores_i2c_suspend
, ocores_i2c_resume
);
385 #define OCORES_I2C_PM (&ocores_i2c_pm)
387 #define OCORES_I2C_PM NULL
390 static struct of_device_id ocores_i2c_match
[] = {
391 { .compatible
= "opencores,i2c-ocores", },
394 MODULE_DEVICE_TABLE(of
, ocores_i2c_match
);
396 static struct platform_driver ocores_i2c_driver
= {
397 .probe
= ocores_i2c_probe
,
398 .remove
= __devexit_p(ocores_i2c_remove
),
400 .owner
= THIS_MODULE
,
401 .name
= "ocores-i2c",
402 .of_match_table
= ocores_i2c_match
,
407 module_platform_driver(ocores_i2c_driver
);
409 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
410 MODULE_DESCRIPTION("OpenCores I2C bus driver");
411 MODULE_LICENSE("GPL");
412 MODULE_ALIAS("platform:ocores-i2c");